1 files changed, 25 insertions, 23 deletions

diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 318b0407ea0..7032dd32cdf 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -11,7 +11,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/pm.h>
 #include <linux/dma-mapping.h>
 
 #include <asm/irq.h>
@@ -20,12 +19,12 @@
 #include <mach/at91sam9g45.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
-#include <mach/at91_shdwc.h>
 #include <mach/cpu.h>
 
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"
+#include "sam9_smc.h"
 
 /* --------------------------------------------------------------------
  *  Clocks
@@ -150,7 +149,7 @@ static struct clk ac97_clk = {
         .type           = CLK_TYPE_PERIPHERAL,
 };
 static struct clk macb_clk = {
-        .name           = "macb_clk",
+        .name           = "pclk",
         .pmc_mask       = 1 << AT91SAM9G45_ID_EMAC,
         .type           = CLK_TYPE_PERIPHERAL,
 };
@@ -209,6 +208,8 @@ static struct clk *periph_clocks[] __initdata = {
 };
 
 static struct clk_lookup periph_clocks_lookups[] = {
+        /* One additional fake clock for macb_hclk */
+        CLKDEV_CON_ID("hclk", &macb_clk),
         /* One additional fake clock for ohci */
         CLKDEV_CON_ID("ohci_clk", &uhphs_clk),
         CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci", &uhphs_clk),
@@ -231,6 +232,11 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk),
         /* fake hclk clock */
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
+        CLKDEV_CON_ID("pioA", &pioA_clk),
+        CLKDEV_CON_ID("pioB", &pioB_clk),
+        CLKDEV_CON_ID("pioC", &pioC_clk),
+        CLKDEV_CON_ID("pioD", &pioDE_clk),
+        CLKDEV_CON_ID("pioE", &pioDE_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -293,41 +299,30 @@ void __init at91sam9g45_set_console_clock(int id)
  *  GPIO
  * -------------------------------------------------------------------- */
 
-static struct at91_gpio_bank at91sam9g45_gpio[] = {
+static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
         {
                 .id             = AT91SAM9G45_ID_PIOA,
-                .offset         = AT91_PIOA,
-                .clock          = &pioA_clk,
+                .regbase        = AT91SAM9G45_BASE_PIOA,
         }, {
                 .id             = AT91SAM9G45_ID_PIOB,
-                .offset         = AT91_PIOB,
-                .clock          = &pioB_clk,
+                .regbase        = AT91SAM9G45_BASE_PIOB,
         }, {
                 .id             = AT91SAM9G45_ID_PIOC,
-                .offset         = AT91_PIOC,
-                .clock          = &pioC_clk,
+                .regbase        = AT91SAM9G45_BASE_PIOC,
         }, {
                 .id             = AT91SAM9G45_ID_PIODE,
-                .offset         = AT91_PIOD,
-                .clock          = &pioDE_clk,
+                .regbase        = AT91SAM9G45_BASE_PIOD,
         }, {
                 .id             = AT91SAM9G45_ID_PIODE,
-                .offset         = AT91_PIOE,
-                .clock          = &pioDE_clk,
+                .regbase        = AT91SAM9G45_BASE_PIOE,
         }
 };
 
-static void at91sam9g45_reset(void)
+static void at91sam9g45_restart(char mode, const char *cmd)
 {
         at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
 }
 
-static void at91sam9g45_poweroff(void)
-{
-        at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
-}
-
-
 /* --------------------------------------------------------------------
  *  AT91SAM9G45 processor initialization
  * -------------------------------------------------------------------- */
@@ -338,10 +333,16 @@ static void __init at91sam9g45_map_io(void)
         init_consistent_dma_size(SZ_4M);
 }
 
+static void __init at91sam9g45_ioremap_registers(void)
+{
+        at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
+        at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
+        at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
+}
+
 static void __init at91sam9g45_initialize(void)
 {
-        at91_arch_reset = at91sam9g45_reset;
-        pm_power_off = at91sam9g45_poweroff;
+        arm_pm_restart = at91sam9g45_restart;
         at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
 
         /* Register GPIO subsystem */
@@ -393,6 +394,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
 struct at91_init_soc __initdata at91sam9g45_soc = {
         .map_io = at91sam9g45_map_io,
         .default_irq_priority = at91sam9g45_default_irq_priority,
+        .ioremap_registers = at91sam9g45_ioremap_registers,
         .register_clocks = at91sam9g45_register_clocks,
         .init = at91sam9g45_initialize,
 };