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-rw-r--r--arch/arm/boot/dts/spear300-evb.dts179
-rw-r--r--arch/arm/boot/dts/spear300.dtsi72
-rw-r--r--arch/arm/boot/dts/spear310-evb.dts107
-rw-r--r--arch/arm/boot/dts/spear310.dtsi75
-rw-r--r--arch/arm/boot/dts/spear320-evb.dts108
-rw-r--r--arch/arm/boot/dts/spear320.dtsi90
-rw-r--r--arch/arm/boot/dts/spear3xx.dtsi136
7 files changed, 767 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts
new file mode 100644
index 00000000000..f2ee991705a
--- /dev/null
+++ b/arch/arm/boot/dts/spear300-evb.dts
@@ -0,0 +1,179 @@
1/*
2 * DTS file for SPEAr300 Evaluation Baord
3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/dts-v1/;
15/include/ "spear300.dtsi"
16
17/ {
18 model = "ST SPEAr300 Evaluation Board";
19 compatible = "st,spear300-evb", "st,spear300";
20 #address-cells = <1>;
21 #size-cells = <1>;
22
23 memory {
24 reg = <0 0x40000000>;
25 };
26
27 ahb {
28 clcd@60000000 {
29 status = "okay";
30 };
31
32 fsmc: flash@94000000 {
33 status = "okay";
34 };
35
36 gmac: eth@e0800000 {
37 status = "okay";
38 };
39
40 sdhci@70000000 {
41 int-gpio = <&gpio1 0 0>;
42 power-gpio = <&gpio1 2 1>;
43 status = "okay";
44 };
45
46 smi: flash@fc000000 {
47 status = "okay";
48 };
49
50 spi0: spi@d0100000 {
51 status = "okay";
52 };
53
54 ehci@e1800000 {
55 status = "okay";
56 };
57
58 ohci@e1900000 {
59 status = "okay";
60 };
61
62 ohci@e2100000 {
63 status = "okay";
64 };
65
66 apb {
67 gpio0: gpio@fc980000 {
68 status = "okay";
69 };
70
71 gpio1: gpio@a9000000 {
72 status = "okay";
73 };
74
75 i2c0: i2c@d0180000 {
76 status = "okay";
77 };
78
79 kbd@a0000000 {
80 linux,keymap = < 0x00010000
81 0x00020100
82 0x00030200
83 0x00040300
84 0x00050400
85 0x00060500
86 0x00070600
87 0x00080700
88 0x00090800
89 0x000a0001
90 0x000c0101
91 0x000d0201
92 0x000e0301
93 0x000f0401
94 0x00100501
95 0x00110601
96 0x00120701
97 0x00130801
98 0x00140002
99 0x00150102
100 0x00160202
101 0x00170302
102 0x00180402
103 0x00190502
104 0x001a0602
105 0x001b0702
106 0x001c0802
107 0x001d0003
108 0x001e0103
109 0x001f0203
110 0x00200303
111 0x00210403
112 0x00220503
113 0x00230603
114 0x00240703
115 0x00250803
116 0x00260004
117 0x00270104
118 0x00280204
119 0x00290304
120 0x002a0404
121 0x002b0504
122 0x002c0604
123 0x002d0704
124 0x002e0804
125 0x002f0005
126 0x00300105
127 0x00310205
128 0x00320305
129 0x00330405
130 0x00340505
131 0x00350605
132 0x00360705
133 0x00370805
134 0x00380006
135 0x00390106
136 0x003a0206
137 0x003b0306
138 0x003c0406
139 0x003d0506
140 0x003e0606
141 0x003f0706
142 0x00400806
143 0x00410007
144 0x00420107
145 0x00430207
146 0x00440307
147 0x00450407
148 0x00460507
149 0x00470607
150 0x00480707
151 0x00490807
152 0x004a0008
153 0x004b0108
154 0x004c0208
155 0x004d0308
156 0x004e0408
157 0x004f0508
158 0x00500608
159 0x00510708
160 0x00520808 >;
161 autorepeat;
162 st,mode = <0>;
163 status = "okay";
164 };
165
166 rtc@fc900000 {
167 status = "okay";
168 };
169
170 serial@d0000000 {
171 status = "okay";
172 };
173
174 wdt@fc880000 {
175 status = "okay";
176 };
177 };
178 };
179};
diff --git a/arch/arm/boot/dts/spear300.dtsi b/arch/arm/boot/dts/spear300.dtsi
new file mode 100644
index 00000000000..f9fcbf4f477
--- /dev/null
+++ b/arch/arm/boot/dts/spear300.dtsi
@@ -0,0 +1,72 @@
1/*
2 * DTS file for SPEAr300 SoC
3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/include/ "spear3xx.dtsi"
15
16/ {
17 ahb {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 compatible = "simple-bus";
21 ranges = <0x60000000 0x60000000 0x50000000
22 0xd0000000 0xd0000000 0x30000000>;
23
24 clcd@60000000 {
25 compatible = "arm,clcd-pl110", "arm,primecell";
26 reg = <0x60000000 0x1000>;
27 interrupts = <30>;
28 status = "disabled";
29 };
30
31 fsmc: flash@94000000 {
32 compatible = "st,spear600-fsmc-nand";
33 #address-cells = <1>;
34 #size-cells = <1>;
35 reg = <0x94000000 0x1000 /* FSMC Register */
36 0x80000000 0x0010>; /* NAND Base */
37 reg-names = "fsmc_regs", "nand_data";
38 st,ale-off = <0x20000>;
39 st,cle-off = <0x10000>;
40 status = "disabled";
41 };
42
43 sdhci@70000000 {
44 compatible = "st,sdhci-spear";
45 reg = <0x70000000 0x100>;
46 interrupts = <1>;
47 status = "disabled";
48 };
49
50 apb {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 compatible = "simple-bus";
54 ranges = <0xa0000000 0xa0000000 0x10000000
55 0xd0000000 0xd0000000 0x30000000>;
56
57 gpio1: gpio@a9000000 {
58 #gpio-cells = <2>;
59 compatible = "arm,pl061", "arm,primecell";
60 gpio-controller;
61 reg = <0xa9000000 0x1000>;
62 status = "disabled";
63 };
64
65 kbd@a0000000 {
66 compatible = "st,spear300-kbd";
67 reg = <0xa0000000 0x1000>;
68 status = "disabled";
69 };
70 };
71 };
72};
diff --git a/arch/arm/boot/dts/spear310-evb.dts b/arch/arm/boot/dts/spear310-evb.dts
new file mode 100644
index 00000000000..ec19d7b9795
--- /dev/null
+++ b/arch/arm/boot/dts/spear310-evb.dts
@@ -0,0 +1,107 @@
1/*
2 * DTS file for SPEAr310 Evaluation Baord
3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/dts-v1/;
15/include/ "spear310.dtsi"
16
17/ {
18 model = "ST SPEAr310 Evaluation Board";
19 compatible = "st,spear310-evb", "st,spear310";
20 #address-cells = <1>;
21 #size-cells = <1>;
22
23 memory {
24 reg = <0 0x40000000>;
25 };
26
27 ahb {
28 fsmc: flash@44000000 {
29 status = "okay";
30 };
31
32 gmac: eth@e0800000 {
33 status = "okay";
34 };
35
36 smi: flash@fc000000 {
37 status = "okay";
38 clock-rate=<50000000>;
39
40 flash@f8000000 {
41 label = "m25p64";
42 reg = <0xf8000000 0x800000>;
43 #address-cells = <1>;
44 #size-cells = <1>;
45 st,smi-fast-mode;
46 };
47 };
48
49 spi0: spi@d0100000 {
50 status = "okay";
51 };
52
53 ehci@e1800000 {
54 status = "okay";
55 };
56
57 ohci@e1900000 {
58 status = "okay";
59 };
60
61 ohci@e2100000 {
62 status = "okay";
63 };
64
65 apb {
66 gpio0: gpio@fc980000 {
67 status = "okay";
68 };
69
70 i2c0: i2c@d0180000 {
71 status = "okay";
72 };
73
74 rtc@fc900000 {
75 status = "okay";
76 };
77
78 serial@d0000000 {
79 status = "okay";
80 };
81
82 serial@b2000000 {
83 status = "okay";
84 };
85
86 serial@b2080000 {
87 status = "okay";
88 };
89
90 serial@b2100000 {
91 status = "okay";
92 };
93
94 serial@b2180000 {
95 status = "okay";
96 };
97
98 serial@b2200000 {
99 status = "okay";
100 };
101
102 wdt@fc880000 {
103 status = "okay";
104 };
105 };
106 };
107};
diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi
new file mode 100644
index 00000000000..dc7fa14da84
--- /dev/null
+++ b/arch/arm/boot/dts/spear310.dtsi
@@ -0,0 +1,75 @@
1/*
2 * DTS file for SPEAr310 SoC
3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/include/ "spear3xx.dtsi"
15
16/ {
17 ahb {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 compatible = "simple-bus";
21 ranges = <0x40000000 0x40000000 0x10000000
22 0xb0000000 0xb0000000 0x10000000
23 0xd0000000 0xd0000000 0x30000000>;
24
25 fsmc: flash@44000000 {
26 compatible = "st,spear600-fsmc-nand";
27 #address-cells = <1>;
28 #size-cells = <1>;
29 reg = <0x44000000 0x1000 /* FSMC Register */
30 0x40000000 0x0010>; /* NAND Base */
31 reg-names = "fsmc_regs", "nand_data";
32 st,ale-off = <0x10000>;
33 st,cle-off = <0x20000>;
34 status = "disabled";
35 };
36
37 apb {
38 #address-cells = <1>;
39 #size-cells = <1>;
40 compatible = "simple-bus";
41 ranges = <0xb0000000 0xb0000000 0x10000000
42 0xd0000000 0xd0000000 0x30000000>;
43
44 serial@b2000000 {
45 compatible = "arm,pl011", "arm,primecell";
46 reg = <0xb2000000 0x1000>;
47 status = "disabled";
48 };
49
50 serial@b2080000 {
51 compatible = "arm,pl011", "arm,primecell";
52 reg = <0xb2080000 0x1000>;
53 status = "disabled";
54 };
55
56 serial@b2100000 {
57 compatible = "arm,pl011", "arm,primecell";
58 reg = <0xb2100000 0x1000>;
59 status = "disabled";
60 };
61
62 serial@b2180000 {
63 compatible = "arm,pl011", "arm,primecell";
64 reg = <0xb2180000 0x1000>;
65 status = "disabled";
66 };
67
68 serial@b2200000 {
69 compatible = "arm,pl011", "arm,primecell";
70 reg = <0xb2200000 0x1000>;
71 status = "disabled";
72 };
73 };
74 };
75};
diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts
new file mode 100644
index 00000000000..5681a974d9d
--- /dev/null
+++ b/arch/arm/boot/dts/spear320-evb.dts
@@ -0,0 +1,108 @@
1/*
2 * DTS file for SPEAr320 Evaluation Baord
3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/dts-v1/;
15/include/ "spear320.dtsi"
16
17/ {
18 model = "ST SPEAr300 Evaluation Board";
19 compatible = "st,spear300-evb", "st,spear300";
20 #address-cells = <1>;
21 #size-cells = <1>;
22
23 memory {
24 reg = <0 0x40000000>;
25 };
26
27 ahb {
28 clcd@90000000 {
29 status = "okay";
30 };
31
32 fsmc: flash@4c000000 {
33 status = "okay";
34 };
35
36 gmac: eth@e0800000 {
37 status = "okay";
38 };
39
40 sdhci@70000000 {
41 power-gpio = <&gpio0 2 1>;
42 power_always_enb;
43 status = "okay";
44 };
45
46 smi: flash@fc000000 {
47 status = "okay";
48 };
49
50 spi0: spi@d0100000 {
51 status = "okay";
52 };
53
54 spi1: spi@a5000000 {
55 status = "okay";
56 };
57
58 spi2: spi@a6000000 {
59 status = "okay";
60 };
61
62 ehci@e1800000 {
63 status = "okay";
64 };
65
66 ohci@e1900000 {
67 status = "okay";
68 };
69
70 ohci@e2100000 {
71 status = "okay";
72 };
73
74 apb {
75 gpio0: gpio@fc980000 {
76 status = "okay";
77 };
78
79 i2c0: i2c@d0180000 {
80 status = "okay";
81 };
82
83 i2c1: i2c@a7000000 {
84 status = "okay";
85 };
86
87 rtc@fc900000 {
88 status = "okay";
89 };
90
91 serial@d0000000 {
92 status = "okay";
93 };
94
95 serial@a3000000 {
96 status = "okay";
97 };
98
99 serial@a4000000 {
100 status = "okay";
101 };
102
103 wdt@fc880000 {
104 status = "okay";
105 };
106 };
107 };
108};
diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi
new file mode 100644
index 00000000000..9a0267a5a0b
--- /dev/null
+++ b/arch/arm/boot/dts/spear320.dtsi
@@ -0,0 +1,90 @@
1/*
2 * DTS file for SPEAr320 SoC
3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/include/ "spear3xx.dtsi"
15
16/ {
17 ahb {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 compatible = "simple-bus";
21 ranges = <0x40000000 0x40000000 0x70000000
22 0xd0000000 0xd0000000 0x30000000>;
23
24 clcd@90000000 {
25 compatible = "arm,clcd-pl110", "arm,primecell";
26 reg = <0x90000000 0x1000>;
27 interrupts = <33>;
28 status = "disabled";
29 };
30
31 fsmc: flash@4c000000 {
32 compatible = "st,spear600-fsmc-nand";
33 #address-cells = <1>;
34 #size-cells = <1>;
35 reg = <0x4c000000 0x1000 /* FSMC Register */
36 0x50000000 0x0010>; /* NAND Base */
37 reg-names = "fsmc_regs", "nand_data";
38 st,ale-off = <0x20000>;
39 st,cle-off = <0x10000>;
40 status = "disabled";
41 };
42
43 sdhci@70000000 {
44 compatible = "st,sdhci-spear";
45 reg = <0x70000000 0x100>;
46 interrupts = <29>;
47 status = "disabled";
48 };
49
50 spi1: spi@a5000000 {
51 compatible = "arm,pl022", "arm,primecell";
52 reg = <0xa5000000 0x1000>;
53 status = "disabled";
54 };
55
56 spi2: spi@a6000000 {
57 compatible = "arm,pl022", "arm,primecell";
58 reg = <0xa6000000 0x1000>;
59 status = "disabled";
60 };
61
62 apb {
63 #address-cells = <1>;
64 #size-cells = <1>;
65 compatible = "simple-bus";
66 ranges = <0xa0000000 0xa0000000 0x10000000
67 0xd0000000 0xd0000000 0x30000000>;
68
69 i2c1: i2c@a7000000 {
70 #address-cells = <1>;
71 #size-cells = <0>;
72 compatible = "snps,designware-i2c";
73 reg = <0xa7000000 0x1000>;
74 status = "disabled";
75 };
76
77 serial@a3000000 {
78 compatible = "arm,pl011", "arm,primecell";
79 reg = <0xa3000000 0x1000>;
80 status = "disabled";
81 };
82
83 serial@a4000000 {
84 compatible = "arm,pl011", "arm,primecell";
85 reg = <0xa4000000 0x1000>;
86 status = "disabled";
87 };
88 };
89 };
90};
diff --git a/arch/arm/boot/dts/spear3xx.dtsi b/arch/arm/boot/dts/spear3xx.dtsi
new file mode 100644
index 00000000000..924a6f67ed0
--- /dev/null
+++ b/arch/arm/boot/dts/spear3xx.dtsi
@@ -0,0 +1,136 @@
1/*
2 * DTS file for all SPEAr3xx SoCs
3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/include/ "skeleton.dtsi"
15
16/ {
17 interrupt-parent = <&vic>;
18
19 cpus {
20 cpu@0 {
21 compatible = "arm,arm926ejs";
22 };
23 };
24
25 memory {
26 device_type = "memory";
27 reg = <0 0x40000000>;
28 };
29
30 ahb {
31 #address-cells = <1>;
32 #size-cells = <1>;
33 compatible = "simple-bus";
34 ranges = <0xd0000000 0xd0000000 0x30000000>;
35
36 vic: interrupt-controller@f1100000 {
37 compatible = "arm,pl190-vic";
38 interrupt-controller;
39 reg = <0xf1100000 0x1000>;
40 #interrupt-cells = <1>;
41 };
42
43 gmac: eth@e0800000 {
44 compatible = "st,spear600-gmac";
45 reg = <0xe0800000 0x8000>;
46 interrupts = <23 22>;
47 interrupt-names = "macirq", "eth_wake_irq";
48 status = "disabled";
49 };
50
51 smi: flash@fc000000 {
52 compatible = "st,spear600-smi";
53 #address-cells = <1>;
54 #size-cells = <1>;
55 reg = <0xfc000000 0x1000>;
56 interrupts = <9>;
57 status = "disabled";
58 };
59
60 spi0: spi@d0100000 {
61 compatible = "arm,pl022", "arm,primecell";
62 reg = <0xd0100000 0x1000>;
63 interrupts = <20>;
64 status = "disabled";
65 };
66
67 ehci@e1800000 {
68 compatible = "st,spear600-ehci", "usb-ehci";
69 reg = <0xe1800000 0x1000>;
70 interrupts = <26>;
71 status = "disabled";
72 };
73
74 ohci@e1900000 {
75 compatible = "st,spear600-ohci", "usb-ohci";
76 reg = <0xe1900000 0x1000>;
77 interrupts = <25>;
78 status = "disabled";
79 };
80
81 ohci@e2100000 {
82 compatible = "st,spear600-ohci", "usb-ohci";
83 reg = <0xe2100000 0x1000>;
84 interrupts = <27>;
85 status = "disabled";
86 };
87
88 apb {
89 #address-cells = <1>;
90 #size-cells = <1>;
91 compatible = "simple-bus";
92 ranges = <0xd0000000 0xd0000000 0x30000000>;
93
94 gpio0: gpio@fc980000 {
95 compatible = "arm,pl061", "arm,primecell";
96 reg = <0xfc980000 0x1000>;
97 interrupts = <11>;
98 gpio-controller;
99 #gpio-cells = <2>;
100 interrupt-controller;
101 #interrupt-cells = <2>;
102 status = "disabled";
103 };
104
105 i2c0: i2c@d0180000 {
106 #address-cells = <1>;
107 #size-cells = <0>;
108 compatible = "snps,designware-i2c";
109 reg = <0xd0180000 0x1000>;
110 interrupts = <21>;
111 status = "disabled";
112 };
113
114 rtc@fc900000 {
115 compatible = "st,spear-rtc";
116 reg = <0xfc900000 0x1000>;
117 interrupts = <10>;
118 status = "disabled";
119 };
120
121 serial@d0000000 {
122 compatible = "arm,pl011", "arm,primecell";
123 reg = <0xd0000000 0x1000>;
124 interrupts = <19>;
125 status = "disabled";
126 };
127
128 wdt@fc880000 {
129 compatible = "arm,sp805", "arm,primecell";
130 reg = <0xfc880000 0x1000>;
131 interrupts = <12>;
132 status = "disabled";
133 };
134 };
135 };
136};
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-13 08:13:52 -0400