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Diffstat (limited to 'arch/arm/boot/dts/tegra-seaboard.dts')
-rw-r--r--arch/arm/boot/dts/tegra-seaboard.dts26
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index c4d171ec9ee..d4cbd8054c0 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -8,7 +8,7 @@
8 8
9 memory { 9 memory {
10 device_type = "memory"; 10 device_type = "memory";
11 reg = < 0x00000000 0x40000000 >; 11 reg = <0x00000000 0x40000000>;
12 }; 12 };
13 13
14 pinmux@70000000 { 14 pinmux@70000000 {
@@ -265,14 +265,14 @@
265 compatible = "wlf,wm8903"; 265 compatible = "wlf,wm8903";
266 reg = <0x1a>; 266 reg = <0x1a>;
267 interrupt-parent = <&gpio>; 267 interrupt-parent = <&gpio>;
268 interrupts = < 187 0x04 >; 268 interrupts = <187 0x04>;
269 269
270 gpio-controller; 270 gpio-controller;
271 #gpio-cells = <2>; 271 #gpio-cells = <2>;
272 272
273 micdet-cfg = <0>; 273 micdet-cfg = <0>;
274 micdet-delay = <100>; 274 micdet-delay = <100>;
275 gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >; 275 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
276 }; 276 };
277 277
278 /* ALS and proximity sensor */ 278 /* ALS and proximity sensor */
@@ -280,7 +280,7 @@
280 compatible = "isil,isl29018"; 280 compatible = "isil,isl29018";
281 reg = <0x44>; 281 reg = <0x44>;
282 interrupt-parent = <&gpio>; 282 interrupt-parent = <&gpio>;
283 interrupts = < 202 0x04 >; /* GPIO PZ2 */ 283 interrupts = <202 0x04>; /* GPIO PZ2 */
284 }; 284 };
285 285
286 gyrometer@68 { 286 gyrometer@68 {
@@ -361,7 +361,7 @@
361 }; 361 };
362 362
363 serial@70006300 { 363 serial@70006300 {
364 clock-frequency = < 216000000 >; 364 clock-frequency = <216000000>;
365 }; 365 };
366 366
367 serial@70006400 { 367 serial@70006400 {
@@ -413,10 +413,10 @@
413 413
414 emc@7000f400 { 414 emc@7000f400 {
415 emc-table@190000 { 415 emc-table@190000 {
416 reg = < 190000 >; 416 reg = <190000>;
417 compatible = "nvidia,tegra20-emc-table"; 417 compatible = "nvidia,tegra20-emc-table";
418 clock-frequency = < 190000 >; 418 clock-frequency = <190000>;
419 nvidia,emc-registers = < 0x0000000c 0x00000026 419 nvidia,emc-registers = <0x0000000c 0x00000026
420 0x00000009 0x00000003 0x00000004 0x00000004 420 0x00000009 0x00000003 0x00000004 0x00000004
421 0x00000002 0x0000000c 0x00000003 0x00000003 421 0x00000002 0x0000000c 0x00000003 0x00000003
422 0x00000002 0x00000001 0x00000004 0x00000005 422 0x00000002 0x00000001 0x00000004 0x00000005
@@ -427,14 +427,14 @@
427 0x00000002 0x00000000 0x00000000 0x00000002 427 0x00000002 0x00000000 0x00000000 0x00000002
428 0x00000000 0x00000000 0x00000083 0xa06204ae 428 0x00000000 0x00000000 0x00000083 0xa06204ae
429 0x007dc010 0x00000000 0x00000000 0x00000000 429 0x007dc010 0x00000000 0x00000000 0x00000000
430 0x00000000 0x00000000 0x00000000 0x00000000 >; 430 0x00000000 0x00000000 0x00000000 0x00000000>;
431 }; 431 };
432 432
433 emc-table@380000 { 433 emc-table@380000 {
434 reg = < 380000 >; 434 reg = <380000>;
435 compatible = "nvidia,tegra20-emc-table"; 435 compatible = "nvidia,tegra20-emc-table";
436 clock-frequency = < 380000 >; 436 clock-frequency = <380000>;
437 nvidia,emc-registers = < 0x00000017 0x0000004b 437 nvidia,emc-registers = <0x00000017 0x0000004b
438 0x00000012 0x00000006 0x00000004 0x00000005 438 0x00000012 0x00000006 0x00000004 0x00000005
439 0x00000003 0x0000000c 0x00000006 0x00000006 439 0x00000003 0x0000000c 0x00000006 0x00000006
440 0x00000003 0x00000001 0x00000004 0x00000005 440 0x00000003 0x00000001 0x00000004 0x00000005
@@ -445,7 +445,7 @@
445 0x00000002 0x00000000 0x00000000 0x00000002 445 0x00000002 0x00000000 0x00000000 0x00000002
446 0x00000000 0x00000000 0x00000083 0xe044048b 446 0x00000000 0x00000000 0x00000083 0xe044048b
447 0x007d8010 0x00000000 0x00000000 0x00000000 447 0x007d8010 0x00000000 0x00000000 0x00000000
448 0x00000000 0x00000000 0x00000000 0x00000000 >; 448 0x00000000 0x00000000 0x00000000 0x00000000>;
449 }; 449 };
450 }; 450 };
451 451