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-rw-r--r--drivers/gpu/drm/mga/mga_dma.c99
-rw-r--r--drivers/gpu/drm/mga/mga_drv.c4
-rw-r--r--drivers/gpu/drm/mga/mga_drv.h187
-rw-r--r--drivers/gpu/drm/mga/mga_irq.c9
-rw-r--r--drivers/gpu/drm/mga/mga_state.c47
-rw-r--r--drivers/gpu/drm/mga/mga_warp.c4
6 files changed, 165 insertions, 185 deletions
diff --git a/drivers/gpu/drm/mga/mga_dma.c b/drivers/gpu/drm/mga/mga_dma.c
index ccc129c328a..08868ac3048 100644
--- a/drivers/gpu/drm/mga/mga_dma.c
+++ b/drivers/gpu/drm/mga/mga_dma.c
@@ -52,7 +52,7 @@ static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup);
52 * Engine control 52 * Engine control
53 */ 53 */
54 54
55int mga_do_wait_for_idle(drm_mga_private_t * dev_priv) 55int mga_do_wait_for_idle(drm_mga_private_t *dev_priv)
56{ 56{
57 u32 status = 0; 57 u32 status = 0;
58 int i; 58 int i;
@@ -74,7 +74,7 @@ int mga_do_wait_for_idle(drm_mga_private_t * dev_priv)
74 return -EBUSY; 74 return -EBUSY;
75} 75}
76 76
77static int mga_do_dma_reset(drm_mga_private_t * dev_priv) 77static int mga_do_dma_reset(drm_mga_private_t *dev_priv)
78{ 78{
79 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 79 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
80 drm_mga_primary_buffer_t *primary = &dev_priv->prim; 80 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
@@ -102,7 +102,7 @@ static int mga_do_dma_reset(drm_mga_private_t * dev_priv)
102 * Primary DMA stream 102 * Primary DMA stream
103 */ 103 */
104 104
105void mga_do_dma_flush(drm_mga_private_t * dev_priv) 105void mga_do_dma_flush(drm_mga_private_t *dev_priv)
106{ 106{
107 drm_mga_primary_buffer_t *primary = &dev_priv->prim; 107 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
108 u32 head, tail; 108 u32 head, tail;
@@ -142,11 +142,10 @@ void mga_do_dma_flush(drm_mga_private_t * dev_priv)
142 142
143 head = MGA_READ(MGA_PRIMADDRESS); 143 head = MGA_READ(MGA_PRIMADDRESS);
144 144
145 if (head <= tail) { 145 if (head <= tail)
146 primary->space = primary->size - primary->tail; 146 primary->space = primary->size - primary->tail;
147 } else { 147 else
148 primary->space = head - tail; 148 primary->space = head - tail;
149 }
150 149
151 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset)); 150 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
152 DRM_DEBUG(" tail = 0x%06lx\n", (unsigned long)(tail - dev_priv->primary->offset)); 151 DRM_DEBUG(" tail = 0x%06lx\n", (unsigned long)(tail - dev_priv->primary->offset));
@@ -158,7 +157,7 @@ void mga_do_dma_flush(drm_mga_private_t * dev_priv)
158 DRM_DEBUG("done.\n"); 157 DRM_DEBUG("done.\n");
159} 158}
160 159
161void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv) 160void mga_do_dma_wrap_start(drm_mga_private_t *dev_priv)
162{ 161{
163 drm_mga_primary_buffer_t *primary = &dev_priv->prim; 162 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
164 u32 head, tail; 163 u32 head, tail;
@@ -181,11 +180,10 @@ void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
181 180
182 head = MGA_READ(MGA_PRIMADDRESS); 181 head = MGA_READ(MGA_PRIMADDRESS);
183 182
184 if (head == dev_priv->primary->offset) { 183 if (head == dev_priv->primary->offset)
185 primary->space = primary->size; 184 primary->space = primary->size;
186 } else { 185 else
187 primary->space = head - dev_priv->primary->offset; 186 primary->space = head - dev_priv->primary->offset;
188 }
189 187
190 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset)); 188 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
191 DRM_DEBUG(" tail = 0x%06x\n", primary->tail); 189 DRM_DEBUG(" tail = 0x%06x\n", primary->tail);
@@ -199,7 +197,7 @@ void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
199 DRM_DEBUG("done.\n"); 197 DRM_DEBUG("done.\n");
200} 198}
201 199
202void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv) 200void mga_do_dma_wrap_end(drm_mga_private_t *dev_priv)
203{ 201{
204 drm_mga_primary_buffer_t *primary = &dev_priv->prim; 202 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
205 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 203 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -220,11 +218,11 @@ void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv)
220 * Freelist management 218 * Freelist management
221 */ 219 */
222 220
223#define MGA_BUFFER_USED ~0 221#define MGA_BUFFER_USED (~0)
224#define MGA_BUFFER_FREE 0 222#define MGA_BUFFER_FREE 0
225 223
226#if MGA_FREELIST_DEBUG 224#if MGA_FREELIST_DEBUG
227static void mga_freelist_print(struct drm_device * dev) 225static void mga_freelist_print(struct drm_device *dev)
228{ 226{
229 drm_mga_private_t *dev_priv = dev->dev_private; 227 drm_mga_private_t *dev_priv = dev->dev_private;
230 drm_mga_freelist_t *entry; 228 drm_mga_freelist_t *entry;
@@ -245,7 +243,7 @@ static void mga_freelist_print(struct drm_device * dev)
245} 243}
246#endif 244#endif
247 245
248static int mga_freelist_init(struct drm_device * dev, drm_mga_private_t * dev_priv) 246static int mga_freelist_init(struct drm_device *dev, drm_mga_private_t *dev_priv)
249{ 247{
250 struct drm_device_dma *dma = dev->dma; 248 struct drm_device_dma *dma = dev->dma;
251 struct drm_buf *buf; 249 struct drm_buf *buf;
@@ -288,7 +286,7 @@ static int mga_freelist_init(struct drm_device * dev, drm_mga_private_t * dev_pr
288 return 0; 286 return 0;
289} 287}
290 288
291static void mga_freelist_cleanup(struct drm_device * dev) 289static void mga_freelist_cleanup(struct drm_device *dev)
292{ 290{
293 drm_mga_private_t *dev_priv = dev->dev_private; 291 drm_mga_private_t *dev_priv = dev->dev_private;
294 drm_mga_freelist_t *entry; 292 drm_mga_freelist_t *entry;
@@ -308,7 +306,7 @@ static void mga_freelist_cleanup(struct drm_device * dev)
308#if 0 306#if 0
309/* FIXME: Still needed? 307/* FIXME: Still needed?
310 */ 308 */
311static void mga_freelist_reset(struct drm_device * dev) 309static void mga_freelist_reset(struct drm_device *dev)
312{ 310{
313 struct drm_device_dma *dma = dev->dma; 311 struct drm_device_dma *dma = dev->dma;
314 struct drm_buf *buf; 312 struct drm_buf *buf;
@@ -356,7 +354,7 @@ static struct drm_buf *mga_freelist_get(struct drm_device * dev)
356 return NULL; 354 return NULL;
357} 355}
358 356
359int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf) 357int mga_freelist_put(struct drm_device *dev, struct drm_buf *buf)
360{ 358{
361 drm_mga_private_t *dev_priv = dev->dev_private; 359 drm_mga_private_t *dev_priv = dev->dev_private;
362 drm_mga_buf_priv_t *buf_priv = buf->dev_private; 360 drm_mga_buf_priv_t *buf_priv = buf->dev_private;
@@ -391,7 +389,7 @@ int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf)
391 * DMA initialization, cleanup 389 * DMA initialization, cleanup
392 */ 390 */
393 391
394int mga_driver_load(struct drm_device * dev, unsigned long flags) 392int mga_driver_load(struct drm_device *dev, unsigned long flags)
395{ 393{
396 drm_mga_private_t *dev_priv; 394 drm_mga_private_t *dev_priv;
397 int ret; 395 int ret;
@@ -439,8 +437,8 @@ int mga_driver_load(struct drm_device * dev, unsigned long flags)
439 * 437 *
440 * \sa mga_do_dma_bootstrap, mga_do_pci_dma_bootstrap 438 * \sa mga_do_dma_bootstrap, mga_do_pci_dma_bootstrap
441 */ 439 */
442static int mga_do_agp_dma_bootstrap(struct drm_device * dev, 440static int mga_do_agp_dma_bootstrap(struct drm_device *dev,
443 drm_mga_dma_bootstrap_t * dma_bs) 441 drm_mga_dma_bootstrap_t *dma_bs)
444{ 442{
445 drm_mga_private_t *const dev_priv = 443 drm_mga_private_t *const dev_priv =
446 (drm_mga_private_t *) dev->dev_private; 444 (drm_mga_private_t *) dev->dev_private;
@@ -481,11 +479,10 @@ static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
481 */ 479 */
482 480
483 if (dev_priv->chipset == MGA_CARD_TYPE_G200) { 481 if (dev_priv->chipset == MGA_CARD_TYPE_G200) {
484 if (mode.mode & 0x02) { 482 if (mode.mode & 0x02)
485 MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_ENABLE); 483 MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_ENABLE);
486 } else { 484 else
487 MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_DISABLE); 485 MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_DISABLE);
488 }
489 } 486 }
490 487
491 /* Allocate and bind AGP memory. */ 488 /* Allocate and bind AGP memory. */
@@ -593,8 +590,8 @@ static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
593 return 0; 590 return 0;
594} 591}
595#else 592#else
596static int mga_do_agp_dma_bootstrap(struct drm_device * dev, 593static int mga_do_agp_dma_bootstrap(struct drm_device *dev,
597 drm_mga_dma_bootstrap_t * dma_bs) 594 drm_mga_dma_bootstrap_t *dma_bs)
598{ 595{
599 return -EINVAL; 596 return -EINVAL;
600} 597}
@@ -614,8 +611,8 @@ static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
614 * 611 *
615 * \sa mga_do_dma_bootstrap, mga_do_agp_dma_bootstrap 612 * \sa mga_do_dma_bootstrap, mga_do_agp_dma_bootstrap
616 */ 613 */
617static int mga_do_pci_dma_bootstrap(struct drm_device * dev, 614static int mga_do_pci_dma_bootstrap(struct drm_device *dev,
618 drm_mga_dma_bootstrap_t * dma_bs) 615 drm_mga_dma_bootstrap_t *dma_bs)
619{ 616{
620 drm_mga_private_t *const dev_priv = 617 drm_mga_private_t *const dev_priv =
621 (drm_mga_private_t *) dev->dev_private; 618 (drm_mga_private_t *) dev->dev_private;
@@ -678,9 +675,8 @@ static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
678 req.size = dma_bs->secondary_bin_size; 675 req.size = dma_bs->secondary_bin_size;
679 676
680 err = drm_addbufs_pci(dev, &req); 677 err = drm_addbufs_pci(dev, &req);
681 if (!err) { 678 if (!err)
682 break; 679 break;
683 }
684 } 680 }
685 681
686 if (bin_count == 0) { 682 if (bin_count == 0) {
@@ -704,8 +700,8 @@ static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
704 return 0; 700 return 0;
705} 701}
706 702
707static int mga_do_dma_bootstrap(struct drm_device * dev, 703static int mga_do_dma_bootstrap(struct drm_device *dev,
708 drm_mga_dma_bootstrap_t * dma_bs) 704 drm_mga_dma_bootstrap_t *dma_bs)
709{ 705{
710 const int is_agp = (dma_bs->agp_mode != 0) && drm_device_is_agp(dev); 706 const int is_agp = (dma_bs->agp_mode != 0) && drm_device_is_agp(dev);
711 int err; 707 int err;
@@ -737,17 +733,15 @@ static int mga_do_dma_bootstrap(struct drm_device * dev,
737 * carve off portions of it for internal uses. The remaining memory 733 * carve off portions of it for internal uses. The remaining memory
738 * is returned to user-mode to be used for AGP textures. 734 * is returned to user-mode to be used for AGP textures.
739 */ 735 */
740 if (is_agp) { 736 if (is_agp)
741 err = mga_do_agp_dma_bootstrap(dev, dma_bs); 737 err = mga_do_agp_dma_bootstrap(dev, dma_bs);
742 }
743 738
744 /* If we attempted to initialize the card for AGP DMA but failed, 739 /* If we attempted to initialize the card for AGP DMA but failed,
745 * clean-up any mess that may have been created. 740 * clean-up any mess that may have been created.
746 */ 741 */
747 742
748 if (err) { 743 if (err)
749 mga_do_cleanup_dma(dev, MINIMAL_CLEANUP); 744 mga_do_cleanup_dma(dev, MINIMAL_CLEANUP);
750 }
751 745
752 /* Not only do we want to try and initialized PCI cards for PCI DMA, 746 /* Not only do we want to try and initialized PCI cards for PCI DMA,
753 * but we also try to initialized AGP cards that could not be 747 * but we also try to initialized AGP cards that could not be
@@ -757,9 +751,8 @@ static int mga_do_dma_bootstrap(struct drm_device * dev,
757 * AGP memory, etc. 751 * AGP memory, etc.
758 */ 752 */
759 753
760 if (!is_agp || err) { 754 if (!is_agp || err)
761 err = mga_do_pci_dma_bootstrap(dev, dma_bs); 755 err = mga_do_pci_dma_bootstrap(dev, dma_bs);
762 }
763 756
764 return err; 757 return err;
765} 758}
@@ -792,7 +785,7 @@ int mga_dma_bootstrap(struct drm_device *dev, void *data,
792 return err; 785 return err;
793} 786}
794 787
795static int mga_do_init_dma(struct drm_device * dev, drm_mga_init_t * init) 788static int mga_do_init_dma(struct drm_device *dev, drm_mga_init_t *init)
796{ 789{
797 drm_mga_private_t *dev_priv; 790 drm_mga_private_t *dev_priv;
798 int ret; 791 int ret;
@@ -800,11 +793,10 @@ static int mga_do_init_dma(struct drm_device * dev, drm_mga_init_t * init)
800 793
801 dev_priv = dev->dev_private; 794 dev_priv = dev->dev_private;
802 795
803 if (init->sgram) { 796 if (init->sgram)
804 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK; 797 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK;
805 } else { 798 else
806 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR; 799 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR;
807 }
808 dev_priv->maccess = init->maccess; 800 dev_priv->maccess = init->maccess;
809 801
810 dev_priv->fb_cpp = init->fb_cpp; 802 dev_priv->fb_cpp = init->fb_cpp;
@@ -975,9 +967,8 @@ static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup)
975 dev_priv->agp_handle = 0; 967 dev_priv->agp_handle = 0;
976 } 968 }
977 969
978 if ((dev->agp != NULL) && dev->agp->acquired) { 970 if ((dev->agp != NULL) && dev->agp->acquired)
979 err = drm_agp_release(dev); 971 err = drm_agp_release(dev);
980 }
981#endif 972#endif
982 } 973 }
983 974
@@ -998,9 +989,8 @@ static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup)
998 memset(dev_priv->warp_pipe_phys, 0, 989 memset(dev_priv->warp_pipe_phys, 0,
999 sizeof(dev_priv->warp_pipe_phys)); 990 sizeof(dev_priv->warp_pipe_phys));
1000 991
1001 if (dev_priv->head != NULL) { 992 if (dev_priv->head != NULL)
1002 mga_freelist_cleanup(dev); 993 mga_freelist_cleanup(dev);
1003 }
1004 } 994 }
1005 995
1006 return err; 996 return err;
@@ -1017,9 +1007,8 @@ int mga_dma_init(struct drm_device *dev, void *data,
1017 switch (init->func) { 1007 switch (init->func) {
1018 case MGA_INIT_DMA: 1008 case MGA_INIT_DMA:
1019 err = mga_do_init_dma(dev, init); 1009 err = mga_do_init_dma(dev, init);
1020 if (err) { 1010 if (err)
1021 (void)mga_do_cleanup_dma(dev, FULL_CLEANUP); 1011 (void)mga_do_cleanup_dma(dev, FULL_CLEANUP);
1022 }
1023 return err; 1012 return err;
1024 case MGA_CLEANUP_DMA: 1013 case MGA_CLEANUP_DMA:
1025 return mga_do_cleanup_dma(dev, FULL_CLEANUP); 1014 return mga_do_cleanup_dma(dev, FULL_CLEANUP);
@@ -1047,9 +1036,8 @@ int mga_dma_flush(struct drm_device *dev, void *data,
1047 1036
1048 WRAP_WAIT_WITH_RETURN(dev_priv); 1037 WRAP_WAIT_WITH_RETURN(dev_priv);
1049 1038
1050 if (lock->flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL)) { 1039 if (lock->flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL))
1051 mga_do_dma_flush(dev_priv); 1040 mga_do_dma_flush(dev_priv);
1052 }
1053 1041
1054 if (lock->flags & _DRM_LOCK_QUIESCENT) { 1042 if (lock->flags & _DRM_LOCK_QUIESCENT) {
1055#if MGA_DMA_DEBUG 1043#if MGA_DMA_DEBUG
@@ -1079,8 +1067,8 @@ int mga_dma_reset(struct drm_device *dev, void *data,
1079 * DMA buffer management 1067 * DMA buffer management
1080 */ 1068 */
1081 1069
1082static int mga_dma_get_buffers(struct drm_device * dev, 1070static int mga_dma_get_buffers(struct drm_device *dev,
1083 struct drm_file *file_priv, struct drm_dma * d) 1071 struct drm_file *file_priv, struct drm_dma *d)
1084{ 1072{
1085 struct drm_buf *buf; 1073 struct drm_buf *buf;
1086 int i; 1074 int i;
@@ -1134,9 +1122,8 @@ int mga_dma_buffers(struct drm_device *dev, void *data,
1134 1122
1135 d->granted_count = 0; 1123 d->granted_count = 0;
1136 1124
1137 if (d->request_count) { 1125 if (d->request_count)
1138 ret = mga_dma_get_buffers(dev, file_priv, d); 1126 ret = mga_dma_get_buffers(dev, file_priv, d);
1139 }
1140 1127
1141 return ret; 1128 return ret;
1142} 1129}
@@ -1144,7 +1131,7 @@ int mga_dma_buffers(struct drm_device *dev, void *data,
1144/** 1131/**
1145 * Called just before the module is unloaded. 1132 * Called just before the module is unloaded.
1146 */ 1133 */
1147int mga_driver_unload(struct drm_device * dev) 1134int mga_driver_unload(struct drm_device *dev)
1148{ 1135{
1149 kfree(dev->dev_private); 1136 kfree(dev->dev_private);
1150 dev->dev_private = NULL; 1137 dev->dev_private = NULL;
@@ -1155,12 +1142,12 @@ int mga_driver_unload(struct drm_device * dev)
1155/** 1142/**
1156 * Called when the last opener of the device is closed. 1143 * Called when the last opener of the device is closed.
1157 */ 1144 */
1158void mga_driver_lastclose(struct drm_device * dev) 1145void mga_driver_lastclose(struct drm_device *dev)
1159{ 1146{
1160 mga_do_cleanup_dma(dev, FULL_CLEANUP); 1147 mga_do_cleanup_dma(dev, FULL_CLEANUP);
1161} 1148}
1162 1149
1163int mga_driver_dma_quiescent(struct drm_device * dev) 1150int mga_driver_dma_quiescent(struct drm_device *dev)
1164{ 1151{
1165 drm_mga_private_t *dev_priv = dev->dev_private; 1152 drm_mga_private_t *dev_priv = dev->dev_private;
1166 return mga_do_wait_for_idle(dev_priv); 1153 return mga_do_wait_for_idle(dev_priv);
diff --git a/drivers/gpu/drm/mga/mga_drv.c b/drivers/gpu/drm/mga/mga_drv.c
index ddfe16197b5..26d0d8ced80 100644
--- a/drivers/gpu/drm/mga/mga_drv.c
+++ b/drivers/gpu/drm/mga/mga_drv.c
@@ -36,7 +36,7 @@
36 36
37#include "drm_pciids.h" 37#include "drm_pciids.h"
38 38
39static int mga_driver_device_is_agp(struct drm_device * dev); 39static int mga_driver_device_is_agp(struct drm_device *dev);
40 40
41static struct pci_device_id pciidlist[] = { 41static struct pci_device_id pciidlist[] = {
42 mga_PCI_IDS 42 mga_PCI_IDS
@@ -119,7 +119,7 @@ MODULE_LICENSE("GPL and additional rights");
119 * \returns 119 * \returns
120 * If the device is a PCI G450, zero is returned. Otherwise 2 is returned. 120 * If the device is a PCI G450, zero is returned. Otherwise 2 is returned.
121 */ 121 */
122static int mga_driver_device_is_agp(struct drm_device * dev) 122static int mga_driver_device_is_agp(struct drm_device *dev)
123{ 123{
124 const struct pci_dev *const pdev = dev->pdev; 124 const struct pci_dev *const pdev = dev->pdev;
125 125
diff --git a/drivers/gpu/drm/mga/mga_drv.h b/drivers/gpu/drm/mga/mga_drv.h
index be6c6b9b0e8..1084fa4d261 100644
--- a/drivers/gpu/drm/mga/mga_drv.h
+++ b/drivers/gpu/drm/mga/mga_drv.h
@@ -164,59 +164,59 @@ extern int mga_dma_reset(struct drm_device *dev, void *data,
164extern int mga_dma_buffers(struct drm_device *dev, void *data, 164extern int mga_dma_buffers(struct drm_device *dev, void *data,
165 struct drm_file *file_priv); 165 struct drm_file *file_priv);
166extern int mga_driver_load(struct drm_device *dev, unsigned long flags); 166extern int mga_driver_load(struct drm_device *dev, unsigned long flags);
167extern int mga_driver_unload(struct drm_device * dev); 167extern int mga_driver_unload(struct drm_device *dev);
168extern void mga_driver_lastclose(struct drm_device * dev); 168extern void mga_driver_lastclose(struct drm_device *dev);
169extern int mga_driver_dma_quiescent(struct drm_device * dev); 169extern int mga_driver_dma_quiescent(struct drm_device *dev);
170 170
171extern int mga_do_wait_for_idle(drm_mga_private_t * dev_priv); 171extern int mga_do_wait_for_idle(drm_mga_private_t *dev_priv);
172 172
173extern void mga_do_dma_flush(drm_mga_private_t * dev_priv); 173extern void mga_do_dma_flush(drm_mga_private_t *dev_priv);
174extern void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv); 174extern void mga_do_dma_wrap_start(drm_mga_private_t *dev_priv);
175extern void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv); 175extern void mga_do_dma_wrap_end(drm_mga_private_t *dev_priv);
176 176
177extern int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf); 177extern int mga_freelist_put(struct drm_device *dev, struct drm_buf *buf);
178 178
179 /* mga_warp.c */ 179 /* mga_warp.c */
180extern int mga_warp_install_microcode(drm_mga_private_t * dev_priv); 180extern int mga_warp_install_microcode(drm_mga_private_t *dev_priv);
181extern int mga_warp_init(drm_mga_private_t * dev_priv); 181extern int mga_warp_init(drm_mga_private_t *dev_priv);
182 182
183 /* mga_irq.c */ 183 /* mga_irq.c */
184extern int mga_enable_vblank(struct drm_device *dev, int crtc); 184extern int mga_enable_vblank(struct drm_device *dev, int crtc);
185extern void mga_disable_vblank(struct drm_device *dev, int crtc); 185extern void mga_disable_vblank(struct drm_device *dev, int crtc);
186extern u32 mga_get_vblank_counter(struct drm_device *dev, int crtc); 186extern u32 mga_get_vblank_counter(struct drm_device *dev, int crtc);
187extern int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence); 187extern int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence);
188extern int mga_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence); 188extern int mga_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence);
189extern irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS); 189extern irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS);
190extern void mga_driver_irq_preinstall(struct drm_device * dev); 190extern void mga_driver_irq_preinstall(struct drm_device *dev);
191extern int mga_driver_irq_postinstall(struct drm_device *dev); 191extern int mga_driver_irq_postinstall(struct drm_device *dev);
192extern void mga_driver_irq_uninstall(struct drm_device * dev); 192extern void mga_driver_irq_uninstall(struct drm_device *dev);
193extern long mga_compat_ioctl(struct file *filp, unsigned int cmd, 193extern long mga_compat_ioctl(struct file *filp, unsigned int cmd,
194 unsigned long arg); 194 unsigned long arg);
195 195
196#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER() 196#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER()
197 197
198#if defined(__linux__) && defined(__alpha__) 198#if defined(__linux__) && defined(__alpha__)
199#define MGA_BASE( reg ) ((unsigned long)(dev_priv->mmio->handle)) 199#define MGA_BASE(reg) ((unsigned long)(dev_priv->mmio->handle))
200#define MGA_ADDR( reg ) (MGA_BASE(reg) + reg) 200#define MGA_ADDR(reg) (MGA_BASE(reg) + reg)
201 201
202#define MGA_DEREF( reg ) *(volatile u32 *)MGA_ADDR( reg ) 202#define MGA_DEREF(reg) (*(volatile u32 *)MGA_ADDR(reg))
203#define MGA_DEREF8( reg ) *(volatile u8 *)MGA_ADDR( reg ) 203#define MGA_DEREF8(reg) (*(volatile u8 *)MGA_ADDR(reg))
204 204
205#define MGA_READ( reg ) (_MGA_READ((u32 *)MGA_ADDR(reg))) 205#define MGA_READ(reg) (_MGA_READ((u32 *)MGA_ADDR(reg)))
206#define MGA_READ8( reg ) (_MGA_READ((u8 *)MGA_ADDR(reg))) 206#define MGA_READ8(reg) (_MGA_READ((u8 *)MGA_ADDR(reg)))
207#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF( reg ) = val; } while (0) 207#define MGA_WRITE(reg, val) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF(reg) = val; } while (0)
208#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8( reg ) = val; } while (0) 208#define MGA_WRITE8(reg, val) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8(reg) = val; } while (0)
209 209
210static inline u32 _MGA_READ(u32 * addr) 210static inline u32 _MGA_READ(u32 *addr)
211{ 211{
212 DRM_MEMORYBARRIER(); 212 DRM_MEMORYBARRIER();
213 return *(volatile u32 *)addr; 213 return *(volatile u32 *)addr;
214} 214}
215#else 215#else
216#define MGA_READ8( reg ) DRM_READ8(dev_priv->mmio, (reg)) 216#define MGA_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
217#define MGA_READ( reg ) DRM_READ32(dev_priv->mmio, (reg)) 217#define MGA_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
218#define MGA_WRITE8( reg, val ) DRM_WRITE8(dev_priv->mmio, (reg), (val)) 218#define MGA_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
219#define MGA_WRITE( reg, val ) DRM_WRITE32(dev_priv->mmio, (reg), (val)) 219#define MGA_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
220#endif 220#endif
221 221
222#define DWGREG0 0x1c00 222#define DWGREG0 0x1c00
@@ -233,40 +233,39 @@ static inline u32 _MGA_READ(u32 * addr)
233 * Helper macross... 233 * Helper macross...
234 */ 234 */
235 235
236#define MGA_EMIT_STATE( dev_priv, dirty ) \ 236#define MGA_EMIT_STATE(dev_priv, dirty) \
237do { \ 237do { \
238 if ( (dirty) & ~MGA_UPLOAD_CLIPRECTS ) { \ 238 if ((dirty) & ~MGA_UPLOAD_CLIPRECTS) { \
239 if ( dev_priv->chipset >= MGA_CARD_TYPE_G400 ) { \ 239 if (dev_priv->chipset >= MGA_CARD_TYPE_G400) \
240 mga_g400_emit_state( dev_priv ); \ 240 mga_g400_emit_state(dev_priv); \
241 } else { \ 241 else \
242 mga_g200_emit_state( dev_priv ); \ 242 mga_g200_emit_state(dev_priv); \
243 } \
244 } \ 243 } \
245} while (0) 244} while (0)
246 245
247#define WRAP_TEST_WITH_RETURN( dev_priv ) \ 246#define WRAP_TEST_WITH_RETURN(dev_priv) \
248do { \ 247do { \
249 if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \ 248 if (test_bit(0, &dev_priv->prim.wrapped)) { \
250 if ( mga_is_idle( dev_priv ) ) { \ 249 if (mga_is_idle(dev_priv)) { \
251 mga_do_dma_wrap_end( dev_priv ); \ 250 mga_do_dma_wrap_end(dev_priv); \
252 } else if ( dev_priv->prim.space < \ 251 } else if (dev_priv->prim.space < \
253 dev_priv->prim.high_mark ) { \ 252 dev_priv->prim.high_mark) { \
254 if ( MGA_DMA_DEBUG ) \ 253 if (MGA_DMA_DEBUG) \
255 DRM_INFO( "wrap...\n"); \ 254 DRM_INFO("wrap...\n"); \
256 return -EBUSY; \ 255 return -EBUSY; \
257 } \ 256 } \
258 } \ 257 } \
259} while (0) 258} while (0)
260 259
261#define WRAP_WAIT_WITH_RETURN( dev_priv ) \ 260#define WRAP_WAIT_WITH_RETURN(dev_priv) \
262do { \ 261do { \
263 if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \ 262 if (test_bit(0, &dev_priv->prim.wrapped)) { \
264 if ( mga_do_wait_for_idle( dev_priv ) < 0 ) { \ 263 if (mga_do_wait_for_idle(dev_priv) < 0) { \
265 if ( MGA_DMA_DEBUG ) \ 264 if (MGA_DMA_DEBUG) \
266 DRM_INFO( "wrap...\n"); \ 265 DRM_INFO("wrap...\n"); \
267 return -EBUSY; \ 266 return -EBUSY; \
268 } \ 267 } \
269 mga_do_dma_wrap_end( dev_priv ); \ 268 mga_do_dma_wrap_end(dev_priv); \
270 } \ 269 } \
271} while (0) 270} while (0)
272 271
@@ -280,12 +279,12 @@ do { \
280 279
281#define DMA_BLOCK_SIZE (5 * sizeof(u32)) 280#define DMA_BLOCK_SIZE (5 * sizeof(u32))
282 281
283#define BEGIN_DMA( n ) \ 282#define BEGIN_DMA(n) \
284do { \ 283do { \
285 if ( MGA_VERBOSE ) { \ 284 if (MGA_VERBOSE) { \
286 DRM_INFO( "BEGIN_DMA( %d )\n", (n) ); \ 285 DRM_INFO("BEGIN_DMA(%d)\n", (n)); \
287 DRM_INFO( " space=0x%x req=0x%Zx\n", \ 286 DRM_INFO(" space=0x%x req=0x%Zx\n", \
288 dev_priv->prim.space, (n) * DMA_BLOCK_SIZE ); \ 287 dev_priv->prim.space, (n) * DMA_BLOCK_SIZE); \
289 } \ 288 } \
290 prim = dev_priv->prim.start; \ 289 prim = dev_priv->prim.start; \
291 write = dev_priv->prim.tail; \ 290 write = dev_priv->prim.tail; \
@@ -293,9 +292,9 @@ do { \
293 292
294#define BEGIN_DMA_WRAP() \ 293#define BEGIN_DMA_WRAP() \
295do { \ 294do { \
296 if ( MGA_VERBOSE ) { \ 295 if (MGA_VERBOSE) { \
297 DRM_INFO( "BEGIN_DMA()\n" ); \ 296 DRM_INFO("BEGIN_DMA()\n"); \
298 DRM_INFO( " space=0x%x\n", dev_priv->prim.space ); \ 297 DRM_INFO(" space=0x%x\n", dev_priv->prim.space); \
299 } \ 298 } \
300 prim = dev_priv->prim.start; \ 299 prim = dev_priv->prim.start; \
301 write = dev_priv->prim.tail; \ 300 write = dev_priv->prim.tail; \
@@ -304,72 +303,68 @@ do { \
304#define ADVANCE_DMA() \ 303#define ADVANCE_DMA() \
305do { \ 304do { \
306 dev_priv->prim.tail = write; \ 305 dev_priv->prim.tail = write; \
307 if ( MGA_VERBOSE ) { \ 306 if (MGA_VERBOSE) \
308 DRM_INFO( "ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \ 307 DRM_INFO("ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \
309 write, dev_priv->prim.space ); \ 308 write, dev_priv->prim.space); \
310 } \
311} while (0) 309} while (0)
312 310
313#define FLUSH_DMA() \ 311#define FLUSH_DMA() \
314do { \ 312do { \
315 if ( 0 ) { \ 313 if (0) { \
316 DRM_INFO( "\n" ); \ 314 DRM_INFO("\n"); \
317 DRM_INFO( " tail=0x%06x head=0x%06lx\n", \ 315 DRM_INFO(" tail=0x%06x head=0x%06lx\n", \
318 dev_priv->prim.tail, \ 316 dev_priv->prim.tail, \
319 (unsigned long)(MGA_READ(MGA_PRIMADDRESS) - \ 317 (unsigned long)(MGA_READ(MGA_PRIMADDRESS) - \
320 dev_priv->primary->offset)); \ 318 dev_priv->primary->offset)); \
321 } \ 319 } \
322 if ( !test_bit( 0, &dev_priv->prim.wrapped ) ) { \ 320 if (!test_bit(0, &dev_priv->prim.wrapped)) { \
323 if ( dev_priv->prim.space < \ 321 if (dev_priv->prim.space < dev_priv->prim.high_mark) \
324 dev_priv->prim.high_mark ) { \ 322 mga_do_dma_wrap_start(dev_priv); \
325 mga_do_dma_wrap_start( dev_priv ); \ 323 else \
326 } else { \ 324 mga_do_dma_flush(dev_priv); \
327 mga_do_dma_flush( dev_priv ); \
328 } \
329 } \ 325 } \
330} while (0) 326} while (0)
331 327
332/* Never use this, always use DMA_BLOCK(...) for primary DMA output. 328/* Never use this, always use DMA_BLOCK(...) for primary DMA output.
333 */ 329 */
334#define DMA_WRITE( offset, val ) \ 330#define DMA_WRITE(offset, val) \
335do { \ 331do { \
336 if ( MGA_VERBOSE ) { \ 332 if (MGA_VERBOSE) \
337 DRM_INFO( " DMA_WRITE( 0x%08x ) at 0x%04Zx\n", \ 333 DRM_INFO(" DMA_WRITE( 0x%08x ) at 0x%04Zx\n", \
338 (u32)(val), write + (offset) * sizeof(u32) ); \ 334 (u32)(val), write + (offset) * sizeof(u32)); \
339 } \
340 *(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val; \ 335 *(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val; \
341} while (0) 336} while (0)
342 337
343#define DMA_BLOCK( reg0, val0, reg1, val1, reg2, val2, reg3, val3 ) \ 338#define DMA_BLOCK(reg0, val0, reg1, val1, reg2, val2, reg3, val3) \
344do { \ 339do { \
345 DMA_WRITE( 0, ((DMAREG( reg0 ) << 0) | \ 340 DMA_WRITE(0, ((DMAREG(reg0) << 0) | \
346 (DMAREG( reg1 ) << 8) | \ 341 (DMAREG(reg1) << 8) | \
347 (DMAREG( reg2 ) << 16) | \ 342 (DMAREG(reg2) << 16) | \
348 (DMAREG( reg3 ) << 24)) ); \ 343 (DMAREG(reg3) << 24))); \
349 DMA_WRITE( 1, val0 ); \ 344 DMA_WRITE(1, val0); \
350 DMA_WRITE( 2, val1 ); \ 345 DMA_WRITE(2, val1); \
351 DMA_WRITE( 3, val2 ); \ 346 DMA_WRITE(3, val2); \
352 DMA_WRITE( 4, val3 ); \ 347 DMA_WRITE(4, val3); \
353 write += DMA_BLOCK_SIZE; \ 348 write += DMA_BLOCK_SIZE; \
354} while (0) 349} while (0)
355 350
356/* Buffer aging via primary DMA stream head pointer. 351/* Buffer aging via primary DMA stream head pointer.
357 */ 352 */
358 353
359#define SET_AGE( age, h, w ) \ 354#define SET_AGE(age, h, w) \
360do { \ 355do { \
361 (age)->head = h; \ 356 (age)->head = h; \
362 (age)->wrap = w; \ 357 (age)->wrap = w; \
363} while (0) 358} while (0)
364 359
365#define TEST_AGE( age, h, w ) ( (age)->wrap < w || \ 360#define TEST_AGE(age, h, w) ((age)->wrap < w || \
366 ( (age)->wrap == w && \ 361 ((age)->wrap == w && \
367 (age)->head < h ) ) 362 (age)->head < h))
368 363
369#define AGE_BUFFER( buf_priv ) \ 364#define AGE_BUFFER(buf_priv) \
370do { \ 365do { \
371 drm_mga_freelist_t *entry = (buf_priv)->list_entry; \ 366 drm_mga_freelist_t *entry = (buf_priv)->list_entry; \
372 if ( (buf_priv)->dispatched ) { \ 367 if ((buf_priv)->dispatched) { \
373 entry->age.head = (dev_priv->prim.tail + \ 368 entry->age.head = (dev_priv->prim.tail + \
374 dev_priv->primary->offset); \ 369 dev_priv->primary->offset); \
375 entry->age.wrap = dev_priv->sarea_priv->last_wrap; \ 370 entry->age.wrap = dev_priv->sarea_priv->last_wrap; \
@@ -681,7 +676,7 @@ do { \
681 676
682/* Simple idle test. 677/* Simple idle test.
683 */ 678 */
684static __inline__ int mga_is_idle(drm_mga_private_t * dev_priv) 679static __inline__ int mga_is_idle(drm_mga_private_t *dev_priv)
685{ 680{
686 u32 status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK; 681 u32 status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
687 return (status == MGA_ENDPRDMASTS); 682 return (status == MGA_ENDPRDMASTS);
diff --git a/drivers/gpu/drm/mga/mga_irq.c b/drivers/gpu/drm/mga/mga_irq.c
index daa6041a483..2581202297e 100644
--- a/drivers/gpu/drm/mga/mga_irq.c
+++ b/drivers/gpu/drm/mga/mga_irq.c
@@ -76,9 +76,8 @@ irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
76 /* In addition to clearing the interrupt-pending bit, we 76 /* In addition to clearing the interrupt-pending bit, we
77 * have to write to MGA_PRIMEND to re-start the DMA operation. 77 * have to write to MGA_PRIMEND to re-start the DMA operation.
78 */ 78 */
79 if ((prim_start & ~0x03) != (prim_end & ~0x03)) { 79 if ((prim_start & ~0x03) != (prim_end & ~0x03))
80 MGA_WRITE(MGA_PRIMEND, prim_end); 80 MGA_WRITE(MGA_PRIMEND, prim_end);
81 }
82 81
83 atomic_inc(&dev_priv->last_fence_retired); 82 atomic_inc(&dev_priv->last_fence_retired);
84 DRM_WAKEUP(&dev_priv->fence_queue); 83 DRM_WAKEUP(&dev_priv->fence_queue);
@@ -120,7 +119,7 @@ void mga_disable_vblank(struct drm_device *dev, int crtc)
120 /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */ 119 /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
121} 120}
122 121
123int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence) 122int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)
124{ 123{
125 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 124 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
126 unsigned int cur_fence; 125 unsigned int cur_fence;
@@ -139,7 +138,7 @@ int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence)
139 return ret; 138 return ret;
140} 139}
141 140
142void mga_driver_irq_preinstall(struct drm_device * dev) 141void mga_driver_irq_preinstall(struct drm_device *dev)
143{ 142{
144 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 143 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
145 144
@@ -162,7 +161,7 @@ int mga_driver_irq_postinstall(struct drm_device *dev)
162 return 0; 161 return 0;
163} 162}
164 163
165void mga_driver_irq_uninstall(struct drm_device * dev) 164void mga_driver_irq_uninstall(struct drm_device *dev)
166{ 165{
167 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 166 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
168 if (!dev_priv) 167 if (!dev_priv)
diff --git a/drivers/gpu/drm/mga/mga_state.c b/drivers/gpu/drm/mga/mga_state.c
index a53b848e0f1..fff82045c42 100644
--- a/drivers/gpu/drm/mga/mga_state.c
+++ b/drivers/gpu/drm/mga/mga_state.c
@@ -41,8 +41,8 @@
41 * DMA hardware state programming functions 41 * DMA hardware state programming functions
42 */ 42 */
43 43
44static void mga_emit_clip_rect(drm_mga_private_t * dev_priv, 44static void mga_emit_clip_rect(drm_mga_private_t *dev_priv,
45 struct drm_clip_rect * box) 45 struct drm_clip_rect *box)
46{ 46{
47 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 47 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
48 drm_mga_context_regs_t *ctx = &sarea_priv->context_state; 48 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
@@ -66,7 +66,7 @@ static void mga_emit_clip_rect(drm_mga_private_t * dev_priv,
66 ADVANCE_DMA(); 66 ADVANCE_DMA();
67} 67}
68 68
69static __inline__ void mga_g200_emit_context(drm_mga_private_t * dev_priv) 69static __inline__ void mga_g200_emit_context(drm_mga_private_t *dev_priv)
70{ 70{
71 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 71 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
72 drm_mga_context_regs_t *ctx = &sarea_priv->context_state; 72 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
@@ -89,7 +89,7 @@ static __inline__ void mga_g200_emit_context(drm_mga_private_t * dev_priv)
89 ADVANCE_DMA(); 89 ADVANCE_DMA();
90} 90}
91 91
92static __inline__ void mga_g400_emit_context(drm_mga_private_t * dev_priv) 92static __inline__ void mga_g400_emit_context(drm_mga_private_t *dev_priv)
93{ 93{
94 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 94 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
95 drm_mga_context_regs_t *ctx = &sarea_priv->context_state; 95 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
@@ -116,7 +116,7 @@ static __inline__ void mga_g400_emit_context(drm_mga_private_t * dev_priv)
116 ADVANCE_DMA(); 116 ADVANCE_DMA();
117} 117}
118 118
119static __inline__ void mga_g200_emit_tex0(drm_mga_private_t * dev_priv) 119static __inline__ void mga_g200_emit_tex0(drm_mga_private_t *dev_priv)
120{ 120{
121 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 121 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
122 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; 122 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
@@ -144,7 +144,7 @@ static __inline__ void mga_g200_emit_tex0(drm_mga_private_t * dev_priv)
144 ADVANCE_DMA(); 144 ADVANCE_DMA();
145} 145}
146 146
147static __inline__ void mga_g400_emit_tex0(drm_mga_private_t * dev_priv) 147static __inline__ void mga_g400_emit_tex0(drm_mga_private_t *dev_priv)
148{ 148{
149 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 149 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
150 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; 150 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
@@ -184,7 +184,7 @@ static __inline__ void mga_g400_emit_tex0(drm_mga_private_t * dev_priv)
184 ADVANCE_DMA(); 184 ADVANCE_DMA();
185} 185}
186 186
187static __inline__ void mga_g400_emit_tex1(drm_mga_private_t * dev_priv) 187static __inline__ void mga_g400_emit_tex1(drm_mga_private_t *dev_priv)
188{ 188{
189 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 189 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
190 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1]; 190 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1];
@@ -223,7 +223,7 @@ static __inline__ void mga_g400_emit_tex1(drm_mga_private_t * dev_priv)
223 ADVANCE_DMA(); 223 ADVANCE_DMA();
224} 224}
225 225
226static __inline__ void mga_g200_emit_pipe(drm_mga_private_t * dev_priv) 226static __inline__ void mga_g200_emit_pipe(drm_mga_private_t *dev_priv)
227{ 227{
228 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 228 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
229 unsigned int pipe = sarea_priv->warp_pipe; 229 unsigned int pipe = sarea_priv->warp_pipe;
@@ -250,7 +250,7 @@ static __inline__ void mga_g200_emit_pipe(drm_mga_private_t * dev_priv)
250 ADVANCE_DMA(); 250 ADVANCE_DMA();
251} 251}
252 252
253static __inline__ void mga_g400_emit_pipe(drm_mga_private_t * dev_priv) 253static __inline__ void mga_g400_emit_pipe(drm_mga_private_t *dev_priv)
254{ 254{
255 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 255 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
256 unsigned int pipe = sarea_priv->warp_pipe; 256 unsigned int pipe = sarea_priv->warp_pipe;
@@ -327,7 +327,7 @@ static __inline__ void mga_g400_emit_pipe(drm_mga_private_t * dev_priv)
327 ADVANCE_DMA(); 327 ADVANCE_DMA();
328} 328}
329 329
330static void mga_g200_emit_state(drm_mga_private_t * dev_priv) 330static void mga_g200_emit_state(drm_mga_private_t *dev_priv)
331{ 331{
332 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 332 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
333 unsigned int dirty = sarea_priv->dirty; 333 unsigned int dirty = sarea_priv->dirty;
@@ -348,7 +348,7 @@ static void mga_g200_emit_state(drm_mga_private_t * dev_priv)
348 } 348 }
349} 349}
350 350
351static void mga_g400_emit_state(drm_mga_private_t * dev_priv) 351static void mga_g400_emit_state(drm_mga_private_t *dev_priv)
352{ 352{
353 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 353 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
354 unsigned int dirty = sarea_priv->dirty; 354 unsigned int dirty = sarea_priv->dirty;
@@ -381,7 +381,7 @@ static void mga_g400_emit_state(drm_mga_private_t * dev_priv)
381 381
382/* Disallow all write destinations except the front and backbuffer. 382/* Disallow all write destinations except the front and backbuffer.
383 */ 383 */
384static int mga_verify_context(drm_mga_private_t * dev_priv) 384static int mga_verify_context(drm_mga_private_t *dev_priv)
385{ 385{
386 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 386 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
387 drm_mga_context_regs_t *ctx = &sarea_priv->context_state; 387 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
@@ -400,7 +400,7 @@ static int mga_verify_context(drm_mga_private_t * dev_priv)
400 400
401/* Disallow texture reads from PCI space. 401/* Disallow texture reads from PCI space.
402 */ 402 */
403static int mga_verify_tex(drm_mga_private_t * dev_priv, int unit) 403static int mga_verify_tex(drm_mga_private_t *dev_priv, int unit)
404{ 404{
405 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 405 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
406 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit]; 406 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit];
@@ -417,7 +417,7 @@ static int mga_verify_tex(drm_mga_private_t * dev_priv, int unit)
417 return 0; 417 return 0;
418} 418}
419 419
420static int mga_verify_state(drm_mga_private_t * dev_priv) 420static int mga_verify_state(drm_mga_private_t *dev_priv)
421{ 421{
422 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 422 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
423 unsigned int dirty = sarea_priv->dirty; 423 unsigned int dirty = sarea_priv->dirty;
@@ -446,7 +446,7 @@ static int mga_verify_state(drm_mga_private_t * dev_priv)
446 return (ret == 0); 446 return (ret == 0);
447} 447}
448 448
449static int mga_verify_iload(drm_mga_private_t * dev_priv, 449static int mga_verify_iload(drm_mga_private_t *dev_priv,
450 unsigned int dstorg, unsigned int length) 450 unsigned int dstorg, unsigned int length)
451{ 451{
452 if (dstorg < dev_priv->texture_offset || 452 if (dstorg < dev_priv->texture_offset ||
@@ -465,7 +465,7 @@ static int mga_verify_iload(drm_mga_private_t * dev_priv,
465 return 0; 465 return 0;
466} 466}
467 467
468static int mga_verify_blit(drm_mga_private_t * dev_priv, 468static int mga_verify_blit(drm_mga_private_t *dev_priv,
469 unsigned int srcorg, unsigned int dstorg) 469 unsigned int srcorg, unsigned int dstorg)
470{ 470{
471 if ((srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) || 471 if ((srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ||
@@ -480,7 +480,7 @@ static int mga_verify_blit(drm_mga_private_t * dev_priv,
480 * 480 *
481 */ 481 */
482 482
483static void mga_dma_dispatch_clear(struct drm_device * dev, drm_mga_clear_t * clear) 483static void mga_dma_dispatch_clear(struct drm_device *dev, drm_mga_clear_t *clear)
484{ 484{
485 drm_mga_private_t *dev_priv = dev->dev_private; 485 drm_mga_private_t *dev_priv = dev->dev_private;
486 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 486 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -568,7 +568,7 @@ static void mga_dma_dispatch_clear(struct drm_device * dev, drm_mga_clear_t * cl
568 FLUSH_DMA(); 568 FLUSH_DMA();
569} 569}
570 570
571static void mga_dma_dispatch_swap(struct drm_device * dev) 571static void mga_dma_dispatch_swap(struct drm_device *dev)
572{ 572{
573 drm_mga_private_t *dev_priv = dev->dev_private; 573 drm_mga_private_t *dev_priv = dev->dev_private;
574 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 574 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -622,7 +622,7 @@ static void mga_dma_dispatch_swap(struct drm_device * dev)
622 DRM_DEBUG("... done.\n"); 622 DRM_DEBUG("... done.\n");
623} 623}
624 624
625static void mga_dma_dispatch_vertex(struct drm_device * dev, struct drm_buf * buf) 625static void mga_dma_dispatch_vertex(struct drm_device *dev, struct drm_buf *buf)
626{ 626{
627 drm_mga_private_t *dev_priv = dev->dev_private; 627 drm_mga_private_t *dev_priv = dev->dev_private;
628 drm_mga_buf_priv_t *buf_priv = buf->dev_private; 628 drm_mga_buf_priv_t *buf_priv = buf->dev_private;
@@ -669,7 +669,7 @@ static void mga_dma_dispatch_vertex(struct drm_device * dev, struct drm_buf * bu
669 FLUSH_DMA(); 669 FLUSH_DMA();
670} 670}
671 671
672static void mga_dma_dispatch_indices(struct drm_device * dev, struct drm_buf * buf, 672static void mga_dma_dispatch_indices(struct drm_device *dev, struct drm_buf *buf,
673 unsigned int start, unsigned int end) 673 unsigned int start, unsigned int end)
674{ 674{
675 drm_mga_private_t *dev_priv = dev->dev_private; 675 drm_mga_private_t *dev_priv = dev->dev_private;
@@ -718,7 +718,7 @@ static void mga_dma_dispatch_indices(struct drm_device * dev, struct drm_buf * b
718/* This copies a 64 byte aligned agp region to the frambuffer with a 718/* This copies a 64 byte aligned agp region to the frambuffer with a
719 * standard blit, the ioctl needs to do checking. 719 * standard blit, the ioctl needs to do checking.
720 */ 720 */
721static void mga_dma_dispatch_iload(struct drm_device * dev, struct drm_buf * buf, 721static void mga_dma_dispatch_iload(struct drm_device *dev, struct drm_buf *buf,
722 unsigned int dstorg, unsigned int length) 722 unsigned int dstorg, unsigned int length)
723{ 723{
724 drm_mga_private_t *dev_priv = dev->dev_private; 724 drm_mga_private_t *dev_priv = dev->dev_private;
@@ -766,7 +766,7 @@ static void mga_dma_dispatch_iload(struct drm_device * dev, struct drm_buf * buf
766 FLUSH_DMA(); 766 FLUSH_DMA();
767} 767}
768 768
769static void mga_dma_dispatch_blit(struct drm_device * dev, drm_mga_blit_t * blit) 769static void mga_dma_dispatch_blit(struct drm_device *dev, drm_mga_blit_t *blit)
770{ 770{
771 drm_mga_private_t *dev_priv = dev->dev_private; 771 drm_mga_private_t *dev_priv = dev->dev_private;
772 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 772 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -801,9 +801,8 @@ static void mga_dma_dispatch_blit(struct drm_device * dev, drm_mga_blit_t * blit
801 int w = pbox[i].x2 - pbox[i].x1 - 1; 801 int w = pbox[i].x2 - pbox[i].x1 - 1;
802 int start; 802 int start;
803 803
804 if (blit->ydir == -1) { 804 if (blit->ydir == -1)
805 srcy = blit->height - srcy - 1; 805 srcy = blit->height - srcy - 1;
806 }
807 806
808 start = srcy * blit->src_pitch + srcx; 807 start = srcy * blit->src_pitch + srcx;
809 808
diff --git a/drivers/gpu/drm/mga/mga_warp.c b/drivers/gpu/drm/mga/mga_warp.c
index 9aad4847afd..f172bd5c257 100644
--- a/drivers/gpu/drm/mga/mga_warp.c
+++ b/drivers/gpu/drm/mga/mga_warp.c
@@ -46,7 +46,7 @@ MODULE_FIRMWARE(FIRMWARE_G400);
46 46
47#define WARP_UCODE_SIZE(size) ALIGN(size, MGA_WARP_CODE_ALIGN) 47#define WARP_UCODE_SIZE(size) ALIGN(size, MGA_WARP_CODE_ALIGN)
48 48
49int mga_warp_install_microcode(drm_mga_private_t * dev_priv) 49int mga_warp_install_microcode(drm_mga_private_t *dev_priv)
50{ 50{
51 unsigned char *vcbase = dev_priv->warp->handle; 51 unsigned char *vcbase = dev_priv->warp->handle;
52 unsigned long pcbase = dev_priv->warp->offset; 52 unsigned long pcbase = dev_priv->warp->offset;
@@ -133,7 +133,7 @@ out:
133 133
134#define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE) 134#define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE)
135 135
136int mga_warp_init(drm_mga_private_t * dev_priv) 136int mga_warp_init(drm_mga_private_t *dev_priv)
137{ 137{
138 u32 wmisc; 138 u32 wmisc;
139 139
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-21 19:43:22 -0400