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-rw-r--r--arch/arm/boot/dts/spear300-evb.dts38
-rw-r--r--arch/arm/boot/dts/spear300.dtsi5
-rw-r--r--arch/arm/boot/dts/spear310-evb.dts61
-rw-r--r--arch/arm/boot/dts/spear310.dtsi5
-rw-r--r--arch/arm/boot/dts/spear320-evb.dts61
-rw-r--r--arch/arm/boot/dts/spear320.dtsi7
-rw-r--r--arch/arm/mach-spear3xx/Kconfig3
-rw-r--r--arch/arm/plat-spear/Kconfig1
8 files changed, 180 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts
index eaecc29b9d8..402ca0d5501 100644
--- a/arch/arm/boot/dts/spear300-evb.dts
+++ b/arch/arm/boot/dts/spear300-evb.dts
@@ -25,6 +25,44 @@
25 }; 25 };
26 26
27 ahb { 27 ahb {
28 pinmux@99000000 {
29 st,pinmux-mode = <2>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&state_default>;
32
33 state_default: pinmux {
34 i2c0 {
35 st,pins = "i2c0_grp";
36 st,function = "i2c0";
37 };
38 ssp0 {
39 st,pins = "ssp0_grp";
40 st,function = "ssp0";
41 };
42 mii0 {
43 st,pins = "mii0_grp";
44 st,function = "mii0";
45 };
46 uart0 {
47 st,pins = "uart0_grp";
48 st,function = "uart0";
49 };
50 clcd {
51 st,pins = "clcd_pfmode_grp";
52 st,function = "clcd";
53 };
54 sdhci {
55 st,pins = "sdhci_4bit_grp";
56 st,function = "sdhci";
57 };
58 gpio1 {
59 st,pins = "gpio1_4_to_7_grp",
60 "gpio1_0_to_3_grp";
61 st,function = "gpio1";
62 };
63 };
64 };
65
28 clcd@60000000 { 66 clcd@60000000 {
29 status = "okay"; 67 status = "okay";
30 }; 68 };
diff --git a/arch/arm/boot/dts/spear300.dtsi b/arch/arm/boot/dts/spear300.dtsi
index f9fcbf4f477..01c5e358fdb 100644
--- a/arch/arm/boot/dts/spear300.dtsi
+++ b/arch/arm/boot/dts/spear300.dtsi
@@ -21,6 +21,11 @@
21 ranges = <0x60000000 0x60000000 0x50000000 21 ranges = <0x60000000 0x60000000 0x50000000
22 0xd0000000 0xd0000000 0x30000000>; 22 0xd0000000 0xd0000000 0x30000000>;
23 23
24 pinmux@99000000 {
25 compatible = "st,spear300-pinmux";
26 reg = <0x99000000 0x1000>;
27 };
28
24 clcd@60000000 { 29 clcd@60000000 {
25 compatible = "arm,clcd-pl110", "arm,primecell"; 30 compatible = "arm,clcd-pl110", "arm,primecell";
26 reg = <0x60000000 0x1000>; 31 reg = <0x60000000 0x1000>;
diff --git a/arch/arm/boot/dts/spear310-evb.dts b/arch/arm/boot/dts/spear310-evb.dts
index c86af33f700..6d95317100a 100644
--- a/arch/arm/boot/dts/spear310-evb.dts
+++ b/arch/arm/boot/dts/spear310-evb.dts
@@ -25,6 +25,67 @@
25 }; 25 };
26 26
27 ahb { 27 ahb {
28 pinmux@b4000000 {
29 pinctrl-names = "default";
30 pinctrl-0 = <&state_default>;
31
32 state_default: pinmux {
33 gpio0 {
34 st,pins = "gpio0_pin0_grp",
35 "gpio0_pin1_grp",
36 "gpio0_pin2_grp",
37 "gpio0_pin3_grp",
38 "gpio0_pin4_grp",
39 "gpio0_pin5_grp";
40 st,function = "gpio0";
41 };
42 i2c0 {
43 st,pins = "i2c0_grp";
44 st,function = "i2c0";
45 };
46 mii0 {
47 st,pins = "mii0_grp";
48 st,function = "mii0";
49 };
50 ssp0 {
51 st,pins = "ssp0_grp";
52 st,function = "ssp0";
53 };
54 uart0 {
55 st,pins = "uart0_grp";
56 st,function = "uart0";
57 };
58 emi {
59 st,pins = "emi_cs_0_to_5_grp";
60 st,function = "emi";
61 };
62 fsmc {
63 st,pins = "fsmc_grp";
64 st,function = "fsmc";
65 };
66 uart1 {
67 st,pins = "uart1_grp";
68 st,function = "uart1";
69 };
70 uart2 {
71 st,pins = "uart2_grp";
72 st,function = "uart2";
73 };
74 uart3 {
75 st,pins = "uart3_grp";
76 st,function = "uart3";
77 };
78 uart4 {
79 st,pins = "uart4_grp";
80 st,function = "uart4";
81 };
82 uart5 {
83 st,pins = "uart5_grp";
84 st,function = "uart5";
85 };
86 };
87 };
88
28 dma@fc400000 { 89 dma@fc400000 {
29 status = "okay"; 90 status = "okay";
30 }; 91 };
diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi
index dc7fa14da84..e47081c494d 100644
--- a/arch/arm/boot/dts/spear310.dtsi
+++ b/arch/arm/boot/dts/spear310.dtsi
@@ -22,6 +22,11 @@
22 0xb0000000 0xb0000000 0x10000000 22 0xb0000000 0xb0000000 0x10000000
23 0xd0000000 0xd0000000 0x30000000>; 23 0xd0000000 0xd0000000 0x30000000>;
24 24
25 pinmux@b4000000 {
26 compatible = "st,spear310-pinmux";
27 reg = <0xb4000000 0x1000>;
28 };
29
25 fsmc: flash@44000000 { 30 fsmc: flash@44000000 {
26 compatible = "st,spear600-fsmc-nand"; 31 compatible = "st,spear600-fsmc-nand";
27 #address-cells = <1>; 32 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts
index d43de712e86..0c6463b71a3 100644
--- a/arch/arm/boot/dts/spear320-evb.dts
+++ b/arch/arm/boot/dts/spear320-evb.dts
@@ -25,6 +25,67 @@
25 }; 25 };
26 26
27 ahb { 27 ahb {
28 pinmux@b3000000 {
29 st,pinmux-mode = <3>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&state_default>;
32
33 state_default: pinmux {
34 i2c0 {
35 st,pins = "i2c0_grp";
36 st,function = "i2c0";
37 };
38 mii0 {
39 st,pins = "mii0_grp";
40 st,function = "mii0";
41 };
42 ssp0 {
43 st,pins = "ssp0_grp";
44 st,function = "ssp0";
45 };
46 uart0 {
47 st,pins = "uart0_grp";
48 st,function = "uart0";
49 };
50 sdhci {
51 st,pins = "sdhci_cd_51_grp";
52 st,function = "sdhci";
53 };
54 i2s {
55 st,pins = "i2s_grp";
56 st,function = "i2s";
57 };
58 uart1 {
59 st,pins = "uart1_grp";
60 st,function = "uart1";
61 };
62 uart2 {
63 st,pins = "uart2_grp";
64 st,function = "uart2";
65 };
66 can0 {
67 st,pins = "can0_grp";
68 st,function = "can0";
69 };
70 can1 {
71 st,pins = "can1_grp";
72 st,function = "can1";
73 };
74 mii2 {
75 st,pins = "mii2_grp";
76 st,function = "mii2";
77 };
78 pwm0_1 {
79 st,pins = "pwm0_1_pin_14_15_grp";
80 st,function = "pwm0_1";
81 };
82 pwm2 {
83 st,pins = "pwm2_pin_13_grp";
84 st,function = "pwm2";
85 };
86 };
87 };
88
28 clcd@90000000 { 89 clcd@90000000 {
29 status = "okay"; 90 status = "okay";
30 }; 91 };
diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi
index 9a0267a5a0b..5372ca399b1 100644
--- a/arch/arm/boot/dts/spear320.dtsi
+++ b/arch/arm/boot/dts/spear320.dtsi
@@ -18,9 +18,14 @@
18 #address-cells = <1>; 18 #address-cells = <1>;
19 #size-cells = <1>; 19 #size-cells = <1>;
20 compatible = "simple-bus"; 20 compatible = "simple-bus";
21 ranges = <0x40000000 0x40000000 0x70000000 21 ranges = <0x40000000 0x40000000 0x80000000
22 0xd0000000 0xd0000000 0x30000000>; 22 0xd0000000 0xd0000000 0x30000000>;
23 23
24 pinmux@b3000000 {
25 compatible = "st,spear320-pinmux";
26 reg = <0xb3000000 0x1000>;
27 };
28
24 clcd@90000000 { 29 clcd@90000000 {
25 compatible = "arm,clcd-pl110", "arm,primecell"; 30 compatible = "arm,clcd-pl110", "arm,primecell";
26 reg = <0x90000000 0x1000>; 31 reg = <0x90000000 0x1000>;
diff --git a/arch/arm/mach-spear3xx/Kconfig b/arch/arm/mach-spear3xx/Kconfig
index d9fe11cb6f1..8bd37291fa4 100644
--- a/arch/arm/mach-spear3xx/Kconfig
+++ b/arch/arm/mach-spear3xx/Kconfig
@@ -7,16 +7,19 @@ if ARCH_SPEAR3XX
7menu "SPEAr3xx Implementations" 7menu "SPEAr3xx Implementations"
8config MACH_SPEAR300 8config MACH_SPEAR300
9 bool "SPEAr300 Machine support with Device Tree" 9 bool "SPEAr300 Machine support with Device Tree"
10 select PINCTRL_SPEAR300
10 help 11 help
11 Supports ST SPEAr300 machine configured via the device-tree 12 Supports ST SPEAr300 machine configured via the device-tree
12 13
13config MACH_SPEAR310 14config MACH_SPEAR310
14 bool "SPEAr310 Machine support with Device Tree" 15 bool "SPEAr310 Machine support with Device Tree"
16 select PINCTRL_SPEAR310
15 help 17 help
16 Supports ST SPEAr310 machine configured via the device-tree 18 Supports ST SPEAr310 machine configured via the device-tree
17 19
18config MACH_SPEAR320 20config MACH_SPEAR320
19 bool "SPEAr320 Machine support with Device Tree" 21 bool "SPEAr320 Machine support with Device Tree"
22 select PINCTRL_SPEAR320
20 help 23 help
21 Supports ST SPEAr320 machine configured via the device-tree 24 Supports ST SPEAr320 machine configured via the device-tree
22endmenu 25endmenu
diff --git a/arch/arm/plat-spear/Kconfig b/arch/arm/plat-spear/Kconfig
index 6c066fcb297..387655b5ce0 100644
--- a/arch/arm/plat-spear/Kconfig
+++ b/arch/arm/plat-spear/Kconfig
@@ -13,6 +13,7 @@ config ARCH_SPEAR3XX
13 select ARM_VIC 13 select ARM_VIC
14 select CPU_ARM926T 14 select CPU_ARM926T
15 select USE_OF 15 select USE_OF
16 select PINCTRL
16 help 17 help
17 Supports for ARM's SPEAR3XX family 18 Supports for ARM's SPEAR3XX family
18 19
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-24 16:52:19 -0500