diff options
-rw-r--r-- | arch/sh/boards/mach-sdk7786/fpga.c | 43 | ||||
-rw-r--r-- | arch/sh/include/cpu-sh4/cpu/addrspace.h | 9 | ||||
-rw-r--r-- | arch/sh/include/mach-sdk7786/mach/fpga.h | 2 |
3 files changed, 50 insertions, 4 deletions
diff --git a/arch/sh/boards/mach-sdk7786/fpga.c b/arch/sh/boards/mach-sdk7786/fpga.c index 99f903c8b23..3e4ec66a041 100644 --- a/arch/sh/boards/mach-sdk7786/fpga.c +++ b/arch/sh/boards/mach-sdk7786/fpga.c | |||
@@ -11,9 +11,44 @@ | |||
11 | #include <linux/io.h> | 11 | #include <linux/io.h> |
12 | #include <linux/bcd.h> | 12 | #include <linux/bcd.h> |
13 | #include <mach/fpga.h> | 13 | #include <mach/fpga.h> |
14 | #include <asm/sizes.h> | ||
14 | 15 | ||
15 | #define FPGA_REGS_BASE 0x07fff800 | 16 | #define FPGA_REGS_OFFSET 0x03fff800 |
16 | #define FPGA_REGS_SIZE 0x490 | 17 | #define FPGA_REGS_SIZE 0x490 |
18 | |||
19 | /* | ||
20 | * The FPGA can be mapped in any of the generally available areas, | ||
21 | * so we attempt to scan for it using the fixed SRSTR read magic. | ||
22 | * | ||
23 | * Once the FPGA is located, the rest of the mapping data for the other | ||
24 | * components can be determined dynamically from its section mapping | ||
25 | * registers. | ||
26 | */ | ||
27 | static void __iomem *sdk7786_fpga_probe(void) | ||
28 | { | ||
29 | unsigned long area; | ||
30 | void __iomem *base; | ||
31 | |||
32 | /* | ||
33 | * Iterate over all of the areas where the FPGA could be mapped. | ||
34 | * The possible range is anywhere from area 0 through 6, area 7 | ||
35 | * is reserved. | ||
36 | */ | ||
37 | for (area = PA_AREA0; area < PA_AREA7; area += SZ_64M) { | ||
38 | base = ioremap_nocache(area + FPGA_REGS_OFFSET, FPGA_REGS_SIZE); | ||
39 | if (!base) { | ||
40 | /* Failed to remap this area, move along. */ | ||
41 | continue; | ||
42 | } | ||
43 | |||
44 | if (ioread16(base + SRSTR) == SRSTR_MAGIC) | ||
45 | return base; /* Found it! */ | ||
46 | |||
47 | iounmap(base); | ||
48 | } | ||
49 | |||
50 | return NULL; | ||
51 | } | ||
17 | 52 | ||
18 | void __iomem *sdk7786_fpga_base; | 53 | void __iomem *sdk7786_fpga_base; |
19 | 54 | ||
@@ -21,9 +56,9 @@ void __init sdk7786_fpga_init(void) | |||
21 | { | 56 | { |
22 | u16 version, date; | 57 | u16 version, date; |
23 | 58 | ||
24 | sdk7786_fpga_base = ioremap_nocache(FPGA_REGS_BASE, FPGA_REGS_SIZE); | 59 | sdk7786_fpga_base = sdk7786_fpga_probe(); |
25 | if (unlikely(!sdk7786_fpga_base)) { | 60 | if (unlikely(!sdk7786_fpga_base)) { |
26 | panic("FPGA remapping failed.\n"); | 61 | panic("FPGA detection failed.\n"); |
27 | return; | 62 | return; |
28 | } | 63 | } |
29 | 64 | ||
diff --git a/arch/sh/include/cpu-sh4/cpu/addrspace.h b/arch/sh/include/cpu-sh4/cpu/addrspace.h index a3fa733c1c7..d51da25da72 100644 --- a/arch/sh/include/cpu-sh4/cpu/addrspace.h +++ b/arch/sh/include/cpu-sh4/cpu/addrspace.h | |||
@@ -28,6 +28,15 @@ | |||
28 | #define P4SEG_TLB_DATA 0xf7000000 | 28 | #define P4SEG_TLB_DATA 0xf7000000 |
29 | #define P4SEG_REG_BASE 0xff000000 | 29 | #define P4SEG_REG_BASE 0xff000000 |
30 | 30 | ||
31 | #define PA_AREA0 0x00000000 | ||
32 | #define PA_AREA1 0x04000000 | ||
33 | #define PA_AREA2 0x08000000 | ||
34 | #define PA_AREA3 0x0c000000 | ||
35 | #define PA_AREA4 0x10000000 | ||
36 | #define PA_AREA5 0x14000000 | ||
37 | #define PA_AREA6 0x18000000 | ||
38 | #define PA_AREA7 0x1c000000 | ||
39 | |||
31 | #define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ | 40 | #define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ |
32 | #define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ | 41 | #define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ |
33 | 42 | ||
diff --git a/arch/sh/include/mach-sdk7786/mach/fpga.h b/arch/sh/include/mach-sdk7786/mach/fpga.h index a85d9853d34..2120d67dec7 100644 --- a/arch/sh/include/mach-sdk7786/mach/fpga.h +++ b/arch/sh/include/mach-sdk7786/mach/fpga.h | |||
@@ -6,6 +6,8 @@ | |||
6 | #include <linux/bitops.h> | 6 | #include <linux/bitops.h> |
7 | 7 | ||
8 | #define SRSTR 0x000 | 8 | #define SRSTR 0x000 |
9 | #define SRSTR_MAGIC 0x1971 /* Fixed magical read value */ | ||
10 | |||
9 | #define INTASR 0x010 | 11 | #define INTASR 0x010 |
10 | #define INTAMR 0x020 | 12 | #define INTAMR 0x020 |
11 | #define MODSWR 0x030 | 13 | #define MODSWR 0x030 |