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-rw-r--r--arch/powerpc/platforms/85xx/corenet_ds.c29
-rw-r--r--arch/powerpc/platforms/85xx/p4080_ds.c18
2 files changed, 17 insertions, 30 deletions
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c
index 2ab338c9ac3..10af3c793b3 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information) 4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 * 5 *
6 * Copyright 2009 Freescale Semiconductor Inc. 6 * Copyright 2009-2011 Freescale Semiconductor Inc.
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
@@ -61,10 +61,6 @@ void __init corenet_ds_pic_init(void)
61 mpic_init(mpic); 61 mpic_init(mpic);
62} 62}
63 63
64#ifdef CONFIG_PCI
65static int primary_phb_addr;
66#endif
67
68/* 64/*
69 * Setup the architecture 65 * Setup the architecture
70 */ 66 */
@@ -85,17 +81,14 @@ void __init corenet_ds_setup_arch(void)
85#endif 81#endif
86 82
87#ifdef CONFIG_PCI 83#ifdef CONFIG_PCI
88 for_each_compatible_node(np, "pci", "fsl,p4080-pcie") { 84 for_each_node_by_type(np, "pci") {
89 struct resource rsrc; 85 if (of_device_is_compatible(np, "fsl,p4080-pcie") ||
90 of_address_to_resource(np, 0, &rsrc); 86 of_device_is_compatible(np, "fsl,qoriq-pcie-v2.2")) {
91 if ((rsrc.start & 0xfffff) == primary_phb_addr)
92 fsl_add_bridge(np, 1);
93 else
94 fsl_add_bridge(np, 0); 87 fsl_add_bridge(np, 0);
95 88 hose = pci_find_hose_for_OF_device(np);
96 hose = pci_find_hose_for_OF_device(np); 89 max = min(max, hose->dma_window_base_cur +
97 max = min(max, hose->dma_window_base_cur + 90 hose->dma_window_size);
98 hose->dma_window_size); 91 }
99 } 92 }
100#endif 93#endif
101 94
@@ -116,6 +109,12 @@ static const struct of_device_id of_device_ids[] __devinitconst = {
116 { 109 {
117 .compatible = "fsl,rapidio-delta", 110 .compatible = "fsl,rapidio-delta",
118 }, 111 },
112 {
113 .compatible = "fsl,p4080-pcie",
114 },
115 {
116 .compatible = "fsl,qoriq-pcie-v2.2",
117 },
119 {} 118 {}
120}; 119};
121 120
diff --git a/arch/powerpc/platforms/85xx/p4080_ds.c b/arch/powerpc/platforms/85xx/p4080_ds.c
index 84170460497..ec8320c95f8 100644
--- a/arch/powerpc/platforms/85xx/p4080_ds.c
+++ b/arch/powerpc/platforms/85xx/p4080_ds.c
@@ -32,10 +32,6 @@
32 32
33#include "corenet_ds.h" 33#include "corenet_ds.h"
34 34
35#ifdef CONFIG_PCI
36static int primary_phb_addr;
37#endif
38
39/* 35/*
40 * Called very early, device-tree isn't unflattened 36 * Called very early, device-tree isn't unflattened
41 */ 37 */
@@ -43,17 +39,7 @@ static int __init p4080_ds_probe(void)
43{ 39{
44 unsigned long root = of_get_flat_dt_root(); 40 unsigned long root = of_get_flat_dt_root();
45 41
46 if (of_flat_dt_is_compatible(root, "fsl,P4080DS")) { 42 return of_flat_dt_is_compatible(root, "fsl,P4080DS");
47#ifdef CONFIG_PCI
48 /* treat PCIe1 as primary,
49 * shouldn't matter as we have no ISA on the board
50 */
51 primary_phb_addr = 0x0000;
52#endif
53 return 1;
54 } else {
55 return 0;
56 }
57} 43}
58 44
59define_machine(p4080_ds) { 45define_machine(p4080_ds) {
@@ -71,4 +57,6 @@ define_machine(p4080_ds) {
71}; 57};
72 58
73machine_device_initcall(p4080_ds, corenet_ds_publish_devices); 59machine_device_initcall(p4080_ds, corenet_ds_publish_devices);
60#ifdef CONFIG_SWIOTLB
74machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier); 61machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier);
62#endif