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-rw-r--r--arch/mips/Kbuild.platforms1
-rw-r--r--arch/mips/Kconfig19
-rw-r--r--arch/mips/configs/mipssim_defconfig64
-rw-r--r--arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h67
-rw-r--r--arch/mips/include/asm/mach-mipssim/war.h25
-rw-r--r--arch/mips/include/asm/mips-boards/simint.h31
-rw-r--r--arch/mips/mipssim/Makefile23
-rw-r--r--arch/mips/mipssim/Platform6
-rw-r--r--arch/mips/mipssim/sim_console.c40
-rw-r--r--arch/mips/mipssim/sim_int.c87
-rw-r--r--arch/mips/mipssim/sim_mem.c115
-rw-r--r--arch/mips/mipssim/sim_platform.c35
-rw-r--r--arch/mips/mipssim/sim_setup.c99
-rw-r--r--arch/mips/mipssim/sim_smtc.c116
-rw-r--r--arch/mips/mipssim/sim_time.c117
15 files changed, 0 insertions, 845 deletions
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index d64786d5e2f..0759dd2524b 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -15,7 +15,6 @@ platforms += lantiq
15platforms += lasat 15platforms += lasat
16platforms += loongson 16platforms += loongson
17platforms += loongson1 17platforms += loongson1
18platforms += mipssim
19platforms += mti-malta 18platforms += mti-malta
20platforms += netlogic 19platforms += netlogic
21platforms += pmc-sierra 20platforms += pmc-sierra
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 331d574df99..186a5cfac9b 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -319,25 +319,6 @@ config MIPS_MALTA
319 This enables support for the MIPS Technologies Malta evaluation 319 This enables support for the MIPS Technologies Malta evaluation
320 board. 320 board.
321 321
322config MIPS_SIM
323 bool 'MIPS simulator (MIPSsim)'
324 select CEVT_R4K
325 select CSRC_R4K
326 select DMA_NONCOHERENT
327 select SYS_HAS_EARLY_PRINTK
328 select IRQ_CPU
329 select BOOT_RAW
330 select SYS_HAS_CPU_MIPS32_R1
331 select SYS_HAS_CPU_MIPS32_R2
332 select SYS_HAS_EARLY_PRINTK
333 select SYS_SUPPORTS_32BIT_KERNEL
334 select SYS_SUPPORTS_BIG_ENDIAN
335 select SYS_SUPPORTS_MULTITHREADING
336 select SYS_SUPPORTS_LITTLE_ENDIAN
337 help
338 This option enables support for MIPS Technologies MIPSsim software
339 emulator.
340
341config NEC_MARKEINS 322config NEC_MARKEINS
342 bool "NEC EMMA2RH Mark-eins board" 323 bool "NEC EMMA2RH Mark-eins board"
343 select SOC_EMMA2RH 324 select SOC_EMMA2RH
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig
deleted file mode 100644
index b5ad7387bbb..00000000000
--- a/arch/mips/configs/mipssim_defconfig
+++ /dev/null
@@ -1,64 +0,0 @@
1CONFIG_MIPS_SIM=y
2CONFIG_CPU_LITTLE_ENDIAN=y
3CONFIG_HZ_100=y
4# CONFIG_SECCOMP is not set
5CONFIG_EXPERIMENTAL=y
6# CONFIG_SWAP is not set
7CONFIG_SYSVIPC=y
8CONFIG_LOG_BUF_SHIFT=14
9# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
10CONFIG_EXPERT=y
11CONFIG_SLAB=y
12CONFIG_MODULES=y
13CONFIG_MODULE_UNLOAD=y
14CONFIG_MODVERSIONS=y
15CONFIG_MODULE_SRCVERSION_ALL=y
16# CONFIG_BLK_DEV_BSG is not set
17CONFIG_NET=y
18CONFIG_PACKET=y
19CONFIG_UNIX=y
20CONFIG_INET=y
21CONFIG_IP_MULTICAST=y
22CONFIG_IP_ADVANCED_ROUTER=y
23CONFIG_IP_PNP=y
24CONFIG_IP_PNP_DHCP=y
25CONFIG_IP_PNP_BOOTP=y
26# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
27# CONFIG_INET_XFRM_MODE_TUNNEL is not set
28# CONFIG_INET_XFRM_MODE_BEET is not set
29# CONFIG_INET_LRO is not set
30# CONFIG_IPV6 is not set
31CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
32# CONFIG_STANDALONE is not set
33# CONFIG_PREVENT_FIRMWARE_BUILD is not set
34# CONFIG_FW_LOADER is not set
35CONFIG_BLK_DEV_LOOP=y
36CONFIG_BLK_DEV_NBD=y
37# CONFIG_MISC_DEVICES is not set
38CONFIG_NETDEVICES=y
39CONFIG_NET_ETHERNET=y
40CONFIG_MIPS_SIM_NET=y
41# CONFIG_NETDEV_1000 is not set
42# CONFIG_NETDEV_10000 is not set
43# CONFIG_INPUT is not set
44# CONFIG_SERIO is not set
45# CONFIG_VT is not set
46CONFIG_SERIAL_8250=y
47CONFIG_SERIAL_8250_CONSOLE=y
48CONFIG_SERIAL_8250_NR_UARTS=1
49CONFIG_SERIAL_8250_RUNTIME_UARTS=1
50# CONFIG_HW_RANDOM is not set
51# CONFIG_HWMON is not set
52# CONFIG_USB_SUPPORT is not set
53# CONFIG_DNOTIFY is not set
54CONFIG_TMPFS=y
55CONFIG_ROMFS_FS=y
56CONFIG_NFS_FS=y
57CONFIG_NFS_V3=y
58CONFIG_ROOT_NFS=y
59CONFIG_DEBUG_KERNEL=y
60# CONFIG_SCHED_DEBUG is not set
61CONFIG_DEBUG_INFO=y
62CONFIG_CMDLINE_BOOL=y
63CONFIG_CMDLINE="nfsroot=192.168.192.169:/u1/mipsel,timeo=20 ip=dhcp"
64# CONFIG_CRC32 is not set
diff --git a/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h b/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
deleted file mode 100644
index 27aaaa5d925..00000000000
--- a/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003, 2004 Chris Dearman
7 */
8#ifndef __ASM_MACH_SIM_CPU_FEATURE_OVERRIDES_H
9#define __ASM_MACH_SIM_CPU_FEATURE_OVERRIDES_H
10
11
12/*
13 * CPU feature overrides for MIPS boards
14 */
15#ifdef CONFIG_CPU_MIPS32
16#define cpu_has_tlb 1
17#define cpu_has_4kex 1
18#define cpu_has_4k_cache 1
19#define cpu_has_fpu 0
20/* #define cpu_has_32fpr ? */
21#define cpu_has_counter 1
22/* #define cpu_has_watch ? */
23#define cpu_has_divec 1
24#define cpu_has_vce 0
25/* #define cpu_has_cache_cdex_p ? */
26/* #define cpu_has_cache_cdex_s ? */
27/* #define cpu_has_prefetch ? */
28#define cpu_has_mcheck 1
29/* #define cpu_has_ejtag ? */
30#define cpu_has_llsc 1
31/* #define cpu_has_vtag_icache ? */
32/* #define cpu_has_dc_aliases ? */
33/* #define cpu_has_ic_fills_f_dc ? */
34#define cpu_has_clo_clz 1
35#define cpu_has_nofpuex 0
36/* #define cpu_has_64bits ? */
37/* #define cpu_has_64bit_zero_reg ? */
38/* #define cpu_has_inclusive_pcaches ? */
39#endif
40
41#ifdef CONFIG_CPU_MIPS64
42#define cpu_has_tlb 1
43#define cpu_has_4kex 1
44#define cpu_has_4k_cache 1
45/* #define cpu_has_fpu ? */
46/* #define cpu_has_32fpr ? */
47#define cpu_has_counter 1
48/* #define cpu_has_watch ? */
49#define cpu_has_divec 1
50#define cpu_has_vce 0
51/* #define cpu_has_cache_cdex_p ? */
52/* #define cpu_has_cache_cdex_s ? */
53/* #define cpu_has_prefetch ? */
54#define cpu_has_mcheck 1
55/* #define cpu_has_ejtag ? */
56#define cpu_has_llsc 1
57/* #define cpu_has_vtag_icache ? */
58/* #define cpu_has_dc_aliases ? */
59/* #define cpu_has_ic_fills_f_dc ? */
60#define cpu_has_clo_clz 1
61#define cpu_has_nofpuex 0
62/* #define cpu_has_64bits ? */
63/* #define cpu_has_64bit_zero_reg ? */
64/* #define cpu_has_inclusive_pcaches ? */
65#endif
66
67#endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/mach-mipssim/war.h b/arch/mips/include/asm/mach-mipssim/war.h
deleted file mode 100644
index c8a74a3515e..00000000000
--- a/arch/mips/include/asm/mach-mipssim/war.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_MIPSSIM_WAR_H
9#define __ASM_MIPS_MACH_MIPSSIM_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_MIPSSIM_WAR_H */
diff --git a/arch/mips/include/asm/mips-boards/simint.h b/arch/mips/include/asm/mips-boards/simint.h
deleted file mode 100644
index 8ef6db76d5c..00000000000
--- a/arch/mips/include/asm/mips-boards/simint.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 */
17#ifndef _MIPS_SIMINT_H
18#define _MIPS_SIMINT_H
19
20#include <irq.h>
21
22#define SIM_INT_BASE 0
23#define MIPSCPU_INT_MB0 2
24#define MIPS_CPU_TIMER_IRQ 7
25
26
27#define MSC01E_INT_BASE 64
28
29#define MSC01E_INT_CPUCTR 11
30
31#endif
diff --git a/arch/mips/mipssim/Makefile b/arch/mips/mipssim/Makefile
deleted file mode 100644
index 01410a3f172..00000000000
--- a/arch/mips/mipssim/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
1#
2# Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
3# Copyright (C) 2007 MIPS Technologies, Inc.
4# written by Ralf Baechle (ralf@linux-mips.org)
5#
6# This program is free software; you can distribute it and/or modify it
7# under the terms of the GNU General Public License (Version 2) as
8# published by the Free Software Foundation.
9#
10# This program is distributed in the hope it will be useful, but WITHOUT
11# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13# for more details.
14#
15# You should have received a copy of the GNU General Public License along
16# with this program; if not, write to the Free Software Foundation, Inc.,
17# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18#
19
20obj-y := sim_platform.o sim_setup.o sim_mem.o sim_time.o sim_int.o
21
22obj-$(CONFIG_EARLY_PRINTK) += sim_console.o
23obj-$(CONFIG_MIPS_MT_SMTC) += sim_smtc.o
diff --git a/arch/mips/mipssim/Platform b/arch/mips/mipssim/Platform
deleted file mode 100644
index 3df60b8a12e..00000000000
--- a/arch/mips/mipssim/Platform
+++ /dev/null
@@ -1,6 +0,0 @@
1#
2# MIPS SIM
3#
4platform-$(CONFIG_MIPS_SIM) += mipssim/
5cflags-$(CONFIG_MIPS_SIM) += -I$(srctree)/arch/mips/include/asm/mach-mipssim
6load-$(CONFIG_MIPS_SIM) += 0x80100000
diff --git a/arch/mips/mipssim/sim_console.c b/arch/mips/mipssim/sim_console.c
deleted file mode 100644
index a2f41672cd5..00000000000
--- a/arch/mips/mipssim/sim_console.c
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * This program is free software; you can distribute it and/or modify it
3 * under the terms of the GNU General Public License (Version 2) as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope it will be useful, but WITHOUT
7 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
9 * for more details.
10 *
11 * You should have received a copy of the GNU General Public License along
12 * with this program; if not, write to the Free Software Foundation, Inc.,
13 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
14 *
15 * Carsten Langgaard, carstenl@mips.com
16 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
17 * Copyright (C) 2007 MIPS Technologies, Inc.
18 * written by Ralf Baechle
19 */
20#include <linux/init.h>
21#include <linux/io.h>
22#include <linux/serial_reg.h>
23
24static inline unsigned int serial_in(int offset)
25{
26 return inb(0x3f8 + offset);
27}
28
29static inline void serial_out(int offset, int value)
30{
31 outb(value, 0x3f8 + offset);
32}
33
34void __init prom_putchar(char c)
35{
36 while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0)
37 ;
38
39 serial_out(UART_TX, c);
40}
diff --git a/arch/mips/mipssim/sim_int.c b/arch/mips/mipssim/sim_int.c
deleted file mode 100644
index 5c779be6f08..00000000000
--- a/arch/mips/mipssim/sim_int.c
+++ /dev/null
@@ -1,87 +0,0 @@
1/*
2 * Copyright (C) 1999, 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 *
17 */
18#include <linux/init.h>
19#include <linux/sched.h>
20#include <linux/interrupt.h>
21#include <linux/kernel_stat.h>
22#include <asm/mips-boards/simint.h>
23#include <asm/irq_cpu.h>
24
25static inline int clz(unsigned long x)
26{
27 __asm__(
28 " .set push \n"
29 " .set mips32 \n"
30 " clz %0, %1 \n"
31 " .set pop \n"
32 : "=r" (x)
33 : "r" (x));
34
35 return x;
36}
37
38/*
39 * Version of ffs that only looks at bits 12..15.
40 */
41static inline unsigned int irq_ffs(unsigned int pending)
42{
43#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
44 return -clz(pending) + 31 - CAUSEB_IP;
45#else
46 unsigned int a0 = 7;
47 unsigned int t0;
48
49 t0 = s0 & 0xf000;
50 t0 = t0 < 1;
51 t0 = t0 << 2;
52 a0 = a0 - t0;
53 s0 = s0 << t0;
54
55 t0 = s0 & 0xc000;
56 t0 = t0 < 1;
57 t0 = t0 << 1;
58 a0 = a0 - t0;
59 s0 = s0 << t0;
60
61 t0 = s0 & 0x8000;
62 t0 = t0 < 1;
63 /* t0 = t0 << 2; */
64 a0 = a0 - t0;
65 /* s0 = s0 << t0; */
66
67 return a0;
68#endif
69}
70
71asmlinkage void plat_irq_dispatch(void)
72{
73 unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
74 int irq;
75
76 irq = irq_ffs(pending);
77
78 if (irq > 0)
79 do_IRQ(MIPS_CPU_IRQ_BASE + irq);
80 else
81 spurious_interrupt();
82}
83
84void __init arch_init_irq(void)
85{
86 mips_cpu_irq_init();
87}
diff --git a/arch/mips/mipssim/sim_mem.c b/arch/mips/mipssim/sim_mem.c
deleted file mode 100644
index 953d836a771..00000000000
--- a/arch/mips/mipssim/sim_mem.c
+++ /dev/null
@@ -1,115 +0,0 @@
1/*
2 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 *
17 */
18#include <linux/init.h>
19#include <linux/mm.h>
20#include <linux/bootmem.h>
21#include <linux/pfn.h>
22
23#include <asm/bootinfo.h>
24#include <asm/page.h>
25#include <asm/sections.h>
26
27#include <asm/mips-boards/prom.h>
28
29/*#define DEBUG*/
30
31enum simmem_memtypes {
32 simmem_reserved = 0,
33 simmem_free,
34};
35struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
36
37#ifdef DEBUG
38static char *mtypes[3] = {
39 "SIM reserved memory",
40 "SIM free memory",
41};
42#endif
43
44struct prom_pmemblock * __init prom_getmdesc(void)
45{
46 unsigned int memsize;
47
48 memsize = 0x02000000;
49 pr_info("Setting default memory size 0x%08x\n", memsize);
50
51 memset(mdesc, 0, sizeof(mdesc));
52
53 mdesc[0].type = simmem_reserved;
54 mdesc[0].base = 0x00000000;
55 mdesc[0].size = 0x00001000;
56
57 mdesc[1].type = simmem_free;
58 mdesc[1].base = 0x00001000;
59 mdesc[1].size = 0x000ff000;
60
61 mdesc[2].type = simmem_reserved;
62 mdesc[2].base = 0x00100000;
63 mdesc[2].size = CPHYSADDR(PFN_ALIGN(&_end)) - mdesc[2].base;
64
65 mdesc[3].type = simmem_free;
66 mdesc[3].base = CPHYSADDR(PFN_ALIGN(&_end));
67 mdesc[3].size = memsize - mdesc[3].base;
68
69 return &mdesc[0];
70}
71
72static int __init prom_memtype_classify(unsigned int type)
73{
74 switch (type) {
75 case simmem_free:
76 return BOOT_MEM_RAM;
77 case simmem_reserved:
78 default:
79 return BOOT_MEM_RESERVED;
80 }
81}
82
83void __init prom_meminit(void)
84{
85 struct prom_pmemblock *p;
86
87 p = prom_getmdesc();
88
89 while (p->size) {
90 long type;
91 unsigned long base, size;
92
93 type = prom_memtype_classify(p->type);
94 base = p->base;
95 size = p->size;
96
97 add_memory_region(base, size, type);
98 p++;
99 }
100}
101
102void __init prom_free_prom_memory(void)
103{
104 int i;
105 unsigned long addr;
106
107 for (i = 0; i < boot_mem_map.nr_map; i++) {
108 if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
109 continue;
110
111 addr = boot_mem_map.map[i].addr;
112 free_init_pages("prom memory",
113 addr, addr + boot_mem_map.map[i].size);
114 }
115}
diff --git a/arch/mips/mipssim/sim_platform.c b/arch/mips/mipssim/sim_platform.c
deleted file mode 100644
index 53210a8c5de..00000000000
--- a/arch/mips/mipssim/sim_platform.c
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 by Ralf Baechle (ralf@linux-mips.org)
7 */
8#include <linux/init.h>
9#include <linux/if_ether.h>
10#include <linux/kernel.h>
11#include <linux/platform_device.h>
12
13static char mipsnet_string[] = "mipsnet";
14
15static struct platform_device eth1_device = {
16 .name = mipsnet_string,
17 .id = 0,
18};
19
20/*
21 * Create a platform device for the GPI port that receives the
22 * image data from the embedded camera.
23 */
24static int __init mipsnet_devinit(void)
25{
26 int err;
27
28 err = platform_device_register(&eth1_device);
29 if (err)
30 printk(KERN_ERR "%s: registration failed\n", mipsnet_string);
31
32 return err;
33}
34
35device_initcall(mipsnet_devinit);
diff --git a/arch/mips/mipssim/sim_setup.c b/arch/mips/mipssim/sim_setup.c
deleted file mode 100644
index 256e0cdaa49..00000000000
--- a/arch/mips/mipssim/sim_setup.c
+++ /dev/null
@@ -1,99 +0,0 @@
1/*
2 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 *
17 */
18
19#include <linux/init.h>
20#include <linux/string.h>
21#include <linux/kernel.h>
22#include <linux/io.h>
23#include <linux/irq.h>
24#include <linux/ioport.h>
25#include <linux/tty.h>
26#include <linux/serial.h>
27#include <linux/serial_core.h>
28#include <linux/serial_8250.h>
29
30#include <asm/cpu.h>
31#include <asm/bootinfo.h>
32#include <asm/mips-boards/generic.h>
33#include <asm/mips-boards/prom.h>
34#include <asm/time.h>
35#include <asm/mips-boards/sim.h>
36#include <asm/mips-boards/simint.h>
37#include <asm/smp-ops.h>
38
39
40static void __init serial_init(void);
41unsigned int _isbonito;
42
43const char *get_system_type(void)
44{
45 return "MIPSsim";
46}
47
48void __init plat_mem_setup(void)
49{
50 set_io_port_base(0xbfd00000);
51
52 serial_init();
53}
54
55extern struct plat_smp_ops ssmtc_smp_ops;
56
57void __init prom_init(void)
58{
59 set_io_port_base(0xbfd00000);
60
61 prom_meminit();
62
63 if (cpu_has_mipsmt) {
64 if (!register_vsmp_smp_ops())
65 return;
66
67#ifdef CONFIG_MIPS_MT_SMTC
68 register_smp_ops(&ssmtc_smp_ops);
69 return;
70#endif
71 }
72
73 register_up_smp_ops();
74}
75
76static void __init serial_init(void)
77{
78#ifdef CONFIG_SERIAL_8250
79 struct uart_port s;
80
81 memset(&s, 0, sizeof(s));
82
83 s.iobase = 0x3f8;
84
85 /* hardware int 4 - the serial int, is CPU int 6
86 but poll for now */
87 s.irq = 0;
88 s.uartclk = 1843200;
89 s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
90 s.iotype = UPIO_PORT;
91 s.regshift = 0;
92 s.timeout = 4;
93
94 if (early_serial_setup(&s) != 0) {
95 printk(KERN_ERR "Serial setup failed!\n");
96 }
97
98#endif
99}
diff --git a/arch/mips/mipssim/sim_smtc.c b/arch/mips/mipssim/sim_smtc.c
deleted file mode 100644
index 3c104abd8aa..00000000000
--- a/arch/mips/mipssim/sim_smtc.c
+++ /dev/null
@@ -1,116 +0,0 @@
1/*
2 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 *
17 */
18/*
19 * Simulator Platform-specific hooks for SMTC operation
20 */
21#include <linux/kernel.h>
22#include <linux/sched.h>
23#include <linux/cpumask.h>
24#include <linux/interrupt.h>
25#include <linux/smp.h>
26
27#include <linux/atomic.h>
28#include <asm/cpu.h>
29#include <asm/processor.h>
30#include <asm/smtc.h>
31#include <asm/mmu_context.h>
32#include <asm/smtc_ipi.h>
33
34/* VPE/SMP Prototype implements platform interfaces directly */
35
36/*
37 * Cause the specified action to be performed on a targeted "CPU"
38 */
39
40static void ssmtc_send_ipi_single(int cpu, unsigned int action)
41{
42 smtc_send_ipi(cpu, LINUX_SMP_IPI, action);
43 /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */
44}
45
46static inline void ssmtc_send_ipi_mask(const struct cpumask *mask,
47 unsigned int action)
48{
49 unsigned int i;
50
51 for_each_cpu(i, mask)
52 ssmtc_send_ipi_single(i, action);
53}
54
55/*
56 * Post-config but pre-boot cleanup entry point
57 */
58static void __cpuinit ssmtc_init_secondary(void)
59{
60 smtc_init_secondary();
61}
62
63/*
64 * SMP initialization finalization entry point
65 */
66static void __cpuinit ssmtc_smp_finish(void)
67{
68 smtc_smp_finish();
69}
70
71/*
72 * Hook for after all CPUs are online
73 */
74static void ssmtc_cpus_done(void)
75{
76}
77
78/*
79 * Platform "CPU" startup hook
80 */
81static void __cpuinit ssmtc_boot_secondary(int cpu, struct task_struct *idle)
82{
83 smtc_boot_secondary(cpu, idle);
84}
85
86static void __init ssmtc_smp_setup(void)
87{
88 if (read_c0_config3() & (1 << 2))
89 mipsmt_build_cpu_map(0);
90}
91
92/*
93 * Platform SMP pre-initialization
94 */
95static void ssmtc_prepare_cpus(unsigned int max_cpus)
96{
97 /*
98 * As noted above, we can assume a single CPU for now
99 * but it may be multithreaded.
100 */
101
102 if (read_c0_config3() & (1 << 2)) {
103 mipsmt_prepare_cpus();
104 }
105}
106
107struct plat_smp_ops ssmtc_smp_ops = {
108 .send_ipi_single = ssmtc_send_ipi_single,
109 .send_ipi_mask = ssmtc_send_ipi_mask,
110 .init_secondary = ssmtc_init_secondary,
111 .smp_finish = ssmtc_smp_finish,
112 .cpus_done = ssmtc_cpus_done,
113 .boot_secondary = ssmtc_boot_secondary,
114 .smp_setup = ssmtc_smp_setup,
115 .prepare_cpus = ssmtc_prepare_cpus,
116};
diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c
deleted file mode 100644
index 77bad3c0428..00000000000
--- a/arch/mips/mipssim/sim_time.c
+++ /dev/null
@@ -1,117 +0,0 @@
1#include <linux/types.h>
2#include <linux/init.h>
3#include <linux/kernel_stat.h>
4#include <linux/sched.h>
5#include <linux/spinlock.h>
6#include <linux/interrupt.h>
7#include <linux/mc146818rtc.h>
8#include <linux/smp.h>
9#include <linux/timex.h>
10
11#include <asm/hardirq.h>
12#include <asm/div64.h>
13#include <asm/cpu.h>
14#include <asm/setup.h>
15#include <asm/time.h>
16#include <asm/irq.h>
17#include <asm/mc146818-time.h>
18#include <asm/msc01_ic.h>
19
20#include <asm/mips-boards/generic.h>
21#include <asm/mips-boards/prom.h>
22#include <asm/mips-boards/simint.h>
23
24
25unsigned long cpu_khz;
26
27/*
28 * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect
29 */
30static unsigned int __init estimate_cpu_frequency(void)
31{
32 unsigned int prid = read_c0_prid() & 0xffff00;
33 unsigned int count;
34
35#if 1
36 /*
37 * hardwire the board frequency to 12MHz.
38 */
39
40 if ((prid == (PRID_COMP_MIPS | PRID_IMP_20KC)) ||
41 (prid == (PRID_COMP_MIPS | PRID_IMP_25KF)))
42 count = 12000000;
43 else
44 count = 6000000;
45#else
46 unsigned int flags;
47
48 local_irq_save(flags);
49
50 /* Start counter exactly on falling edge of update flag */
51 while (CMOS_READ(RTC_REG_A) & RTC_UIP);
52 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
53
54 /* Start r4k counter. */
55 write_c0_count(0);
56
57 /* Read counter exactly on falling edge of update flag */
58 while (CMOS_READ(RTC_REG_A) & RTC_UIP);
59 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
60
61 count = read_c0_count();
62
63 /* restore interrupts */
64 local_irq_restore(flags);
65#endif
66
67 mips_hpt_frequency = count;
68
69 if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
70 (prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
71 count *= 2;
72
73 count += 5000; /* round */
74 count -= count%10000;
75
76 return count;
77}
78
79static int mips_cpu_timer_irq;
80
81static void mips_timer_dispatch(void)
82{
83 do_IRQ(mips_cpu_timer_irq);
84}
85
86
87unsigned __cpuinit get_c0_compare_int(void)
88{
89#ifdef MSC01E_INT_BASE
90 if (cpu_has_veic) {
91 set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
92 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
93
94 return mips_cpu_timer_irq;
95 }
96#endif
97 if (cpu_has_vint)
98 set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
99 mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
100
101 return mips_cpu_timer_irq;
102}
103
104void __init plat_time_init(void)
105{
106 unsigned int est_freq;
107
108 /* Set Data mode - binary. */
109 CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
110
111 est_freq = estimate_cpu_frequency();
112
113 printk(KERN_INFO "CPU frequency %d.%02d MHz\n", est_freq / 1000000,
114 (est_freq % 1000000) * 100 / 1000000);
115
116 cpu_khz = est_freq / 1000;
117}
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-20 16:20:48 -0400