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-rw-r--r--arch/arm/mach-exynos/clock-exynos4.c8
-rw-r--r--arch/arm/mach-exynos/dma.c22
-rw-r--r--arch/arm/mach-exynos/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h3
-rw-r--r--arch/arm/plat-samsung/include/plat/dma-pl330.h8
5 files changed, 42 insertions, 1 deletions
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index 31b59e65463..db5d1cce3d2 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -784,6 +784,13 @@ static struct clk exynos4_clk_pdma1 = {
784 .ctrlbit = (1 << 1), 784 .ctrlbit = (1 << 1),
785}; 785};
786 786
787static struct clk exynos4_clk_mdma1 = {
788 .name = "dma",
789 .devname = "dma-pl330.2",
790 .enable = exynos4_clk_ip_image_ctrl,
791 .ctrlbit = ((1 << 8) | (1 << 5) | (1 << 2)),
792};
793
787struct clk *exynos4_clkset_group_list[] = { 794struct clk *exynos4_clkset_group_list[] = {
788 [0] = &clk_ext_xtal_mux, 795 [0] = &clk_ext_xtal_mux,
789 [1] = &clk_xusbxti, 796 [1] = &clk_xusbxti,
@@ -1302,6 +1309,7 @@ static struct clksrc_clk *exynos4_sysclks[] = {
1302static struct clk *exynos4_clk_cdev[] = { 1309static struct clk *exynos4_clk_cdev[] = {
1303 &exynos4_clk_pdma0, 1310 &exynos4_clk_pdma0,
1304 &exynos4_clk_pdma1, 1311 &exynos4_clk_pdma1,
1312 &exynos4_clk_mdma1,
1305}; 1313};
1306 1314
1307static struct clksrc_clk *exynos4_clksrc_cdev[] = { 1315static struct clksrc_clk *exynos4_clksrc_cdev[] = {
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 25f3ef2c36e..17a2f908631 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -113,6 +113,25 @@ static struct dma_pl330_platdata exynos4_pdma1_pdata = {
113static AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, 113static AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330,
114 EXYNOS4_PA_PDMA1, {IRQ_PDMA1}, &exynos4_pdma1_pdata); 114 EXYNOS4_PA_PDMA1, {IRQ_PDMA1}, &exynos4_pdma1_pdata);
115 115
116static u8 mdma_peri[] = {
117 DMACH_MTOM_0,
118 DMACH_MTOM_1,
119 DMACH_MTOM_2,
120 DMACH_MTOM_3,
121 DMACH_MTOM_4,
122 DMACH_MTOM_5,
123 DMACH_MTOM_6,
124 DMACH_MTOM_7,
125};
126
127static struct dma_pl330_platdata exynos4_mdma1_pdata = {
128 .nr_valid_peri = ARRAY_SIZE(mdma_peri),
129 .peri_id = mdma_peri,
130};
131
132static AMBA_AHB_DEVICE(exynos4_mdma1, "dma-pl330.2", 0x00041330,
133 EXYNOS4_PA_MDMA1, {IRQ_MDMA1}, &exynos4_mdma1_pdata);
134
116static int __init exynos4_dma_init(void) 135static int __init exynos4_dma_init(void)
117{ 136{
118 if (of_have_populated_dt()) 137 if (of_have_populated_dt())
@@ -126,6 +145,9 @@ static int __init exynos4_dma_init(void)
126 dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); 145 dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
127 amba_device_register(&exynos4_pdma1_device, &iomem_resource); 146 amba_device_register(&exynos4_pdma1_device, &iomem_resource);
128 147
148 dma_cap_set(DMA_MEMCPY, exynos4_mdma1_pdata.cap_mask);
149 amba_device_register(&exynos4_mdma1_device, &iomem_resource);
150
129 return 0; 151 return 0;
130} 152}
131arch_initcall(exynos4_dma_init); 153arch_initcall(exynos4_dma_init);
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index f77bce04789..1d401c95783 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -43,6 +43,8 @@
43#define IRQ_EINT15 IRQ_SPI(31) 43#define IRQ_EINT15 IRQ_SPI(31)
44#define IRQ_EINT16_31 IRQ_SPI(32) 44#define IRQ_EINT16_31 IRQ_SPI(32)
45 45
46#define IRQ_MDMA0 IRQ_SPI(33)
47#define IRQ_MDMA1 IRQ_SPI(34)
46#define IRQ_PDMA0 IRQ_SPI(35) 48#define IRQ_PDMA0 IRQ_SPI(35)
47#define IRQ_PDMA1 IRQ_SPI(36) 49#define IRQ_PDMA1 IRQ_SPI(36)
48#define IRQ_TIMER0_VIC IRQ_SPI(37) 50#define IRQ_TIMER0_VIC IRQ_SPI(37)
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index c754a22a2bb..2ad4e9cfe49 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -67,7 +67,8 @@
67#define EXYNOS4_PA_TWD 0x10500600 67#define EXYNOS4_PA_TWD 0x10500600
68#define EXYNOS4_PA_L2CC 0x10502000 68#define EXYNOS4_PA_L2CC 0x10502000
69 69
70#define EXYNOS4_PA_MDMA 0x10810000 70#define EXYNOS4_PA_MDMA0 0x10810000
71#define EXYNOS4_PA_MDMA1 0x12840000
71#define EXYNOS4_PA_PDMA0 0x12680000 72#define EXYNOS4_PA_PDMA0 0x12680000
72#define EXYNOS4_PA_PDMA1 0x12690000 73#define EXYNOS4_PA_PDMA1 0x12690000
73 74
diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h
index c5eaad529de..ecf23a830e7 100644
--- a/arch/arm/plat-samsung/include/plat/dma-pl330.h
+++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h
@@ -82,6 +82,14 @@ enum dma_ch {
82 DMACH_SLIMBUS4_TX, 82 DMACH_SLIMBUS4_TX,
83 DMACH_SLIMBUS5_RX, 83 DMACH_SLIMBUS5_RX,
84 DMACH_SLIMBUS5_TX, 84 DMACH_SLIMBUS5_TX,
85 DMACH_MTOM_0,
86 DMACH_MTOM_1,
87 DMACH_MTOM_2,
88 DMACH_MTOM_3,
89 DMACH_MTOM_4,
90 DMACH_MTOM_5,
91 DMACH_MTOM_6,
92 DMACH_MTOM_7,
85 /* END Marker, also used to denote a reserved channel */ 93 /* END Marker, also used to denote a reserved channel */
86 DMACH_MAX, 94 DMACH_MAX,
87}; 95};