aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--Documentation/DMA-API-HOWTO.txt126
-rw-r--r--Documentation/DMA-API.txt12
-rw-r--r--arch/arm/include/asm/dma-mapping.h1
-rw-r--r--arch/arm/mach-omap2/Makefile2
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c22
-rw-r--r--arch/arm/mach-omap2/devices.c4
-rw-r--r--arch/arm/mach-omap2/omap-iommu.c169
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c6
-rw-r--r--arch/arm/plat-omap/include/plat/iommu2.h96
-rw-r--r--arch/arm/plat-omap/include/plat/iovmm.h89
-rw-r--r--arch/arm64/include/asm/dma-mapping.h1
-rw-r--r--arch/c6x/include/asm/dma-mapping.h1
-rw-r--r--arch/ia64/include/asm/dma-mapping.h1
-rw-r--r--arch/microblaze/include/asm/dma-mapping.h2
-rw-r--r--arch/mips/include/asm/dma-mapping.h2
-rw-r--r--arch/powerpc/include/asm/dma-mapping.h1
-rw-r--r--arch/sh/include/asm/dma-mapping.h1
-rw-r--r--arch/sparc/include/asm/dma-mapping.h1
-rw-r--r--arch/tile/include/asm/dma-mapping.h1
-rw-r--r--arch/x86/include/asm/dma-mapping.h1
-rw-r--r--drivers/iommu/Makefile1
-rw-r--r--drivers/iommu/amd_iommu.c196
-rw-r--r--drivers/iommu/amd_iommu_types.h1
-rw-r--r--drivers/iommu/intel-iommu.c31
-rw-r--r--drivers/iommu/omap-iommu-debug.c8
-rw-r--r--drivers/iommu/omap-iommu.c107
-rw-r--r--drivers/iommu/omap-iommu.h (renamed from arch/arm/plat-omap/include/plat/iommu.h)132
-rw-r--r--drivers/iommu/omap-iommu2.c (renamed from arch/arm/mach-omap2/iommu2.c)47
-rw-r--r--drivers/iommu/omap-iopgtable.h (renamed from arch/arm/plat-omap/include/plat/iopgtable.h)22
-rw-r--r--drivers/iommu/omap-iovmm.c50
-rw-r--r--drivers/iommu/tegra-gart.c2
-rw-r--r--drivers/iommu/tegra-smmu.c6
-rw-r--r--drivers/media/platform/omap3isp/isp.c1
-rw-r--r--drivers/media/platform/omap3isp/isp.h4
-rw-r--r--drivers/media/platform/omap3isp/ispccdc.c1
-rw-r--r--drivers/media/platform/omap3isp/ispstat.c1
-rw-r--r--drivers/media/platform/omap3isp/ispvideo.c3
-rw-r--r--include/linux/dma-debug.h7
-rw-r--r--include/linux/omap-iommu.h52
-rw-r--r--include/linux/platform_data/iommu-omap.h54
-rw-r--r--lib/dma-debug.c66
42 files changed, 752 insertions, 581 deletions
diff --git a/Documentation/DMA-API-HOWTO.txt b/Documentation/DMA-API-HOWTO.txt
index a0b6250add7..4a4fb295cee 100644
--- a/Documentation/DMA-API-HOWTO.txt
+++ b/Documentation/DMA-API-HOWTO.txt
@@ -468,11 +468,46 @@ To map a single region, you do:
468 size_t size = buffer->len; 468 size_t size = buffer->len;
469 469
470 dma_handle = dma_map_single(dev, addr, size, direction); 470 dma_handle = dma_map_single(dev, addr, size, direction);
471 if (dma_mapping_error(dma_handle)) {
472 /*
473 * reduce current DMA mapping usage,
474 * delay and try again later or
475 * reset driver.
476 */
477 goto map_error_handling;
478 }
471 479
472and to unmap it: 480and to unmap it:
473 481
474 dma_unmap_single(dev, dma_handle, size, direction); 482 dma_unmap_single(dev, dma_handle, size, direction);
475 483
484You should call dma_mapping_error() as dma_map_single() could fail and return
485error. Not all dma implementations support dma_mapping_error() interface.
486However, it is a good practice to call dma_mapping_error() interface, which
487will invoke the generic mapping error check interface. Doing so will ensure
488that the mapping code will work correctly on all dma implementations without
489any dependency on the specifics of the underlying implementation. Using the
490returned address without checking for errors could result in failures ranging
491from panics to silent data corruption. Couple of example of incorrect ways to
492check for errors that make assumptions about the underlying dma implementation
493are as follows and these are applicable to dma_map_page() as well.
494
495Incorrect example 1:
496 dma_addr_t dma_handle;
497
498 dma_handle = dma_map_single(dev, addr, size, direction);
499 if ((dma_handle & 0xffff != 0) || (dma_handle >= 0x1000000)) {
500 goto map_error;
501 }
502
503Incorrect example 2:
504 dma_addr_t dma_handle;
505
506 dma_handle = dma_map_single(dev, addr, size, direction);
507 if (dma_handle == DMA_ERROR_CODE) {
508 goto map_error;
509 }
510
476You should call dma_unmap_single when the DMA activity is finished, e.g. 511You should call dma_unmap_single when the DMA activity is finished, e.g.
477from the interrupt which told you that the DMA transfer is done. 512from the interrupt which told you that the DMA transfer is done.
478 513
@@ -489,6 +524,14 @@ Specifically:
489 size_t size = buffer->len; 524 size_t size = buffer->len;
490 525
491 dma_handle = dma_map_page(dev, page, offset, size, direction); 526 dma_handle = dma_map_page(dev, page, offset, size, direction);
527 if (dma_mapping_error(dma_handle)) {
528 /*
529 * reduce current DMA mapping usage,
530 * delay and try again later or
531 * reset driver.
532 */
533 goto map_error_handling;
534 }
492 535
493 ... 536 ...
494 537
@@ -496,6 +539,12 @@ Specifically:
496 539
497Here, "offset" means byte offset within the given page. 540Here, "offset" means byte offset within the given page.
498 541
542You should call dma_mapping_error() as dma_map_page() could fail and return
543error as outlined under the dma_map_single() discussion.
544
545You should call dma_unmap_page when the DMA activity is finished, e.g.
546from the interrupt which told you that the DMA transfer is done.
547
499With scatterlists, you map a region gathered from several regions by: 548With scatterlists, you map a region gathered from several regions by:
500 549
501 int i, count = dma_map_sg(dev, sglist, nents, direction); 550 int i, count = dma_map_sg(dev, sglist, nents, direction);
@@ -578,6 +627,14 @@ to use the dma_sync_*() interfaces.
578 dma_addr_t mapping; 627 dma_addr_t mapping;
579 628
580 mapping = dma_map_single(cp->dev, buffer, len, DMA_FROM_DEVICE); 629 mapping = dma_map_single(cp->dev, buffer, len, DMA_FROM_DEVICE);
630 if (dma_mapping_error(dma_handle)) {
631 /*
632 * reduce current DMA mapping usage,
633 * delay and try again later or
634 * reset driver.
635 */
636 goto map_error_handling;
637 }
581 638
582 cp->rx_buf = buffer; 639 cp->rx_buf = buffer;
583 cp->rx_len = len; 640 cp->rx_len = len;
@@ -658,6 +715,75 @@ failure can be determined by:
658 * delay and try again later or 715 * delay and try again later or
659 * reset driver. 716 * reset driver.
660 */ 717 */
718 goto map_error_handling;
719 }
720
721- unmap pages that are already mapped, when mapping error occurs in the middle
722 of a multiple page mapping attempt. These example are applicable to
723 dma_map_page() as well.
724
725Example 1:
726 dma_addr_t dma_handle1;
727 dma_addr_t dma_handle2;
728
729 dma_handle1 = dma_map_single(dev, addr, size, direction);
730 if (dma_mapping_error(dev, dma_handle1)) {
731 /*
732 * reduce current DMA mapping usage,
733 * delay and try again later or
734 * reset driver.
735 */
736 goto map_error_handling1;
737 }
738 dma_handle2 = dma_map_single(dev, addr, size, direction);
739 if (dma_mapping_error(dev, dma_handle2)) {
740 /*
741 * reduce current DMA mapping usage,
742 * delay and try again later or
743 * reset driver.
744 */
745 goto map_error_handling2;
746 }
747
748 ...
749
750 map_error_handling2:
751 dma_unmap_single(dma_handle1);
752 map_error_handling1:
753
754Example 2: (if buffers are allocated a loop, unmap all mapped buffers when
755 mapping error is detected in the middle)
756
757 dma_addr_t dma_addr;
758 dma_addr_t array[DMA_BUFFERS];
759 int save_index = 0;
760
761 for (i = 0; i < DMA_BUFFERS; i++) {
762
763 ...
764
765 dma_addr = dma_map_single(dev, addr, size, direction);
766 if (dma_mapping_error(dev, dma_addr)) {
767 /*
768 * reduce current DMA mapping usage,
769 * delay and try again later or
770 * reset driver.
771 */
772 goto map_error_handling;
773 }
774 array[i].dma_addr = dma_addr;
775 save_index++;
776 }
777
778 ...
779
780 map_error_handling:
781
782 for (i = 0; i < save_index; i++) {
783
784 ...
785
786 dma_unmap_single(array[i].dma_addr);
661 } 787 }
662 788
663Networking drivers must call dev_kfree_skb to free the socket buffer 789Networking drivers must call dev_kfree_skb to free the socket buffer
diff --git a/Documentation/DMA-API.txt b/Documentation/DMA-API.txt
index 66bd97a95f1..78a6c569d20 100644
--- a/Documentation/DMA-API.txt
+++ b/Documentation/DMA-API.txt
@@ -678,3 +678,15 @@ out of dma_debug_entries. These entries are preallocated at boot. The number
678of preallocated entries is defined per architecture. If it is too low for you 678of preallocated entries is defined per architecture. If it is too low for you
679boot with 'dma_debug_entries=<your_desired_number>' to overwrite the 679boot with 'dma_debug_entries=<your_desired_number>' to overwrite the
680architectural default. 680architectural default.
681
682void debug_dmap_mapping_error(struct device *dev, dma_addr_t dma_addr);
683
684dma-debug interface debug_dma_mapping_error() to debug drivers that fail
685to check dma mapping errors on addresses returned by dma_map_single() and
686dma_map_page() interfaces. This interface clears a flag set by
687debug_dma_map_page() to indicate that dma_mapping_error() has been called by
688the driver. When driver does unmap, debug_dma_unmap() checks the flag and if
689this flag is still set, prints warning message that includes call trace that
690leads up to the unmap. This interface can be called from dma_mapping_error()
691routines to enable dma mapping error check debugging.
692
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 23004847bb0..78d8e9b5544 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -91,6 +91,7 @@ static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
91 */ 91 */
92static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 92static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
93{ 93{
94 debug_dma_mapping_error(dev, dma_addr);
94 return dma_addr == DMA_ERROR_CODE; 95 return dma_addr == DMA_ERROR_CODE;
95} 96}
96 97
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index fe40d9e488c..d6721a7f4c3 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -184,8 +184,6 @@ obj-$(CONFIG_HW_PERF_EVENTS) += pmu.o
184obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o 184obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o
185mailbox_mach-objs := mailbox.o 185mailbox_mach-objs := mailbox.o
186 186
187obj-$(CONFIG_OMAP_IOMMU) += iommu2.o
188
189iommu-$(CONFIG_OMAP_IOMMU) := omap-iommu.o 187iommu-$(CONFIG_OMAP_IOMMU) := omap-iommu.o
190obj-y += $(iommu-m) $(iommu-y) 188obj-y += $(iommu-m) $(iommu-y)
191 189
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 6efc30c961a..067c486fe29 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1316,16 +1316,6 @@ static struct clk dmic_fck = {
1316 .clkdm_name = "abe_clkdm", 1316 .clkdm_name = "abe_clkdm",
1317}; 1317};
1318 1318
1319static struct clk dsp_fck = {
1320 .name = "dsp_fck",
1321 .ops = &clkops_omap2_dflt,
1322 .enable_reg = OMAP4430_CM_TESLA_TESLA_CLKCTRL,
1323 .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
1324 .clkdm_name = "tesla_clkdm",
1325 .parent = &dpll_iva_m4x2_ck,
1326 .recalc = &followparent_recalc,
1327};
1328
1329static struct clk dss_sys_clk = { 1319static struct clk dss_sys_clk = {
1330 .name = "dss_sys_clk", 1320 .name = "dss_sys_clk",
1331 .ops = &clkops_omap2_dflt, 1321 .ops = &clkops_omap2_dflt,
@@ -1696,16 +1686,6 @@ static struct clk i2c4_fck = {
1696 .recalc = &followparent_recalc, 1686 .recalc = &followparent_recalc,
1697}; 1687};
1698 1688
1699static struct clk ipu_fck = {
1700 .name = "ipu_fck",
1701 .ops = &clkops_omap2_dflt,
1702 .enable_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL,
1703 .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
1704 .clkdm_name = "ducati_clkdm",
1705 .parent = &ducati_clk_mux_ck,
1706 .recalc = &followparent_recalc,
1707};
1708
1709static struct clk iss_ctrlclk = { 1689static struct clk iss_ctrlclk = {
1710 .name = "iss_ctrlclk", 1690 .name = "iss_ctrlclk",
1711 .ops = &clkops_omap2_dflt, 1691 .ops = &clkops_omap2_dflt,
@@ -3151,7 +3131,6 @@ static struct omap_clk omap44xx_clks[] = {
3151 CLK(NULL, "div_ts_ck", &div_ts_ck, CK_446X), 3131 CLK(NULL, "div_ts_ck", &div_ts_ck, CK_446X),
3152 CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), 3132 CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X),
3153 CLK(NULL, "dmic_fck", &dmic_fck, CK_443X), 3133 CLK(NULL, "dmic_fck", &dmic_fck, CK_443X),
3154 CLK(NULL, "dsp_fck", &dsp_fck, CK_443X),
3155 CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X), 3134 CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X),
3156 CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X), 3135 CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X),
3157 CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X), 3136 CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X),
@@ -3183,7 +3162,6 @@ static struct omap_clk omap44xx_clks[] = {
3183 CLK(NULL, "i2c2_fck", &i2c2_fck, CK_443X), 3162 CLK(NULL, "i2c2_fck", &i2c2_fck, CK_443X),
3184 CLK(NULL, "i2c3_fck", &i2c3_fck, CK_443X), 3163 CLK(NULL, "i2c3_fck", &i2c3_fck, CK_443X),
3185 CLK(NULL, "i2c4_fck", &i2c4_fck, CK_443X), 3164 CLK(NULL, "i2c4_fck", &i2c4_fck, CK_443X),
3186 CLK(NULL, "ipu_fck", &ipu_fck, CK_443X),
3187 CLK(NULL, "iss_ctrlclk", &iss_ctrlclk, CK_443X), 3165 CLK(NULL, "iss_ctrlclk", &iss_ctrlclk, CK_443X),
3188 CLK(NULL, "iss_fck", &iss_fck, CK_443X), 3166 CLK(NULL, "iss_fck", &iss_fck, CK_443X),
3189 CLK(NULL, "iva_fck", &iva_fck, CK_443X), 3167 CLK(NULL, "iva_fck", &iva_fck, CK_443X),
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c72b5a72772..787a996ec4e 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -127,7 +127,7 @@ static struct platform_device omap2cam_device = {
127 127
128#if defined(CONFIG_IOMMU_API) 128#if defined(CONFIG_IOMMU_API)
129 129
130#include <plat/iommu.h> 130#include <linux/platform_data/iommu-omap.h>
131 131
132static struct resource omap3isp_resources[] = { 132static struct resource omap3isp_resources[] = {
133 { 133 {
@@ -214,7 +214,7 @@ static struct platform_device omap3isp_device = {
214}; 214};
215 215
216static struct omap_iommu_arch_data omap3_isp_iommu = { 216static struct omap_iommu_arch_data omap3_isp_iommu = {
217 .name = "isp", 217 .name = "mmu_isp",
218}; 218};
219 219
220int omap3_init_camera(struct isp_platform_data *pdata) 220int omap3_init_camera(struct isp_platform_data *pdata)
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index df298d46707..7642fc4672c 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -12,153 +12,60 @@
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/err.h>
16#include <linux/slab.h>
15 17
16#include <plat/iommu.h> 18#include <linux/platform_data/iommu-omap.h>
19#include <plat/omap_hwmod.h>
20#include <plat/omap_device.h>
17 21
18#include "soc.h" 22static int __init omap_iommu_dev_init(struct omap_hwmod *oh, void *unused)
19#include "common.h"
20
21struct iommu_device {
22 resource_size_t base;
23 int irq;
24 struct iommu_platform_data pdata;
25 struct resource res[2];
26};
27static struct iommu_device *devices;
28static int num_iommu_devices;
29
30#ifdef CONFIG_ARCH_OMAP3
31static struct iommu_device omap3_devices[] = {
32 {
33 .base = 0x480bd400,
34 .irq = 24 + OMAP_INTC_START,
35 .pdata = {
36 .name = "isp",
37 .nr_tlb_entries = 8,
38 .clk_name = "cam_ick",
39 .da_start = 0x0,
40 .da_end = 0xFFFFF000,
41 },
42 },
43#if defined(CONFIG_OMAP_IOMMU_IVA2)
44 {
45 .base = 0x5d000000,
46 .irq = 28 + OMAP_INTC_START,
47 .pdata = {
48 .name = "iva2",
49 .nr_tlb_entries = 32,
50 .clk_name = "iva2_ck",
51 .da_start = 0x11000000,
52 .da_end = 0xFFFFF000,
53 },
54 },
55#endif
56};
57#define NR_OMAP3_IOMMU_DEVICES ARRAY_SIZE(omap3_devices)
58static struct platform_device *omap3_iommu_pdev[NR_OMAP3_IOMMU_DEVICES];
59#else
60#define omap3_devices NULL
61#define NR_OMAP3_IOMMU_DEVICES 0
62#define omap3_iommu_pdev NULL
63#endif
64
65#ifdef CONFIG_ARCH_OMAP4
66static struct iommu_device omap4_devices[] = {
67 {
68 .base = OMAP4_MMU1_BASE,
69 .irq = 100 + OMAP44XX_IRQ_GIC_START,
70 .pdata = {
71 .name = "ducati",
72 .nr_tlb_entries = 32,
73 .clk_name = "ipu_fck",
74 .da_start = 0x0,
75 .da_end = 0xFFFFF000,
76 },
77 },
78 {
79 .base = OMAP4_MMU2_BASE,
80 .irq = 28 + OMAP44XX_IRQ_GIC_START,
81 .pdata = {
82 .name = "tesla",
83 .nr_tlb_entries = 32,
84 .clk_name = "dsp_fck",
85 .da_start = 0x0,
86 .da_end = 0xFFFFF000,
87 },
88 },
89};
90#define NR_OMAP4_IOMMU_DEVICES ARRAY_SIZE(omap4_devices)
91static struct platform_device *omap4_iommu_pdev[NR_OMAP4_IOMMU_DEVICES];
92#else
93#define omap4_devices NULL
94#define NR_OMAP4_IOMMU_DEVICES 0
95#define omap4_iommu_pdev NULL
96#endif
97
98static struct platform_device **omap_iommu_pdev;
99
100static int __init omap_iommu_init(void)
101{ 23{
102 int i, err; 24 struct platform_device *pdev;
103 struct resource res[] = { 25 struct iommu_platform_data *pdata;
104 { .flags = IORESOURCE_MEM }, 26 struct omap_mmu_dev_attr *a = (struct omap_mmu_dev_attr *)oh->dev_attr;
105 { .flags = IORESOURCE_IRQ }, 27 static int i;
106 }; 28
29 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
30 if (!pdata)
31 return -ENOMEM;
32
33 pdata->name = oh->name;
34 pdata->nr_tlb_entries = a->nr_tlb_entries;
35 pdata->da_start = a->da_start;
36 pdata->da_end = a->da_end;
37
38 if (oh->rst_lines_cnt == 1) {
39 pdata->reset_name = oh->rst_lines->name;
40 pdata->assert_reset = omap_device_assert_hardreset;
41 pdata->deassert_reset = omap_device_deassert_hardreset;
42 }
107 43
108 if (cpu_is_omap34xx()) { 44 pdev = omap_device_build("omap-iommu", i, oh, pdata, sizeof(*pdata),
109 devices = omap3_devices; 45 NULL, 0, 0);
110 omap_iommu_pdev = omap3_iommu_pdev;
111 num_iommu_devices = NR_OMAP3_IOMMU_DEVICES;
112 } else if (cpu_is_omap44xx()) {
113 devices = omap4_devices;
114 omap_iommu_pdev = omap4_iommu_pdev;
115 num_iommu_devices = NR_OMAP4_IOMMU_DEVICES;
116 } else
117 return -ENODEV;
118 46
119 for (i = 0; i < num_iommu_devices; i++) { 47 kfree(pdata);
120 struct platform_device *pdev;
121 const struct iommu_device *d = &devices[i];
122 48
123 pdev = platform_device_alloc("omap-iommu", i); 49 if (IS_ERR(pdev)) {
124 if (!pdev) { 50 pr_err("%s: device build err: %ld\n", __func__, PTR_ERR(pdev));
125 err = -ENOMEM; 51 return PTR_ERR(pdev);
126 goto err_out; 52 }
127 }
128 53
129 res[0].start = d->base; 54 i++;
130 res[0].end = d->base + MMU_REG_SIZE - 1;
131 res[1].start = res[1].end = d->irq;
132 55
133 err = platform_device_add_resources(pdev, res,
134 ARRAY_SIZE(res));
135 if (err)
136 goto err_out;
137 err = platform_device_add_data(pdev, &d->pdata,
138 sizeof(d->pdata));
139 if (err)
140 goto err_out;
141 err = platform_device_add(pdev);
142 if (err)
143 goto err_out;
144 omap_iommu_pdev[i] = pdev;
145 }
146 return 0; 56 return 0;
57}
147 58
148err_out: 59static int __init omap_iommu_init(void)
149 while (i--) 60{
150 platform_device_put(omap_iommu_pdev[i]); 61 return omap_hwmod_for_each_by_class("mmu", omap_iommu_dev_init, NULL);
151 return err;
152} 62}
153/* must be ready before omap3isp is probed */ 63/* must be ready before omap3isp is probed */
154subsys_initcall(omap_iommu_init); 64subsys_initcall(omap_iommu_init);
155 65
156static void __exit omap_iommu_exit(void) 66static void __exit omap_iommu_exit(void)
157{ 67{
158 int i; 68 /* Do nothing */
159
160 for (i = 0; i < num_iommu_devices; i++)
161 platform_device_unregister(omap_iommu_pdev[i]);
162} 69}
163module_exit(omap_iommu_exit); 70module_exit(omap_iommu_exit);
164 71
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index f67b7ee07dd..621bc713723 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -26,8 +26,8 @@
26#include <plat/mmc.h> 26#include <plat/mmc.h>
27#include <linux/platform_data/asoc-ti-mcbsp.h> 27#include <linux/platform_data/asoc-ti-mcbsp.h>
28#include <linux/platform_data/spi-omap2-mcspi.h> 28#include <linux/platform_data/spi-omap2-mcspi.h>
29#include <linux/platform_data/iommu-omap.h>
29#include <plat/dmtimer.h> 30#include <plat/dmtimer.h>
30#include <plat/iommu.h>
31 31
32#include "am35xx.h" 32#include "am35xx.h"
33 33
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 0b1249e0039..4b985b9b81d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -28,10 +28,10 @@
28#include <plat/dma.h> 28#include <plat/dma.h>
29#include <linux/platform_data/spi-omap2-mcspi.h> 29#include <linux/platform_data/spi-omap2-mcspi.h>
30#include <linux/platform_data/asoc-ti-mcbsp.h> 30#include <linux/platform_data/asoc-ti-mcbsp.h>
31#include <linux/platform_data/iommu-omap.h>
31#include <plat/mmc.h> 32#include <plat/mmc.h>
32#include <plat/dmtimer.h> 33#include <plat/dmtimer.h>
33#include <plat/common.h> 34#include <plat/common.h>
34#include <plat/iommu.h>
35 35
36#include "omap_hwmod_common_data.h" 36#include "omap_hwmod_common_data.h"
37#include "cm1_44xx.h" 37#include "cm1_44xx.h"
@@ -651,7 +651,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
651 .mpu_irqs = omap44xx_dsp_irqs, 651 .mpu_irqs = omap44xx_dsp_irqs,
652 .rst_lines = omap44xx_dsp_resets, 652 .rst_lines = omap44xx_dsp_resets,
653 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), 653 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets),
654 .main_clk = "dsp_fck", 654 .main_clk = "dpll_iva_m4x2_ck",
655 .prcm = { 655 .prcm = {
656 .omap4 = { 656 .omap4 = {
657 .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, 657 .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET,
@@ -1678,7 +1678,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
1678 .mpu_irqs = omap44xx_ipu_irqs, 1678 .mpu_irqs = omap44xx_ipu_irqs,
1679 .rst_lines = omap44xx_ipu_resets, 1679 .rst_lines = omap44xx_ipu_resets,
1680 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), 1680 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets),
1681 .main_clk = "ipu_fck", 1681 .main_clk = "ducati_clk_mux_ck",
1682 .prcm = { 1682 .prcm = {
1683 .omap4 = { 1683 .omap4 = {
1684 .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, 1684 .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET,
diff --git a/arch/arm/plat-omap/include/plat/iommu2.h b/arch/arm/plat-omap/include/plat/iommu2.h
deleted file mode 100644
index d4116b595e4..00000000000
--- a/arch/arm/plat-omap/include/plat/iommu2.h
+++ /dev/null
@@ -1,96 +0,0 @@
1/*
2 * omap iommu: omap2 architecture specific definitions
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __MACH_IOMMU2_H
14#define __MACH_IOMMU2_H
15
16#include <linux/io.h>
17
18/*
19 * MMU Register offsets
20 */
21#define MMU_REVISION 0x00
22#define MMU_SYSCONFIG 0x10
23#define MMU_SYSSTATUS 0x14
24#define MMU_IRQSTATUS 0x18
25#define MMU_IRQENABLE 0x1c
26#define MMU_WALKING_ST 0x40
27#define MMU_CNTL 0x44
28#define MMU_FAULT_AD 0x48
29#define MMU_TTB 0x4c
30#define MMU_LOCK 0x50
31#define MMU_LD_TLB 0x54
32#define MMU_CAM 0x58
33#define MMU_RAM 0x5c
34#define MMU_GFLUSH 0x60
35#define MMU_FLUSH_ENTRY 0x64
36#define MMU_READ_CAM 0x68
37#define MMU_READ_RAM 0x6c
38#define MMU_EMU_FAULT_AD 0x70
39
40#define MMU_REG_SIZE 256
41
42/*
43 * MMU Register bit definitions
44 */
45#define MMU_LOCK_BASE_SHIFT 10
46#define MMU_LOCK_BASE_MASK (0x1f << MMU_LOCK_BASE_SHIFT)
47#define MMU_LOCK_BASE(x) \
48 ((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT)
49
50#define MMU_LOCK_VICT_SHIFT 4
51#define MMU_LOCK_VICT_MASK (0x1f << MMU_LOCK_VICT_SHIFT)
52#define MMU_LOCK_VICT(x) \
53 ((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT)
54
55#define MMU_CAM_VATAG_SHIFT 12
56#define MMU_CAM_VATAG_MASK \
57 ((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT)
58#define MMU_CAM_P (1 << 3)
59#define MMU_CAM_V (1 << 2)
60#define MMU_CAM_PGSZ_MASK 3
61#define MMU_CAM_PGSZ_1M (0 << 0)
62#define MMU_CAM_PGSZ_64K (1 << 0)
63#define MMU_CAM_PGSZ_4K (2 << 0)
64#define MMU_CAM_PGSZ_16M (3 << 0)
65
66#define MMU_RAM_PADDR_SHIFT 12
67#define MMU_RAM_PADDR_MASK \
68 ((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT)
69#define MMU_RAM_ENDIAN_SHIFT 9
70#define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT)
71#define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT)
72#define MMU_RAM_ENDIAN_LITTLE (0 << MMU_RAM_ENDIAN_SHIFT)
73#define MMU_RAM_ELSZ_SHIFT 7
74#define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT)
75#define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT)
76#define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT)
77#define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT)
78#define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT)
79#define MMU_RAM_MIXED_SHIFT 6
80#define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT)
81#define MMU_RAM_MIXED MMU_RAM_MIXED_MASK
82
83/*
84 * register accessors
85 */
86static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs)
87{
88 return __raw_readl(obj->regbase + offs);
89}
90
91static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs)
92{
93 __raw_writel(val, obj->regbase + offs);
94}
95
96#endif /* __MACH_IOMMU2_H */
diff --git a/arch/arm/plat-omap/include/plat/iovmm.h b/arch/arm/plat-omap/include/plat/iovmm.h
deleted file mode 100644
index 498e57cda6c..00000000000
--- a/arch/arm/plat-omap/include/plat/iovmm.h
+++ /dev/null
@@ -1,89 +0,0 @@
1/*
2 * omap iommu: simple virtual address space management
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __IOMMU_MMAP_H
14#define __IOMMU_MMAP_H
15
16#include <linux/iommu.h>
17
18struct iovm_struct {
19 struct omap_iommu *iommu; /* iommu object which this belongs to */
20 u32 da_start; /* area definition */
21 u32 da_end;
22 u32 flags; /* IOVMF_: see below */
23 struct list_head list; /* linked in ascending order */
24 const struct sg_table *sgt; /* keep 'page' <-> 'da' mapping */
25 void *va; /* mpu side mapped address */
26};
27
28/*
29 * IOVMF_FLAGS: attribute for iommu virtual memory area(iovma)
30 *
31 * lower 16 bit is used for h/w and upper 16 bit is for s/w.
32 */
33#define IOVMF_SW_SHIFT 16
34
35/*
36 * iovma: h/w flags derived from cam and ram attribute
37 */
38#define IOVMF_CAM_MASK (~((1 << 10) - 1))
39#define IOVMF_RAM_MASK (~IOVMF_CAM_MASK)
40
41#define IOVMF_PGSZ_MASK (3 << 0)
42#define IOVMF_PGSZ_1M MMU_CAM_PGSZ_1M
43#define IOVMF_PGSZ_64K MMU_CAM_PGSZ_64K
44#define IOVMF_PGSZ_4K MMU_CAM_PGSZ_4K
45#define IOVMF_PGSZ_16M MMU_CAM_PGSZ_16M
46
47#define IOVMF_ENDIAN_MASK (1 << 9)
48#define IOVMF_ENDIAN_BIG MMU_RAM_ENDIAN_BIG
49#define IOVMF_ENDIAN_LITTLE MMU_RAM_ENDIAN_LITTLE
50
51#define IOVMF_ELSZ_MASK (3 << 7)
52#define IOVMF_ELSZ_8 MMU_RAM_ELSZ_8
53#define IOVMF_ELSZ_16 MMU_RAM_ELSZ_16
54#define IOVMF_ELSZ_32 MMU_RAM_ELSZ_32
55#define IOVMF_ELSZ_NONE MMU_RAM_ELSZ_NONE
56
57#define IOVMF_MIXED_MASK (1 << 6)
58#define IOVMF_MIXED MMU_RAM_MIXED
59
60/*
61 * iovma: s/w flags, used for mapping and umapping internally.
62 */
63#define IOVMF_MMIO (1 << IOVMF_SW_SHIFT)
64#define IOVMF_ALLOC (2 << IOVMF_SW_SHIFT)
65#define IOVMF_ALLOC_MASK (3 << IOVMF_SW_SHIFT)
66
67/* "superpages" is supported just with physically linear pages */
68#define IOVMF_DISCONT (1 << (2 + IOVMF_SW_SHIFT))
69#define IOVMF_LINEAR (2 << (2 + IOVMF_SW_SHIFT))
70#define IOVMF_LINEAR_MASK (3 << (2 + IOVMF_SW_SHIFT))
71
72#define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT))
73
74
75extern struct iovm_struct *omap_find_iovm_area(struct device *dev, u32 da);
76extern u32
77omap_iommu_vmap(struct iommu_domain *domain, struct device *dev, u32 da,
78 const struct sg_table *sgt, u32 flags);
79extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain,
80 struct device *dev, u32 da);
81extern u32
82omap_iommu_vmalloc(struct iommu_domain *domain, struct device *dev,
83 u32 da, size_t bytes, u32 flags);
84extern void
85omap_iommu_vfree(struct iommu_domain *domain, struct device *dev,
86 const u32 da);
87extern void *omap_da_to_va(struct device *dev, u32 da);
88
89#endif /* __IOMMU_MMAP_H */
diff --git a/arch/arm64/include/asm/dma-mapping.h b/arch/arm64/include/asm/dma-mapping.h
index 538f4b44db5..99477689419 100644
--- a/arch/arm64/include/asm/dma-mapping.h
+++ b/arch/arm64/include/asm/dma-mapping.h
@@ -50,6 +50,7 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
50static inline int dma_mapping_error(struct device *dev, dma_addr_t dev_addr) 50static inline int dma_mapping_error(struct device *dev, dma_addr_t dev_addr)
51{ 51{
52 struct dma_map_ops *ops = get_dma_ops(dev); 52 struct dma_map_ops *ops = get_dma_ops(dev);
53 debug_dma_mapping_error(dev, dev_addr);
53 return ops->mapping_error(dev, dev_addr); 54 return ops->mapping_error(dev, dev_addr);
54} 55}
55 56
diff --git a/arch/c6x/include/asm/dma-mapping.h b/arch/c6x/include/asm/dma-mapping.h
index 03579fd99db..3c694065030 100644
--- a/arch/c6x/include/asm/dma-mapping.h
+++ b/arch/c6x/include/asm/dma-mapping.h
@@ -32,6 +32,7 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask)
32 */ 32 */
33static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 33static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
34{ 34{
35 debug_dma_mapping_error(dev, dma_addr);
35 return dma_addr == ~0; 36 return dma_addr == ~0;
36} 37}
37 38
diff --git a/arch/ia64/include/asm/dma-mapping.h b/arch/ia64/include/asm/dma-mapping.h
index 4f5e8148440..cf3ab7e784b 100644
--- a/arch/ia64/include/asm/dma-mapping.h
+++ b/arch/ia64/include/asm/dma-mapping.h
@@ -58,6 +58,7 @@ static inline void dma_free_attrs(struct device *dev, size_t size,
58static inline int dma_mapping_error(struct device *dev, dma_addr_t daddr) 58static inline int dma_mapping_error(struct device *dev, dma_addr_t daddr)
59{ 59{
60 struct dma_map_ops *ops = platform_dma_get_ops(dev); 60 struct dma_map_ops *ops = platform_dma_get_ops(dev);
61 debug_dma_mapping_error(dev, daddr);
61 return ops->mapping_error(dev, daddr); 62 return ops->mapping_error(dev, daddr);
62} 63}
63 64
diff --git a/arch/microblaze/include/asm/dma-mapping.h b/arch/microblaze/include/asm/dma-mapping.h
index 01d228286cb..46460f1c49c 100644
--- a/arch/microblaze/include/asm/dma-mapping.h
+++ b/arch/microblaze/include/asm/dma-mapping.h
@@ -114,6 +114,8 @@ static inline void __dma_sync(unsigned long paddr,
114static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 114static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
115{ 115{
116 struct dma_map_ops *ops = get_dma_ops(dev); 116 struct dma_map_ops *ops = get_dma_ops(dev);
117
118 debug_dma_mapping_error(dev, dma_addr);
117 if (ops->mapping_error) 119 if (ops->mapping_error)
118 return ops->mapping_error(dev, dma_addr); 120 return ops->mapping_error(dev, dma_addr);
119 121
diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h
index be39a12901c..006b43e38a9 100644
--- a/arch/mips/include/asm/dma-mapping.h
+++ b/arch/mips/include/asm/dma-mapping.h
@@ -40,6 +40,8 @@ static inline int dma_supported(struct device *dev, u64 mask)
40static inline int dma_mapping_error(struct device *dev, u64 mask) 40static inline int dma_mapping_error(struct device *dev, u64 mask)
41{ 41{
42 struct dma_map_ops *ops = get_dma_ops(dev); 42 struct dma_map_ops *ops = get_dma_ops(dev);
43
44 debug_dma_mapping_error(dev, mask);
43 return ops->mapping_error(dev, mask); 45 return ops->mapping_error(dev, mask);
44} 46}
45 47
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index 78160874809..e27e9ad6818 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -172,6 +172,7 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
172{ 172{
173 struct dma_map_ops *dma_ops = get_dma_ops(dev); 173 struct dma_map_ops *dma_ops = get_dma_ops(dev);
174 174
175 debug_dma_mapping_error(dev, dma_addr);
175 if (dma_ops->mapping_error) 176 if (dma_ops->mapping_error)
176 return dma_ops->mapping_error(dev, dma_addr); 177 return dma_ops->mapping_error(dev, dma_addr);
177 178
diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h
index 8bd965e00a1..b437f2c780b 100644
--- a/arch/sh/include/asm/dma-mapping.h
+++ b/arch/sh/include/asm/dma-mapping.h
@@ -46,6 +46,7 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
46{ 46{
47 struct dma_map_ops *ops = get_dma_ops(dev); 47 struct dma_map_ops *ops = get_dma_ops(dev);
48 48
49 debug_dma_mapping_error(dev, dma_addr);
49 if (ops->mapping_error) 50 if (ops->mapping_error)
50 return ops->mapping_error(dev, dma_addr); 51 return ops->mapping_error(dev, dma_addr);
51 52
diff --git a/arch/sparc/include/asm/dma-mapping.h b/arch/sparc/include/asm/dma-mapping.h
index 8493fd3c7ba..05fe53f5346 100644
--- a/arch/sparc/include/asm/dma-mapping.h
+++ b/arch/sparc/include/asm/dma-mapping.h
@@ -59,6 +59,7 @@ static inline void dma_free_attrs(struct device *dev, size_t size,
59 59
60static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 60static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
61{ 61{
62 debug_dma_mapping_error(dev, dma_addr);
62 return (dma_addr == DMA_ERROR_CODE); 63 return (dma_addr == DMA_ERROR_CODE);
63} 64}
64 65
diff --git a/arch/tile/include/asm/dma-mapping.h b/arch/tile/include/asm/dma-mapping.h
index 4b6247d1a31..f2ff191376b 100644
--- a/arch/tile/include/asm/dma-mapping.h
+++ b/arch/tile/include/asm/dma-mapping.h
@@ -72,6 +72,7 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
72static inline int 72static inline int
73dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 73dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
74{ 74{
75 debug_dma_mapping_error(dev, dma_addr);
75 return get_dma_ops(dev)->mapping_error(dev, dma_addr); 76 return get_dma_ops(dev)->mapping_error(dev, dma_addr);
76} 77}
77 78
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index f7b4c7903e7..808dae63eee 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -47,6 +47,7 @@ static inline struct dma_map_ops *get_dma_ops(struct device *dev)
47static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 47static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
48{ 48{
49 struct dma_map_ops *ops = get_dma_ops(dev); 49 struct dma_map_ops *ops = get_dma_ops(dev);
50 debug_dma_mapping_error(dev, dma_addr);
50 if (ops->mapping_error) 51 if (ops->mapping_error)
51 return ops->mapping_error(dev, dma_addr); 52 return ops->mapping_error(dev, dma_addr);
52 53
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 14a4d5fc94f..f66b816d455 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_DMAR_TABLE) += dmar.o
7obj-$(CONFIG_INTEL_IOMMU) += iova.o intel-iommu.o 7obj-$(CONFIG_INTEL_IOMMU) += iova.o intel-iommu.o
8obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o 8obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o
9obj-$(CONFIG_OMAP_IOMMU) += omap-iommu.o 9obj-$(CONFIG_OMAP_IOMMU) += omap-iommu.o
10obj-$(CONFIG_OMAP_IOMMU) += omap-iommu2.o
10obj-$(CONFIG_OMAP_IOVMM) += omap-iovmm.o 11obj-$(CONFIG_OMAP_IOVMM) += omap-iovmm.o
11obj-$(CONFIG_OMAP_IOMMU_DEBUG) += omap-iommu-debug.o 12obj-$(CONFIG_OMAP_IOMMU_DEBUG) += omap-iommu-debug.o
12obj-$(CONFIG_TEGRA_IOMMU_GART) += tegra-gart.o 13obj-$(CONFIG_TEGRA_IOMMU_GART) += tegra-gart.o
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 55074cba20e..c1c74e030a5 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -57,17 +57,9 @@
57 * physically contiguous memory regions it is mapping into page sizes 57 * physically contiguous memory regions it is mapping into page sizes
58 * that we support. 58 * that we support.
59 * 59 *
60 * Traditionally the IOMMU core just handed us the mappings directly, 60 * 512GB Pages are not supported due to a hardware bug
61 * after making sure the size is an order of a 4KiB page and that the
62 * mapping has natural alignment.
63 *
64 * To retain this behavior, we currently advertise that we support
65 * all page sizes that are an order of 4KiB.
66 *
67 * If at some point we'd like to utilize the IOMMU core's new behavior,
68 * we could change this to advertise the real page sizes we support.
69 */ 61 */
70#define AMD_IOMMU_PGSIZES (~0xFFFUL) 62#define AMD_IOMMU_PGSIZES ((~0xFFFUL) & ~(2ULL << 38))
71 63
72static DEFINE_RWLOCK(amd_iommu_devtable_lock); 64static DEFINE_RWLOCK(amd_iommu_devtable_lock);
73 65
@@ -140,6 +132,9 @@ static void free_dev_data(struct iommu_dev_data *dev_data)
140 list_del(&dev_data->dev_data_list); 132 list_del(&dev_data->dev_data_list);
141 spin_unlock_irqrestore(&dev_data_list_lock, flags); 133 spin_unlock_irqrestore(&dev_data_list_lock, flags);
142 134
135 if (dev_data->group)
136 iommu_group_put(dev_data->group);
137
143 kfree(dev_data); 138 kfree(dev_data);
144} 139}
145 140
@@ -274,41 +269,23 @@ static void swap_pci_ref(struct pci_dev **from, struct pci_dev *to)
274 *from = to; 269 *from = to;
275} 270}
276 271
277#define REQ_ACS_FLAGS (PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF) 272static struct pci_bus *find_hosted_bus(struct pci_bus *bus)
278
279static int iommu_init_device(struct device *dev)
280{ 273{
281 struct pci_dev *dma_pdev = NULL, *pdev = to_pci_dev(dev); 274 while (!bus->self) {
282 struct iommu_dev_data *dev_data; 275 if (!pci_is_root_bus(bus))
283 struct iommu_group *group; 276 bus = bus->parent;
284 u16 alias; 277 else
285 int ret; 278 return ERR_PTR(-ENODEV);
286 279 }
287 if (dev->archdata.iommu)
288 return 0;
289
290 dev_data = find_dev_data(get_device_id(dev));
291 if (!dev_data)
292 return -ENOMEM;
293
294 alias = amd_iommu_alias_table[dev_data->devid];
295 if (alias != dev_data->devid) {
296 struct iommu_dev_data *alias_data;
297 280
298 alias_data = find_dev_data(alias); 281 return bus;
299 if (alias_data == NULL) { 282}
300 pr_err("AMD-Vi: Warning: Unhandled device %s\n",
301 dev_name(dev));
302 free_dev_data(dev_data);
303 return -ENOTSUPP;
304 }
305 dev_data->alias_data = alias_data;
306 283
307 dma_pdev = pci_get_bus_and_slot(alias >> 8, alias & 0xff); 284#define REQ_ACS_FLAGS (PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF)
308 }
309 285
310 if (dma_pdev == NULL) 286static struct pci_dev *get_isolation_root(struct pci_dev *pdev)
311 dma_pdev = pci_dev_get(pdev); 287{
288 struct pci_dev *dma_pdev = pdev;
312 289
313 /* Account for quirked devices */ 290 /* Account for quirked devices */
314 swap_pci_ref(&dma_pdev, pci_get_dma_source(dma_pdev)); 291 swap_pci_ref(&dma_pdev, pci_get_dma_source(dma_pdev));
@@ -330,14 +307,9 @@ static int iommu_init_device(struct device *dev)
330 * Finding the next device may require skipping virtual buses. 307 * Finding the next device may require skipping virtual buses.
331 */ 308 */
332 while (!pci_is_root_bus(dma_pdev->bus)) { 309 while (!pci_is_root_bus(dma_pdev->bus)) {
333 struct pci_bus *bus = dma_pdev->bus; 310 struct pci_bus *bus = find_hosted_bus(dma_pdev->bus);
334 311 if (IS_ERR(bus))
335 while (!bus->self) { 312 break;
336 if (!pci_is_root_bus(bus))
337 bus = bus->parent;
338 else
339 goto root_bus;
340 }
341 313
342 if (pci_acs_path_enabled(bus->self, NULL, REQ_ACS_FLAGS)) 314 if (pci_acs_path_enabled(bus->self, NULL, REQ_ACS_FLAGS))
343 break; 315 break;
@@ -345,19 +317,137 @@ static int iommu_init_device(struct device *dev)
345 swap_pci_ref(&dma_pdev, pci_dev_get(bus->self)); 317 swap_pci_ref(&dma_pdev, pci_dev_get(bus->self));
346 } 318 }
347 319
348root_bus: 320 return dma_pdev;
349 group = iommu_group_get(&dma_pdev->dev); 321}
350 pci_dev_put(dma_pdev); 322
323static int use_pdev_iommu_group(struct pci_dev *pdev, struct device *dev)
324{
325 struct iommu_group *group = iommu_group_get(&pdev->dev);
326 int ret;
327
351 if (!group) { 328 if (!group) {
352 group = iommu_group_alloc(); 329 group = iommu_group_alloc();
353 if (IS_ERR(group)) 330 if (IS_ERR(group))
354 return PTR_ERR(group); 331 return PTR_ERR(group);
332
333 WARN_ON(&pdev->dev != dev);
355 } 334 }
356 335
357 ret = iommu_group_add_device(group, dev); 336 ret = iommu_group_add_device(group, dev);
358
359 iommu_group_put(group); 337 iommu_group_put(group);
338 return ret;
339}
340
341static int use_dev_data_iommu_group(struct iommu_dev_data *dev_data,
342 struct device *dev)
343{
344 if (!dev_data->group) {
345 struct iommu_group *group = iommu_group_alloc();
346 if (IS_ERR(group))
347 return PTR_ERR(group);
348
349 dev_data->group = group;
350 }
351
352 return iommu_group_add_device(dev_data->group, dev);
353}
354
355static int init_iommu_group(struct device *dev)
356{
357 struct iommu_dev_data *dev_data;
358 struct iommu_group *group;
359 struct pci_dev *dma_pdev;
360 int ret;
361
362 group = iommu_group_get(dev);
363 if (group) {
364 iommu_group_put(group);
365 return 0;
366 }
367
368 dev_data = find_dev_data(get_device_id(dev));
369 if (!dev_data)
370 return -ENOMEM;
371
372 if (dev_data->alias_data) {
373 u16 alias;
374 struct pci_bus *bus;
375
376 if (dev_data->alias_data->group)
377 goto use_group;
378
379 /*
380 * If the alias device exists, it's effectively just a first
381 * level quirk for finding the DMA source.
382 */
383 alias = amd_iommu_alias_table[dev_data->devid];
384 dma_pdev = pci_get_bus_and_slot(alias >> 8, alias & 0xff);
385 if (dma_pdev) {
386 dma_pdev = get_isolation_root(dma_pdev);
387 goto use_pdev;
388 }
389
390 /*
391 * If the alias is virtual, try to find a parent device
392 * and test whether the IOMMU group is actualy rooted above
393 * the alias. Be careful to also test the parent device if
394 * we think the alias is the root of the group.
395 */
396 bus = pci_find_bus(0, alias >> 8);
397 if (!bus)
398 goto use_group;
399
400 bus = find_hosted_bus(bus);
401 if (IS_ERR(bus) || !bus->self)
402 goto use_group;
403
404 dma_pdev = get_isolation_root(pci_dev_get(bus->self));
405 if (dma_pdev != bus->self || (dma_pdev->multifunction &&
406 !pci_acs_enabled(dma_pdev, REQ_ACS_FLAGS)))
407 goto use_pdev;
408
409 pci_dev_put(dma_pdev);
410 goto use_group;
411 }
412
413 dma_pdev = get_isolation_root(pci_dev_get(to_pci_dev(dev)));
414use_pdev:
415 ret = use_pdev_iommu_group(dma_pdev, dev);
416 pci_dev_put(dma_pdev);
417 return ret;
418use_group:
419 return use_dev_data_iommu_group(dev_data->alias_data, dev);
420}
421
422static int iommu_init_device(struct device *dev)
423{
424 struct pci_dev *pdev = to_pci_dev(dev);
425 struct iommu_dev_data *dev_data;
426 u16 alias;
427 int ret;
428
429 if (dev->archdata.iommu)
430 return 0;
431
432 dev_data = find_dev_data(get_device_id(dev));
433 if (!dev_data)
434 return -ENOMEM;
435
436 alias = amd_iommu_alias_table[dev_data->devid];
437 if (alias != dev_data->devid) {
438 struct iommu_dev_data *alias_data;
439
440 alias_data = find_dev_data(alias);
441 if (alias_data == NULL) {
442 pr_err("AMD-Vi: Warning: Unhandled device %s\n",
443 dev_name(dev));
444 free_dev_data(dev_data);
445 return -ENOTSUPP;
446 }
447 dev_data->alias_data = alias_data;
448 }
360 449
450 ret = init_iommu_group(dev);
361 if (ret) 451 if (ret)
362 return ret; 452 return ret;
363 453
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
index c9aa3d079ff..e38ab438bb3 100644
--- a/drivers/iommu/amd_iommu_types.h
+++ b/drivers/iommu/amd_iommu_types.h
@@ -426,6 +426,7 @@ struct iommu_dev_data {
426 struct iommu_dev_data *alias_data;/* The alias dev_data */ 426 struct iommu_dev_data *alias_data;/* The alias dev_data */
427 struct protection_domain *domain; /* Domain the device is bound to */ 427 struct protection_domain *domain; /* Domain the device is bound to */
428 atomic_t bind; /* Domain attach reference count */ 428 atomic_t bind; /* Domain attach reference count */
429 struct iommu_group *group; /* IOMMU group for virtual aliases */
429 u16 devid; /* PCI Device ID */ 430 u16 devid; /* PCI Device ID */
430 bool iommu_v2; /* Device can make use of IOMMUv2 */ 431 bool iommu_v2; /* Device can make use of IOMMUv2 */
431 bool passthrough; /* Default for device is pt_domain */ 432 bool passthrough; /* Default for device is pt_domain */
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 0badfa48b32..f7fd3d0aeb4 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -2320,8 +2320,39 @@ static int domain_add_dev_info(struct dmar_domain *domain,
2320 return 0; 2320 return 0;
2321} 2321}
2322 2322
2323static bool device_has_rmrr(struct pci_dev *dev)
2324{
2325 struct dmar_rmrr_unit *rmrr;
2326 int i;
2327
2328 for_each_rmrr_units(rmrr) {
2329 for (i = 0; i < rmrr->devices_cnt; i++) {
2330 /*
2331 * Return TRUE if this RMRR contains the device that
2332 * is passed in.
2333 */
2334 if (rmrr->devices[i] == dev)
2335 return true;
2336 }
2337 }
2338 return false;
2339}
2340
2323static int iommu_should_identity_map(struct pci_dev *pdev, int startup) 2341static int iommu_should_identity_map(struct pci_dev *pdev, int startup)
2324{ 2342{
2343
2344 /*
2345 * We want to prevent any device associated with an RMRR from
2346 * getting placed into the SI Domain. This is done because
2347 * problems exist when devices are moved in and out of domains
2348 * and their respective RMRR info is lost. We exempt USB devices
2349 * from this process due to their usage of RMRRs that are known
2350 * to not be needed after BIOS hand-off to OS.
2351 */
2352 if (device_has_rmrr(pdev) &&
2353 (pdev->class >> 8) != PCI_CLASS_SERIAL_USB)
2354 return 0;
2355
2325 if ((iommu_identity_mapping & IDENTMAP_AZALIA) && IS_AZALIA(pdev)) 2356 if ((iommu_identity_mapping & IDENTMAP_AZALIA) && IS_AZALIA(pdev))
2326 return 1; 2357 return 1;
2327 2358
diff --git a/drivers/iommu/omap-iommu-debug.c b/drivers/iommu/omap-iommu-debug.c
index f55fc5dfbad..d97fbe4fb9b 100644
--- a/drivers/iommu/omap-iommu-debug.c
+++ b/drivers/iommu/omap-iommu-debug.c
@@ -18,11 +18,11 @@
18#include <linux/uaccess.h> 18#include <linux/uaccess.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/debugfs.h> 20#include <linux/debugfs.h>
21#include <linux/omap-iommu.h>
22#include <linux/platform_data/iommu-omap.h>
21 23
22#include <plat/iommu.h> 24#include "omap-iopgtable.h"
23#include <plat/iovmm.h> 25#include "omap-iommu.h"
24
25#include <plat/iopgtable.h>
26 26
27#define MAXCOLUMN 100 /* for short messages */ 27#define MAXCOLUMN 100 /* for short messages */
28 28
diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c
index d0b1234581b..18108c1405e 100644
--- a/drivers/iommu/omap-iommu.c
+++ b/drivers/iommu/omap-iommu.c
@@ -16,17 +16,20 @@
16#include <linux/slab.h> 16#include <linux/slab.h>
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/ioport.h> 18#include <linux/ioport.h>
19#include <linux/clk.h>
20#include <linux/platform_device.h> 19#include <linux/platform_device.h>
21#include <linux/iommu.h> 20#include <linux/iommu.h>
21#include <linux/omap-iommu.h>
22#include <linux/mutex.h> 22#include <linux/mutex.h>
23#include <linux/spinlock.h> 23#include <linux/spinlock.h>
24#include <linux/io.h>
25#include <linux/pm_runtime.h>
24 26
25#include <asm/cacheflush.h> 27#include <asm/cacheflush.h>
26 28
27#include <plat/iommu.h> 29#include <linux/platform_data/iommu-omap.h>
28 30
29#include <plat/iopgtable.h> 31#include "omap-iopgtable.h"
32#include "omap-iommu.h"
30 33
31#define for_each_iotlb_cr(obj, n, __i, cr) \ 34#define for_each_iotlb_cr(obj, n, __i, cr) \
32 for (__i = 0; \ 35 for (__i = 0; \
@@ -51,6 +54,21 @@ struct omap_iommu_domain {
51 spinlock_t lock; 54 spinlock_t lock;
52}; 55};
53 56
57#define MMU_LOCK_BASE_SHIFT 10
58#define MMU_LOCK_BASE_MASK (0x1f << MMU_LOCK_BASE_SHIFT)
59#define MMU_LOCK_BASE(x) \
60 ((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT)
61
62#define MMU_LOCK_VICT_SHIFT 4
63#define MMU_LOCK_VICT_MASK (0x1f << MMU_LOCK_VICT_SHIFT)
64#define MMU_LOCK_VICT(x) \
65 ((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT)
66
67struct iotlb_lock {
68 short base;
69 short vict;
70};
71
54/* accommodate the difference between omap1 and omap2/3 */ 72/* accommodate the difference between omap1 and omap2/3 */
55static const struct iommu_functions *arch_iommu; 73static const struct iommu_functions *arch_iommu;
56 74
@@ -125,31 +143,44 @@ EXPORT_SYMBOL_GPL(omap_iommu_arch_version);
125static int iommu_enable(struct omap_iommu *obj) 143static int iommu_enable(struct omap_iommu *obj)
126{ 144{
127 int err; 145 int err;
146 struct platform_device *pdev = to_platform_device(obj->dev);
147 struct iommu_platform_data *pdata = pdev->dev.platform_data;
128 148
129 if (!obj) 149 if (!obj || !pdata)
130 return -EINVAL; 150 return -EINVAL;
131 151
132 if (!arch_iommu) 152 if (!arch_iommu)
133 return -ENODEV; 153 return -ENODEV;
134 154
135 clk_enable(obj->clk); 155 if (pdata->deassert_reset) {
156 err = pdata->deassert_reset(pdev, pdata->reset_name);
157 if (err) {
158 dev_err(obj->dev, "deassert_reset failed: %d\n", err);
159 return err;
160 }
161 }
162
163 pm_runtime_get_sync(obj->dev);
136 164
137 err = arch_iommu->enable(obj); 165 err = arch_iommu->enable(obj);
138 166
139 clk_disable(obj->clk);
140 return err; 167 return err;
141} 168}
142 169
143static void iommu_disable(struct omap_iommu *obj) 170static void iommu_disable(struct omap_iommu *obj)
144{ 171{
145 if (!obj) 172 struct platform_device *pdev = to_platform_device(obj->dev);
146 return; 173 struct iommu_platform_data *pdata = pdev->dev.platform_data;
147 174
148 clk_enable(obj->clk); 175 if (!obj || !pdata)
176 return;
149 177
150 arch_iommu->disable(obj); 178 arch_iommu->disable(obj);
151 179
152 clk_disable(obj->clk); 180 pm_runtime_put_sync(obj->dev);
181
182 if (pdata->assert_reset)
183 pdata->assert_reset(pdev, pdata->reset_name);
153} 184}
154 185
155/* 186/*
@@ -272,7 +303,7 @@ static int load_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e)
272 if (!obj || !obj->nr_tlb_entries || !e) 303 if (!obj || !obj->nr_tlb_entries || !e)
273 return -EINVAL; 304 return -EINVAL;
274 305
275 clk_enable(obj->clk); 306 pm_runtime_get_sync(obj->dev);
276 307
277 iotlb_lock_get(obj, &l); 308 iotlb_lock_get(obj, &l);
278 if (l.base == obj->nr_tlb_entries) { 309 if (l.base == obj->nr_tlb_entries) {
@@ -302,7 +333,7 @@ static int load_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e)
302 333
303 cr = iotlb_alloc_cr(obj, e); 334 cr = iotlb_alloc_cr(obj, e);
304 if (IS_ERR(cr)) { 335 if (IS_ERR(cr)) {
305 clk_disable(obj->clk); 336 pm_runtime_put_sync(obj->dev);
306 return PTR_ERR(cr); 337 return PTR_ERR(cr);
307 } 338 }
308 339
@@ -316,7 +347,7 @@ static int load_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e)
316 l.vict = l.base; 347 l.vict = l.base;
317 iotlb_lock_set(obj, &l); 348 iotlb_lock_set(obj, &l);
318out: 349out:
319 clk_disable(obj->clk); 350 pm_runtime_put_sync(obj->dev);
320 return err; 351 return err;
321} 352}
322 353
@@ -346,7 +377,7 @@ static void flush_iotlb_page(struct omap_iommu *obj, u32 da)
346 int i; 377 int i;
347 struct cr_regs cr; 378 struct cr_regs cr;
348 379
349 clk_enable(obj->clk); 380 pm_runtime_get_sync(obj->dev);
350 381
351 for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, cr) { 382 for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, cr) {
352 u32 start; 383 u32 start;
@@ -365,7 +396,7 @@ static void flush_iotlb_page(struct omap_iommu *obj, u32 da)
365 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY); 396 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
366 } 397 }
367 } 398 }
368 clk_disable(obj->clk); 399 pm_runtime_put_sync(obj->dev);
369 400
370 if (i == obj->nr_tlb_entries) 401 if (i == obj->nr_tlb_entries)
371 dev_dbg(obj->dev, "%s: no page for %08x\n", __func__, da); 402 dev_dbg(obj->dev, "%s: no page for %08x\n", __func__, da);
@@ -379,7 +410,7 @@ static void flush_iotlb_all(struct omap_iommu *obj)
379{ 410{
380 struct iotlb_lock l; 411 struct iotlb_lock l;
381 412
382 clk_enable(obj->clk); 413 pm_runtime_get_sync(obj->dev);
383 414
384 l.base = 0; 415 l.base = 0;
385 l.vict = 0; 416 l.vict = 0;
@@ -387,7 +418,7 @@ static void flush_iotlb_all(struct omap_iommu *obj)
387 418
388 iommu_write_reg(obj, 1, MMU_GFLUSH); 419 iommu_write_reg(obj, 1, MMU_GFLUSH);
389 420
390 clk_disable(obj->clk); 421 pm_runtime_put_sync(obj->dev);
391} 422}
392 423
393#if defined(CONFIG_OMAP_IOMMU_DEBUG) || defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE) 424#if defined(CONFIG_OMAP_IOMMU_DEBUG) || defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE)
@@ -397,11 +428,11 @@ ssize_t omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t bytes)
397 if (!obj || !buf) 428 if (!obj || !buf)
398 return -EINVAL; 429 return -EINVAL;
399 430
400 clk_enable(obj->clk); 431 pm_runtime_get_sync(obj->dev);
401 432
402 bytes = arch_iommu->dump_ctx(obj, buf, bytes); 433 bytes = arch_iommu->dump_ctx(obj, buf, bytes);
403 434
404 clk_disable(obj->clk); 435 pm_runtime_put_sync(obj->dev);
405 436
406 return bytes; 437 return bytes;
407} 438}
@@ -415,7 +446,7 @@ __dump_tlb_entries(struct omap_iommu *obj, struct cr_regs *crs, int num)
415 struct cr_regs tmp; 446 struct cr_regs tmp;
416 struct cr_regs *p = crs; 447 struct cr_regs *p = crs;
417 448
418 clk_enable(obj->clk); 449 pm_runtime_get_sync(obj->dev);
419 iotlb_lock_get(obj, &saved); 450 iotlb_lock_get(obj, &saved);
420 451
421 for_each_iotlb_cr(obj, num, i, tmp) { 452 for_each_iotlb_cr(obj, num, i, tmp) {
@@ -425,7 +456,7 @@ __dump_tlb_entries(struct omap_iommu *obj, struct cr_regs *crs, int num)
425 } 456 }
426 457
427 iotlb_lock_set(obj, &saved); 458 iotlb_lock_set(obj, &saved);
428 clk_disable(obj->clk); 459 pm_runtime_put_sync(obj->dev);
429 460
430 return p - crs; 461 return p - crs;
431} 462}
@@ -789,9 +820,7 @@ static irqreturn_t iommu_fault_handler(int irq, void *data)
789 if (!obj->refcount) 820 if (!obj->refcount)
790 return IRQ_NONE; 821 return IRQ_NONE;
791 822
792 clk_enable(obj->clk);
793 errs = iommu_report_fault(obj, &da); 823 errs = iommu_report_fault(obj, &da);
794 clk_disable(obj->clk);
795 if (errs == 0) 824 if (errs == 0)
796 return IRQ_HANDLED; 825 return IRQ_HANDLED;
797 826
@@ -913,17 +942,10 @@ static int __devinit omap_iommu_probe(struct platform_device *pdev)
913 struct resource *res; 942 struct resource *res;
914 struct iommu_platform_data *pdata = pdev->dev.platform_data; 943 struct iommu_platform_data *pdata = pdev->dev.platform_data;
915 944
916 if (pdev->num_resources != 2)
917 return -EINVAL;
918
919 obj = kzalloc(sizeof(*obj) + MMU_REG_SIZE, GFP_KERNEL); 945 obj = kzalloc(sizeof(*obj) + MMU_REG_SIZE, GFP_KERNEL);
920 if (!obj) 946 if (!obj)
921 return -ENOMEM; 947 return -ENOMEM;
922 948
923 obj->clk = clk_get(&pdev->dev, pdata->clk_name);
924 if (IS_ERR(obj->clk))
925 goto err_clk;
926
927 obj->nr_tlb_entries = pdata->nr_tlb_entries; 949 obj->nr_tlb_entries = pdata->nr_tlb_entries;
928 obj->name = pdata->name; 950 obj->name = pdata->name;
929 obj->dev = &pdev->dev; 951 obj->dev = &pdev->dev;
@@ -966,6 +988,9 @@ static int __devinit omap_iommu_probe(struct platform_device *pdev)
966 goto err_irq; 988 goto err_irq;
967 platform_set_drvdata(pdev, obj); 989 platform_set_drvdata(pdev, obj);
968 990
991 pm_runtime_irq_safe(obj->dev);
992 pm_runtime_enable(obj->dev);
993
969 dev_info(&pdev->dev, "%s registered\n", obj->name); 994 dev_info(&pdev->dev, "%s registered\n", obj->name);
970 return 0; 995 return 0;
971 996
@@ -974,8 +999,6 @@ err_irq:
974err_ioremap: 999err_ioremap:
975 release_mem_region(res->start, resource_size(res)); 1000 release_mem_region(res->start, resource_size(res));
976err_mem: 1001err_mem:
977 clk_put(obj->clk);
978err_clk:
979 kfree(obj); 1002 kfree(obj);
980 return err; 1003 return err;
981} 1004}
@@ -996,7 +1019,8 @@ static int __devexit omap_iommu_remove(struct platform_device *pdev)
996 release_mem_region(res->start, resource_size(res)); 1019 release_mem_region(res->start, resource_size(res));
997 iounmap(obj->regbase); 1020 iounmap(obj->regbase);
998 1021
999 clk_put(obj->clk); 1022 pm_runtime_disable(obj->dev);
1023
1000 dev_info(&pdev->dev, "%s removed\n", obj->name); 1024 dev_info(&pdev->dev, "%s removed\n", obj->name);
1001 kfree(obj); 1025 kfree(obj);
1002 return 0; 1026 return 0;
@@ -1015,6 +1039,23 @@ static void iopte_cachep_ctor(void *iopte)
1015 clean_dcache_area(iopte, IOPTE_TABLE_SIZE); 1039 clean_dcache_area(iopte, IOPTE_TABLE_SIZE);
1016} 1040}
1017 1041
1042static u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa,
1043 u32 flags)
1044{
1045 memset(e, 0, sizeof(*e));
1046
1047 e->da = da;
1048 e->pa = pa;
1049 e->valid = 1;
1050 /* FIXME: add OMAP1 support */
1051 e->pgsz = flags & MMU_CAM_PGSZ_MASK;
1052 e->endian = flags & MMU_RAM_ENDIAN_MASK;
1053 e->elsz = flags & MMU_RAM_ELSZ_MASK;
1054 e->mixed = flags & MMU_RAM_MIXED_MASK;
1055
1056 return iopgsz_to_bytes(e->pgsz);
1057}
1058
1018static int omap_iommu_map(struct iommu_domain *domain, unsigned long da, 1059static int omap_iommu_map(struct iommu_domain *domain, unsigned long da,
1019 phys_addr_t pa, size_t bytes, int prot) 1060 phys_addr_t pa, size_t bytes, int prot)
1020{ 1061{
diff --git a/arch/arm/plat-omap/include/plat/iommu.h b/drivers/iommu/omap-iommu.h
index 68b5f0362f3..12008420660 100644
--- a/arch/arm/plat-omap/include/plat/iommu.h
+++ b/drivers/iommu/omap-iommu.h
@@ -10,8 +10,9 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12 12
13#ifndef __MACH_IOMMU_H 13#if defined(CONFIG_ARCH_OMAP1)
14#define __MACH_IOMMU_H 14#error "iommu for this processor not implemented yet"
15#endif
15 16
16struct iotlb_entry { 17struct iotlb_entry {
17 u32 da; 18 u32 da;
@@ -28,7 +29,6 @@ struct iotlb_entry {
28struct omap_iommu { 29struct omap_iommu {
29 const char *name; 30 const char *name;
30 struct module *owner; 31 struct module *owner;
31 struct clk *clk;
32 void __iomem *regbase; 32 void __iomem *regbase;
33 struct device *dev; 33 struct device *dev;
34 void *isr_priv; 34 void *isr_priv;
@@ -71,11 +71,6 @@ struct cr_regs {
71 }; 71 };
72}; 72};
73 73
74struct iotlb_lock {
75 short base;
76 short vict;
77};
78
79/* architecture specific functions */ 74/* architecture specific functions */
80struct iommu_functions { 75struct iommu_functions {
81 unsigned long version; 76 unsigned long version;
@@ -103,42 +98,6 @@ struct iommu_functions {
103 ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len); 98 ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len);
104}; 99};
105 100
106/**
107 * struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod
108 * @da_start: device address where the va space starts.
109 * @da_end: device address where the va space ends.
110 * @nr_tlb_entries: number of entries supported by the translation
111 * look-aside buffer (TLB).
112 */
113struct omap_mmu_dev_attr {
114 u32 da_start;
115 u32 da_end;
116 int nr_tlb_entries;
117};
118
119struct iommu_platform_data {
120 const char *name;
121 const char *clk_name;
122 const int nr_tlb_entries;
123 u32 da_start;
124 u32 da_end;
125};
126
127/**
128 * struct iommu_arch_data - omap iommu private data
129 * @name: name of the iommu device
130 * @iommu_dev: handle of the iommu device
131 *
132 * This is an omap iommu private data object, which binds an iommu user
133 * to its iommu device. This object should be placed at the iommu user's
134 * dev_archdata so generic IOMMU API can be used without having to
135 * utilize omap-specific plumbing anymore.
136 */
137struct omap_iommu_arch_data {
138 const char *name;
139 struct omap_iommu *iommu_dev;
140};
141
142#ifdef CONFIG_IOMMU_API 101#ifdef CONFIG_IOMMU_API
143/** 102/**
144 * dev_to_omap_iommu() - retrieves an omap iommu object from a user device 103 * dev_to_omap_iommu() - retrieves an omap iommu object from a user device
@@ -152,18 +111,57 @@ static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)
152} 111}
153#endif 112#endif
154 113
155/* IOMMU errors */ 114/*
156#define OMAP_IOMMU_ERR_TLB_MISS (1 << 0) 115 * MMU Register offsets
157#define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1) 116 */
158#define OMAP_IOMMU_ERR_EMU_MISS (1 << 2) 117#define MMU_REVISION 0x00
159#define OMAP_IOMMU_ERR_TBLWALK_FAULT (1 << 3) 118#define MMU_IRQSTATUS 0x18
160#define OMAP_IOMMU_ERR_MULTIHIT_FAULT (1 << 4) 119#define MMU_IRQENABLE 0x1c
120#define MMU_WALKING_ST 0x40
121#define MMU_CNTL 0x44
122#define MMU_FAULT_AD 0x48
123#define MMU_TTB 0x4c
124#define MMU_LOCK 0x50
125#define MMU_LD_TLB 0x54
126#define MMU_CAM 0x58
127#define MMU_RAM 0x5c
128#define MMU_GFLUSH 0x60
129#define MMU_FLUSH_ENTRY 0x64
130#define MMU_READ_CAM 0x68
131#define MMU_READ_RAM 0x6c
132#define MMU_EMU_FAULT_AD 0x70
133
134#define MMU_REG_SIZE 256
161 135
162#if defined(CONFIG_ARCH_OMAP1) 136/*
163#error "iommu for this processor not implemented yet" 137 * MMU Register bit definitions
164#else 138 */
165#include <plat/iommu2.h> 139#define MMU_CAM_VATAG_SHIFT 12
166#endif 140#define MMU_CAM_VATAG_MASK \
141 ((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT)
142#define MMU_CAM_P (1 << 3)
143#define MMU_CAM_V (1 << 2)
144#define MMU_CAM_PGSZ_MASK 3
145#define MMU_CAM_PGSZ_1M (0 << 0)
146#define MMU_CAM_PGSZ_64K (1 << 0)
147#define MMU_CAM_PGSZ_4K (2 << 0)
148#define MMU_CAM_PGSZ_16M (3 << 0)
149
150#define MMU_RAM_PADDR_SHIFT 12
151#define MMU_RAM_PADDR_MASK \
152 ((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT)
153
154#define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT)
155#define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT)
156
157#define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT)
158#define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT)
159#define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT)
160#define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT)
161#define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT)
162#define MMU_RAM_MIXED_SHIFT 6
163#define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT)
164#define MMU_RAM_MIXED MMU_RAM_MIXED_MASK
167 165
168/* 166/*
169 * utilities for super page(16MB, 1MB, 64KB and 4KB) 167 * utilities for super page(16MB, 1MB, 64KB and 4KB)
@@ -199,23 +197,29 @@ extern void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e);
199extern int 197extern int
200omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e); 198omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e);
201 199
202extern int omap_iommu_set_isr(const char *name,
203 int (*isr)(struct omap_iommu *obj, u32 da, u32 iommu_errs,
204 void *priv),
205 void *isr_priv);
206
207extern void omap_iommu_save_ctx(struct device *dev); 200extern void omap_iommu_save_ctx(struct device *dev);
208extern void omap_iommu_restore_ctx(struct device *dev); 201extern void omap_iommu_restore_ctx(struct device *dev);
209 202
210extern int omap_install_iommu_arch(const struct iommu_functions *ops);
211extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);
212
213extern int omap_foreach_iommu_device(void *data, 203extern int omap_foreach_iommu_device(void *data,
214 int (*fn)(struct device *, void *)); 204 int (*fn)(struct device *, void *));
215 205
206extern int omap_install_iommu_arch(const struct iommu_functions *ops);
207extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);
208
216extern ssize_t 209extern ssize_t
217omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len); 210omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len);
218extern size_t 211extern size_t
219omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len); 212omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len);
220 213
221#endif /* __MACH_IOMMU_H */ 214/*
215 * register accessors
216 */
217static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs)
218{
219 return __raw_readl(obj->regbase + offs);
220}
221
222static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs)
223{
224 __raw_writel(val, obj->regbase + offs);
225}
diff --git a/arch/arm/mach-omap2/iommu2.c b/drivers/iommu/omap-iommu2.c
index eefc37912ef..d745094a69d 100644
--- a/arch/arm/mach-omap2/iommu2.c
+++ b/drivers/iommu/omap-iommu2.c
@@ -13,31 +13,21 @@
13 13
14#include <linux/err.h> 14#include <linux/err.h>
15#include <linux/device.h> 15#include <linux/device.h>
16#include <linux/io.h>
16#include <linux/jiffies.h> 17#include <linux/jiffies.h>
17#include <linux/module.h> 18#include <linux/module.h>
19#include <linux/omap-iommu.h>
18#include <linux/slab.h> 20#include <linux/slab.h>
19#include <linux/stringify.h> 21#include <linux/stringify.h>
22#include <linux/platform_data/iommu-omap.h>
20 23
21#include <plat/iommu.h> 24#include "omap-iommu.h"
22 25
23/* 26/*
24 * omap2 architecture specific register bit definitions 27 * omap2 architecture specific register bit definitions
25 */ 28 */
26#define IOMMU_ARCH_VERSION 0x00000011 29#define IOMMU_ARCH_VERSION 0x00000011
27 30
28/* SYSCONF */
29#define MMU_SYS_IDLE_SHIFT 3
30#define MMU_SYS_IDLE_FORCE (0 << MMU_SYS_IDLE_SHIFT)
31#define MMU_SYS_IDLE_NONE (1 << MMU_SYS_IDLE_SHIFT)
32#define MMU_SYS_IDLE_SMART (2 << MMU_SYS_IDLE_SHIFT)
33#define MMU_SYS_IDLE_MASK (3 << MMU_SYS_IDLE_SHIFT)
34
35#define MMU_SYS_SOFTRESET (1 << 1)
36#define MMU_SYS_AUTOIDLE 1
37
38/* SYSSTATUS */
39#define MMU_SYS_RESETDONE 1
40
41/* IRQSTATUS & IRQENABLE */ 31/* IRQSTATUS & IRQENABLE */
42#define MMU_IRQ_MULTIHITFAULT (1 << 4) 32#define MMU_IRQ_MULTIHITFAULT (1 << 4)
43#define MMU_IRQ_TABLEWALKFAULT (1 << 3) 33#define MMU_IRQ_TABLEWALKFAULT (1 << 3)
@@ -65,6 +55,12 @@
65 ((pgsz) == MMU_CAM_PGSZ_64K) ? 0xffff0000 : \ 55 ((pgsz) == MMU_CAM_PGSZ_64K) ? 0xffff0000 : \
66 ((pgsz) == MMU_CAM_PGSZ_4K) ? 0xfffff000 : 0) 56 ((pgsz) == MMU_CAM_PGSZ_4K) ? 0xfffff000 : 0)
67 57
58/* IOMMU errors */
59#define OMAP_IOMMU_ERR_TLB_MISS (1 << 0)
60#define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1)
61#define OMAP_IOMMU_ERR_EMU_MISS (1 << 2)
62#define OMAP_IOMMU_ERR_TBLWALK_FAULT (1 << 3)
63#define OMAP_IOMMU_ERR_MULTIHIT_FAULT (1 << 4)
68 64
69static void __iommu_set_twl(struct omap_iommu *obj, bool on) 65static void __iommu_set_twl(struct omap_iommu *obj, bool on)
70{ 66{
@@ -88,7 +84,6 @@ static void __iommu_set_twl(struct omap_iommu *obj, bool on)
88static int omap2_iommu_enable(struct omap_iommu *obj) 84static int omap2_iommu_enable(struct omap_iommu *obj)
89{ 85{
90 u32 l, pa; 86 u32 l, pa;
91 unsigned long timeout;
92 87
93 if (!obj->iopgd || !IS_ALIGNED((u32)obj->iopgd, SZ_16K)) 88 if (!obj->iopgd || !IS_ALIGNED((u32)obj->iopgd, SZ_16K))
94 return -EINVAL; 89 return -EINVAL;
@@ -97,29 +92,10 @@ static int omap2_iommu_enable(struct omap_iommu *obj)
97 if (!IS_ALIGNED(pa, SZ_16K)) 92 if (!IS_ALIGNED(pa, SZ_16K))
98 return -EINVAL; 93 return -EINVAL;
99 94
100 iommu_write_reg(obj, MMU_SYS_SOFTRESET, MMU_SYSCONFIG);
101
102 timeout = jiffies + msecs_to_jiffies(20);
103 do {
104 l = iommu_read_reg(obj, MMU_SYSSTATUS);
105 if (l & MMU_SYS_RESETDONE)
106 break;
107 } while (!time_after(jiffies, timeout));
108
109 if (!(l & MMU_SYS_RESETDONE)) {
110 dev_err(obj->dev, "can't take mmu out of reset\n");
111 return -ENODEV;
112 }
113
114 l = iommu_read_reg(obj, MMU_REVISION); 95 l = iommu_read_reg(obj, MMU_REVISION);
115 dev_info(obj->dev, "%s: version %d.%d\n", obj->name, 96 dev_info(obj->dev, "%s: version %d.%d\n", obj->name,
116 (l >> 4) & 0xf, l & 0xf); 97 (l >> 4) & 0xf, l & 0xf);
117 98
118 l = iommu_read_reg(obj, MMU_SYSCONFIG);
119 l &= ~MMU_SYS_IDLE_MASK;
120 l |= (MMU_SYS_IDLE_SMART | MMU_SYS_AUTOIDLE);
121 iommu_write_reg(obj, l, MMU_SYSCONFIG);
122
123 iommu_write_reg(obj, pa, MMU_TTB); 99 iommu_write_reg(obj, pa, MMU_TTB);
124 100
125 __iommu_set_twl(obj, true); 101 __iommu_set_twl(obj, true);
@@ -133,7 +109,6 @@ static void omap2_iommu_disable(struct omap_iommu *obj)
133 109
134 l &= ~MMU_CNTL_MASK; 110 l &= ~MMU_CNTL_MASK;
135 iommu_write_reg(obj, l, MMU_CNTL); 111 iommu_write_reg(obj, l, MMU_CNTL);
136 iommu_write_reg(obj, MMU_SYS_IDLE_FORCE, MMU_SYSCONFIG);
137 112
138 dev_dbg(obj->dev, "%s is shutting down\n", obj->name); 113 dev_dbg(obj->dev, "%s is shutting down\n", obj->name);
139} 114}
@@ -262,8 +237,6 @@ omap2_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len)
262 char *p = buf; 237 char *p = buf;
263 238
264 pr_reg(REVISION); 239 pr_reg(REVISION);
265 pr_reg(SYSCONFIG);
266 pr_reg(SYSSTATUS);
267 pr_reg(IRQSTATUS); 240 pr_reg(IRQSTATUS);
268 pr_reg(IRQENABLE); 241 pr_reg(IRQENABLE);
269 pr_reg(WALKING_ST); 242 pr_reg(WALKING_ST);
diff --git a/arch/arm/plat-omap/include/plat/iopgtable.h b/drivers/iommu/omap-iopgtable.h
index 66a813977d5..cd4ae9e5b0c 100644
--- a/arch/arm/plat-omap/include/plat/iopgtable.h
+++ b/drivers/iommu/omap-iopgtable.h
@@ -10,9 +10,6 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12 12
13#ifndef __PLAT_OMAP_IOMMU_H
14#define __PLAT_OMAP_IOMMU_H
15
16/* 13/*
17 * "L2 table" address mask and size definitions. 14 * "L2 table" address mask and size definitions.
18 */ 15 */
@@ -97,24 +94,5 @@ static inline phys_addr_t omap_iommu_translate(u32 d, u32 va, u32 mask)
97#define iopte_index(da) (((da) >> IOPTE_SHIFT) & (PTRS_PER_IOPTE - 1)) 94#define iopte_index(da) (((da) >> IOPTE_SHIFT) & (PTRS_PER_IOPTE - 1))
98#define iopte_offset(iopgd, da) (iopgd_page_vaddr(iopgd) + iopte_index(da)) 95#define iopte_offset(iopgd, da) (iopgd_page_vaddr(iopgd) + iopte_index(da))
99 96
100static inline u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa,
101 u32 flags)
102{
103 memset(e, 0, sizeof(*e));
104
105 e->da = da;
106 e->pa = pa;
107 e->valid = 1;
108 /* FIXME: add OMAP1 support */
109 e->pgsz = flags & MMU_CAM_PGSZ_MASK;
110 e->endian = flags & MMU_RAM_ENDIAN_MASK;
111 e->elsz = flags & MMU_RAM_ELSZ_MASK;
112 e->mixed = flags & MMU_RAM_MIXED_MASK;
113
114 return iopgsz_to_bytes(e->pgsz);
115}
116
117#define to_iommu(dev) \ 97#define to_iommu(dev) \
118 (struct omap_iommu *)platform_get_drvdata(to_platform_device(dev)) 98 (struct omap_iommu *)platform_get_drvdata(to_platform_device(dev))
119
120#endif /* __PLAT_OMAP_IOMMU_H */
diff --git a/drivers/iommu/omap-iovmm.c b/drivers/iommu/omap-iovmm.c
index 2e10c3e0a7a..46d87569073 100644
--- a/drivers/iommu/omap-iovmm.c
+++ b/drivers/iommu/omap-iovmm.c
@@ -17,14 +17,58 @@
17#include <linux/device.h> 17#include <linux/device.h>
18#include <linux/scatterlist.h> 18#include <linux/scatterlist.h>
19#include <linux/iommu.h> 19#include <linux/iommu.h>
20#include <linux/omap-iommu.h>
21#include <linux/platform_data/iommu-omap.h>
20 22
21#include <asm/cacheflush.h> 23#include <asm/cacheflush.h>
22#include <asm/mach/map.h> 24#include <asm/mach/map.h>
23 25
24#include <plat/iommu.h> 26#include "omap-iopgtable.h"
25#include <plat/iovmm.h> 27#include "omap-iommu.h"
26 28
27#include <plat/iopgtable.h> 29/*
30 * IOVMF_FLAGS: attribute for iommu virtual memory area(iovma)
31 *
32 * lower 16 bit is used for h/w and upper 16 bit is for s/w.
33 */
34#define IOVMF_SW_SHIFT 16
35
36/*
37 * iovma: h/w flags derived from cam and ram attribute
38 */
39#define IOVMF_CAM_MASK (~((1 << 10) - 1))
40#define IOVMF_RAM_MASK (~IOVMF_CAM_MASK)
41
42#define IOVMF_PGSZ_MASK (3 << 0)
43#define IOVMF_PGSZ_1M MMU_CAM_PGSZ_1M
44#define IOVMF_PGSZ_64K MMU_CAM_PGSZ_64K
45#define IOVMF_PGSZ_4K MMU_CAM_PGSZ_4K
46#define IOVMF_PGSZ_16M MMU_CAM_PGSZ_16M
47
48#define IOVMF_ENDIAN_MASK (1 << 9)
49#define IOVMF_ENDIAN_BIG MMU_RAM_ENDIAN_BIG
50
51#define IOVMF_ELSZ_MASK (3 << 7)
52#define IOVMF_ELSZ_16 MMU_RAM_ELSZ_16
53#define IOVMF_ELSZ_32 MMU_RAM_ELSZ_32
54#define IOVMF_ELSZ_NONE MMU_RAM_ELSZ_NONE
55
56#define IOVMF_MIXED_MASK (1 << 6)
57#define IOVMF_MIXED MMU_RAM_MIXED
58
59/*
60 * iovma: s/w flags, used for mapping and umapping internally.
61 */
62#define IOVMF_MMIO (1 << IOVMF_SW_SHIFT)
63#define IOVMF_ALLOC (2 << IOVMF_SW_SHIFT)
64#define IOVMF_ALLOC_MASK (3 << IOVMF_SW_SHIFT)
65
66/* "superpages" is supported just with physically linear pages */
67#define IOVMF_DISCONT (1 << (2 + IOVMF_SW_SHIFT))
68#define IOVMF_LINEAR (2 << (2 + IOVMF_SW_SHIFT))
69#define IOVMF_LINEAR_MASK (3 << (2 + IOVMF_SW_SHIFT))
70
71#define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT))
28 72
29static struct kmem_cache *iovm_area_cachep; 73static struct kmem_cache *iovm_area_cachep;
30 74
diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c
index c16e8fc8a4b..4c9db62814f 100644
--- a/drivers/iommu/tegra-gart.c
+++ b/drivers/iommu/tegra-gart.c
@@ -398,6 +398,7 @@ static int tegra_gart_probe(struct platform_device *pdev)
398 do_gart_setup(gart, NULL); 398 do_gart_setup(gart, NULL);
399 399
400 gart_handle = gart; 400 gart_handle = gart;
401 bus_set_iommu(&platform_bus_type, &gart_iommu_ops);
401 return 0; 402 return 0;
402 403
403fail: 404fail:
@@ -450,7 +451,6 @@ static struct platform_driver tegra_gart_driver = {
450 451
451static int __devinit tegra_gart_init(void) 452static int __devinit tegra_gart_init(void)
452{ 453{
453 bus_set_iommu(&platform_bus_type, &gart_iommu_ops);
454 return platform_driver_register(&tegra_gart_driver); 454 return platform_driver_register(&tegra_gart_driver);
455} 455}
456 456
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index c0f7a426626..843123acbb8 100644
--- a/drivers/iommu/tegra-smmu.c
+++ b/drivers/iommu/tegra-smmu.c
@@ -696,10 +696,8 @@ static void __smmu_iommu_unmap(struct smmu_as *as, dma_addr_t iova)
696 *pte = _PTE_VACANT(iova); 696 *pte = _PTE_VACANT(iova);
697 FLUSH_CPU_DCACHE(pte, page, sizeof(*pte)); 697 FLUSH_CPU_DCACHE(pte, page, sizeof(*pte));
698 flush_ptc_and_tlb(as->smmu, as, iova, pte, page, 0); 698 flush_ptc_and_tlb(as->smmu, as, iova, pte, page, 0);
699 if (!--(*count)) { 699 if (!--(*count))
700 free_ptbl(as, iova); 700 free_ptbl(as, iova);
701 smmu_flush_regs(as->smmu, 0);
702 }
703} 701}
704 702
705static void __smmu_iommu_map_pfn(struct smmu_as *as, dma_addr_t iova, 703static void __smmu_iommu_map_pfn(struct smmu_as *as, dma_addr_t iova,
@@ -1234,6 +1232,7 @@ static int tegra_smmu_probe(struct platform_device *pdev)
1234 1232
1235 smmu_debugfs_create(smmu); 1233 smmu_debugfs_create(smmu);
1236 smmu_handle = smmu; 1234 smmu_handle = smmu;
1235 bus_set_iommu(&platform_bus_type, &smmu_iommu_ops);
1237 return 0; 1236 return 0;
1238} 1237}
1239 1238
@@ -1278,7 +1277,6 @@ static struct platform_driver tegra_smmu_driver = {
1278 1277
1279static int __devinit tegra_smmu_init(void) 1278static int __devinit tegra_smmu_init(void)
1280{ 1279{
1281 bus_set_iommu(&platform_bus_type, &smmu_iommu_ops);
1282 return platform_driver_register(&tegra_smmu_driver); 1280 return platform_driver_register(&tegra_smmu_driver);
1283} 1281}
1284 1282
diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c
index 99640d8c1db..7f182f0ff3d 100644
--- a/drivers/media/platform/omap3isp/isp.c
+++ b/drivers/media/platform/omap3isp/isp.c
@@ -61,6 +61,7 @@
61#include <linux/i2c.h> 61#include <linux/i2c.h>
62#include <linux/interrupt.h> 62#include <linux/interrupt.h>
63#include <linux/module.h> 63#include <linux/module.h>
64#include <linux/omap-iommu.h>
64#include <linux/platform_device.h> 65#include <linux/platform_device.h>
65#include <linux/regulator/consumer.h> 66#include <linux/regulator/consumer.h>
66#include <linux/slab.h> 67#include <linux/slab.h>
diff --git a/drivers/media/platform/omap3isp/isp.h b/drivers/media/platform/omap3isp/isp.h
index 8be7487c326..8d6866942b8 100644
--- a/drivers/media/platform/omap3isp/isp.h
+++ b/drivers/media/platform/omap3isp/isp.h
@@ -31,11 +31,9 @@
31#include <media/v4l2-device.h> 31#include <media/v4l2-device.h>
32#include <linux/device.h> 32#include <linux/device.h>
33#include <linux/io.h> 33#include <linux/io.h>
34#include <linux/iommu.h>
34#include <linux/platform_device.h> 35#include <linux/platform_device.h>
35#include <linux/wait.h> 36#include <linux/wait.h>
36#include <linux/iommu.h>
37#include <plat/iommu.h>
38#include <plat/iovmm.h>
39 37
40#include "ispstat.h" 38#include "ispstat.h"
41#include "ispccdc.h" 39#include "ispccdc.h"
diff --git a/drivers/media/platform/omap3isp/ispccdc.c b/drivers/media/platform/omap3isp/ispccdc.c
index aa9df9d71a7..60e60aa64fb 100644
--- a/drivers/media/platform/omap3isp/ispccdc.c
+++ b/drivers/media/platform/omap3isp/ispccdc.c
@@ -30,6 +30,7 @@
30#include <linux/device.h> 30#include <linux/device.h>
31#include <linux/dma-mapping.h> 31#include <linux/dma-mapping.h>
32#include <linux/mm.h> 32#include <linux/mm.h>
33#include <linux/omap-iommu.h>
33#include <linux/sched.h> 34#include <linux/sched.h>
34#include <linux/slab.h> 35#include <linux/slab.h>
35#include <media/v4l2-event.h> 36#include <media/v4l2-event.h>
diff --git a/drivers/media/platform/omap3isp/ispstat.c b/drivers/media/platform/omap3isp/ispstat.c
index b8640be692f..e7939869bda 100644
--- a/drivers/media/platform/omap3isp/ispstat.c
+++ b/drivers/media/platform/omap3isp/ispstat.c
@@ -26,6 +26,7 @@
26 */ 26 */
27 27
28#include <linux/dma-mapping.h> 28#include <linux/dma-mapping.h>
29#include <linux/omap-iommu.h>
29#include <linux/slab.h> 30#include <linux/slab.h>
30#include <linux/uaccess.h> 31#include <linux/uaccess.h>
31 32
diff --git a/drivers/media/platform/omap3isp/ispvideo.c b/drivers/media/platform/omap3isp/ispvideo.c
index 75cd309035f..6e74346cc35 100644
--- a/drivers/media/platform/omap3isp/ispvideo.c
+++ b/drivers/media/platform/omap3isp/ispvideo.c
@@ -27,6 +27,7 @@
27#include <linux/clk.h> 27#include <linux/clk.h>
28#include <linux/mm.h> 28#include <linux/mm.h>
29#include <linux/module.h> 29#include <linux/module.h>
30#include <linux/omap-iommu.h>
30#include <linux/pagemap.h> 31#include <linux/pagemap.h>
31#include <linux/scatterlist.h> 32#include <linux/scatterlist.h>
32#include <linux/sched.h> 33#include <linux/sched.h>
@@ -34,8 +35,6 @@
34#include <linux/vmalloc.h> 35#include <linux/vmalloc.h>
35#include <media/v4l2-dev.h> 36#include <media/v4l2-dev.h>
36#include <media/v4l2-ioctl.h> 37#include <media/v4l2-ioctl.h>
37#include <plat/iommu.h>
38#include <plat/iovmm.h>
39#include <plat/omap-pm.h> 38#include <plat/omap-pm.h>
40 39
41#include "ispvideo.h" 40#include "ispvideo.h"
diff --git a/include/linux/dma-debug.h b/include/linux/dma-debug.h
index 171ad8aedc8..fc0e34ce038 100644
--- a/include/linux/dma-debug.h
+++ b/include/linux/dma-debug.h
@@ -39,6 +39,8 @@ extern void debug_dma_map_page(struct device *dev, struct page *page,
39 int direction, dma_addr_t dma_addr, 39 int direction, dma_addr_t dma_addr,
40 bool map_single); 40 bool map_single);
41 41
42extern void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr);
43
42extern void debug_dma_unmap_page(struct device *dev, dma_addr_t addr, 44extern void debug_dma_unmap_page(struct device *dev, dma_addr_t addr,
43 size_t size, int direction, bool map_single); 45 size_t size, int direction, bool map_single);
44 46
@@ -105,6 +107,11 @@ static inline void debug_dma_map_page(struct device *dev, struct page *page,
105{ 107{
106} 108}
107 109
110static inline void debug_dma_mapping_error(struct device *dev,
111 dma_addr_t dma_addr)
112{
113}
114
108static inline void debug_dma_unmap_page(struct device *dev, dma_addr_t addr, 115static inline void debug_dma_unmap_page(struct device *dev, dma_addr_t addr,
109 size_t size, int direction, 116 size_t size, int direction,
110 bool map_single) 117 bool map_single)
diff --git a/include/linux/omap-iommu.h b/include/linux/omap-iommu.h
new file mode 100644
index 00000000000..cac78de09c0
--- /dev/null
+++ b/include/linux/omap-iommu.h
@@ -0,0 +1,52 @@
1/*
2 * omap iommu: simple virtual address space management
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef _INTEL_IOMMU_H_
14#define _INTEL_IOMMU_H_
15
16struct iovm_struct {
17 struct omap_iommu *iommu; /* iommu object which this belongs to */
18 u32 da_start; /* area definition */
19 u32 da_end;
20 u32 flags; /* IOVMF_: see below */
21 struct list_head list; /* linked in ascending order */
22 const struct sg_table *sgt; /* keep 'page' <-> 'da' mapping */
23 void *va; /* mpu side mapped address */
24};
25
26#define MMU_RAM_ENDIAN_SHIFT 9
27#define MMU_RAM_ENDIAN_LITTLE (0 << MMU_RAM_ENDIAN_SHIFT)
28#define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT)
29#define IOVMF_ENDIAN_LITTLE MMU_RAM_ENDIAN_LITTLE
30#define MMU_RAM_ELSZ_SHIFT 7
31#define IOVMF_ELSZ_8 MMU_RAM_ELSZ_8
32
33struct iommu_domain;
34
35extern struct iovm_struct *omap_find_iovm_area(struct device *dev, u32 da);
36extern u32
37omap_iommu_vmap(struct iommu_domain *domain, struct device *dev, u32 da,
38 const struct sg_table *sgt, u32 flags);
39extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain,
40 struct device *dev, u32 da);
41extern u32
42omap_iommu_vmalloc(struct iommu_domain *domain, struct device *dev,
43 u32 da, size_t bytes, u32 flags);
44extern void
45omap_iommu_vfree(struct iommu_domain *domain, struct device *dev,
46 const u32 da);
47extern void *omap_da_to_va(struct device *dev, u32 da);
48
49extern void omap_iommu_save_ctx(struct device *dev);
50extern void omap_iommu_restore_ctx(struct device *dev);
51
52#endif
diff --git a/include/linux/platform_data/iommu-omap.h b/include/linux/platform_data/iommu-omap.h
new file mode 100644
index 00000000000..5b429c43a29
--- /dev/null
+++ b/include/linux/platform_data/iommu-omap.h
@@ -0,0 +1,54 @@
1/*
2 * omap iommu: main structures
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/platform_device.h>
14
15#define MMU_REG_SIZE 256
16
17/**
18 * struct iommu_arch_data - omap iommu private data
19 * @name: name of the iommu device
20 * @iommu_dev: handle of the iommu device
21 *
22 * This is an omap iommu private data object, which binds an iommu user
23 * to its iommu device. This object should be placed at the iommu user's
24 * dev_archdata so generic IOMMU API can be used without having to
25 * utilize omap-specific plumbing anymore.
26 */
27struct omap_iommu_arch_data {
28 const char *name;
29 struct omap_iommu *iommu_dev;
30};
31
32/**
33 * struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod
34 * @da_start: device address where the va space starts.
35 * @da_end: device address where the va space ends.
36 * @nr_tlb_entries: number of entries supported by the translation
37 * look-aside buffer (TLB).
38 */
39struct omap_mmu_dev_attr {
40 u32 da_start;
41 u32 da_end;
42 int nr_tlb_entries;
43};
44
45struct iommu_platform_data {
46 const char *name;
47 const char *reset_name;
48 int nr_tlb_entries;
49 u32 da_start;
50 u32 da_end;
51
52 int (*assert_reset)(struct platform_device *pdev, const char *name);
53 int (*deassert_reset)(struct platform_device *pdev, const char *name);
54};
diff --git a/lib/dma-debug.c b/lib/dma-debug.c
index d84beb994f3..5e396accd3d 100644
--- a/lib/dma-debug.c
+++ b/lib/dma-debug.c
@@ -45,6 +45,12 @@ enum {
45 dma_debug_coherent, 45 dma_debug_coherent,
46}; 46};
47 47
48enum map_err_types {
49 MAP_ERR_CHECK_NOT_APPLICABLE,
50 MAP_ERR_NOT_CHECKED,
51 MAP_ERR_CHECKED,
52};
53
48#define DMA_DEBUG_STACKTRACE_ENTRIES 5 54#define DMA_DEBUG_STACKTRACE_ENTRIES 5
49 55
50struct dma_debug_entry { 56struct dma_debug_entry {
@@ -57,6 +63,7 @@ struct dma_debug_entry {
57 int direction; 63 int direction;
58 int sg_call_ents; 64 int sg_call_ents;
59 int sg_mapped_ents; 65 int sg_mapped_ents;
66 enum map_err_types map_err_type;
60#ifdef CONFIG_STACKTRACE 67#ifdef CONFIG_STACKTRACE
61 struct stack_trace stacktrace; 68 struct stack_trace stacktrace;
62 unsigned long st_entries[DMA_DEBUG_STACKTRACE_ENTRIES]; 69 unsigned long st_entries[DMA_DEBUG_STACKTRACE_ENTRIES];
@@ -114,6 +121,12 @@ static struct device_driver *current_driver __read_mostly;
114 121
115static DEFINE_RWLOCK(driver_name_lock); 122static DEFINE_RWLOCK(driver_name_lock);
116 123
124static const char *const maperr2str[] = {
125 [MAP_ERR_CHECK_NOT_APPLICABLE] = "dma map error check not applicable",
126 [MAP_ERR_NOT_CHECKED] = "dma map error not checked",
127 [MAP_ERR_CHECKED] = "dma map error checked",
128};
129
117static const char *type2name[4] = { "single", "page", 130static const char *type2name[4] = { "single", "page",
118 "scather-gather", "coherent" }; 131 "scather-gather", "coherent" };
119 132
@@ -376,11 +389,12 @@ void debug_dma_dump_mappings(struct device *dev)
376 list_for_each_entry(entry, &bucket->list, list) { 389 list_for_each_entry(entry, &bucket->list, list) {
377 if (!dev || dev == entry->dev) { 390 if (!dev || dev == entry->dev) {
378 dev_info(entry->dev, 391 dev_info(entry->dev,
379 "%s idx %d P=%Lx D=%Lx L=%Lx %s\n", 392 "%s idx %d P=%Lx D=%Lx L=%Lx %s %s\n",
380 type2name[entry->type], idx, 393 type2name[entry->type], idx,
381 (unsigned long long)entry->paddr, 394 (unsigned long long)entry->paddr,
382 entry->dev_addr, entry->size, 395 entry->dev_addr, entry->size,
383 dir2name[entry->direction]); 396 dir2name[entry->direction],
397 maperr2str[entry->map_err_type]);
384 } 398 }
385 } 399 }
386 400
@@ -844,16 +858,16 @@ static void check_unmap(struct dma_debug_entry *ref)
844 struct hash_bucket *bucket; 858 struct hash_bucket *bucket;
845 unsigned long flags; 859 unsigned long flags;
846 860
847 if (dma_mapping_error(ref->dev, ref->dev_addr)) {
848 err_printk(ref->dev, NULL, "DMA-API: device driver tries "
849 "to free an invalid DMA memory address\n");
850 return;
851 }
852
853 bucket = get_hash_bucket(ref, &flags); 861 bucket = get_hash_bucket(ref, &flags);
854 entry = bucket_find_exact(bucket, ref); 862 entry = bucket_find_exact(bucket, ref);
855 863
856 if (!entry) { 864 if (!entry) {
865 if (dma_mapping_error(ref->dev, ref->dev_addr)) {
866 err_printk(ref->dev, NULL,
867 "DMA-API: device driver tries "
868 "to free an invalid DMA memory address\n");
869 return;
870 }
857 err_printk(ref->dev, NULL, "DMA-API: device driver tries " 871 err_printk(ref->dev, NULL, "DMA-API: device driver tries "
858 "to free DMA memory it has not allocated " 872 "to free DMA memory it has not allocated "
859 "[device address=0x%016llx] [size=%llu bytes]\n", 873 "[device address=0x%016llx] [size=%llu bytes]\n",
@@ -910,6 +924,15 @@ static void check_unmap(struct dma_debug_entry *ref)
910 dir2name[ref->direction]); 924 dir2name[ref->direction]);
911 } 925 }
912 926
927 if (entry->map_err_type == MAP_ERR_NOT_CHECKED) {
928 err_printk(ref->dev, entry,
929 "DMA-API: device driver failed to check map error"
930 "[device address=0x%016llx] [size=%llu bytes] "
931 "[mapped as %s]",
932 ref->dev_addr, ref->size,
933 type2name[entry->type]);
934 }
935
913 hash_bucket_del(entry); 936 hash_bucket_del(entry);
914 dma_entry_free(entry); 937 dma_entry_free(entry);
915 938
@@ -1017,7 +1040,7 @@ void debug_dma_map_page(struct device *dev, struct page *page, size_t offset,
1017 if (unlikely(global_disable)) 1040 if (unlikely(global_disable))
1018 return; 1041 return;
1019 1042
1020 if (unlikely(dma_mapping_error(dev, dma_addr))) 1043 if (dma_mapping_error(dev, dma_addr))
1021 return; 1044 return;
1022 1045
1023 entry = dma_entry_alloc(); 1046 entry = dma_entry_alloc();
@@ -1030,6 +1053,7 @@ void debug_dma_map_page(struct device *dev, struct page *page, size_t offset,
1030 entry->dev_addr = dma_addr; 1053 entry->dev_addr = dma_addr;
1031 entry->size = size; 1054 entry->size = size;
1032 entry->direction = direction; 1055 entry->direction = direction;
1056 entry->map_err_type = MAP_ERR_NOT_CHECKED;
1033 1057
1034 if (map_single) 1058 if (map_single)
1035 entry->type = dma_debug_single; 1059 entry->type = dma_debug_single;
@@ -1045,6 +1069,30 @@ void debug_dma_map_page(struct device *dev, struct page *page, size_t offset,
1045} 1069}
1046EXPORT_SYMBOL(debug_dma_map_page); 1070EXPORT_SYMBOL(debug_dma_map_page);
1047 1071
1072void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
1073{
1074 struct dma_debug_entry ref;
1075 struct dma_debug_entry *entry;
1076 struct hash_bucket *bucket;
1077 unsigned long flags;
1078
1079 if (unlikely(global_disable))
1080 return;
1081
1082 ref.dev = dev;
1083 ref.dev_addr = dma_addr;
1084 bucket = get_hash_bucket(&ref, &flags);
1085 entry = bucket_find_exact(bucket, &ref);
1086
1087 if (!entry)
1088 goto out;
1089
1090 entry->map_err_type = MAP_ERR_CHECKED;
1091out:
1092 put_hash_bucket(bucket, &flags);
1093}
1094EXPORT_SYMBOL(debug_dma_mapping_error);
1095
1048void debug_dma_unmap_page(struct device *dev, dma_addr_t addr, 1096void debug_dma_unmap_page(struct device *dev, dma_addr_t addr,
1049 size_t size, int direction, bool map_single) 1097 size_t size, int direction, bool map_single)
1050{ 1098{
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-01 00:16:21 -0400