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-rw-r--r--arch/arm/mach-s5pc100/include/mach/regs-gpio.h7
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-gpio.h7
-rw-r--r--arch/arm/plat-s5p/include/plat/irqs.h7
-rw-r--r--arch/arm/plat-s5p/irq-eint.c10
-rw-r--r--arch/arm/plat-s5p/irq-gpioint.c16
5 files changed, 17 insertions, 30 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
index 6abe481e248..8c47536b117 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
@@ -64,13 +64,6 @@
64 64
65#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7)) 65#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7))
66 66
67/* values for S5P_EXTINT0 */
68#define S5P_EXTINT_LOWLEV (0x00)
69#define S5P_EXTINT_HILEV (0x01)
70#define S5P_EXTINT_FALLEDGE (0x02)
71#define S5P_EXTINT_RISEEDGE (0x03)
72#define S5P_EXTINT_BOTHEDGE (0x04)
73
74#define EINT_MODE S3C_GPIO_SFN(0x2) 67#define EINT_MODE S3C_GPIO_SFN(0x2)
75 68
76#define EINT_GPIO_0(x) S5PC100_GPH0(x) 69#define EINT_GPIO_0(x) S5PC100_GPH0(x)
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-gpio.h b/arch/arm/mach-s5pv210/include/mach/regs-gpio.h
index 49e029b4978..de0c8997607 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-gpio.h
@@ -31,13 +31,6 @@
31 31
32#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7)) 32#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7))
33 33
34/* values for S5P_EXTINT0 */
35#define S5P_EXTINT_LOWLEV (0x00)
36#define S5P_EXTINT_HILEV (0x01)
37#define S5P_EXTINT_FALLEDGE (0x02)
38#define S5P_EXTINT_RISEEDGE (0x03)
39#define S5P_EXTINT_BOTHEDGE (0x04)
40
41#define EINT_MODE S3C_GPIO_SFN(0xf) 34#define EINT_MODE S3C_GPIO_SFN(0xf)
42 35
43#define EINT_GPIO_0(x) S5PV210_GPH0(x) 36#define EINT_GPIO_0(x) S5PV210_GPH0(x)
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
index 23603c7f194..7f653bce3c1 100644
--- a/arch/arm/plat-s5p/include/plat/irqs.h
+++ b/arch/arm/plat-s5p/include/plat/irqs.h
@@ -103,4 +103,11 @@
103#define S5P_GPIOINT_GROUP_SIZE 8 103#define S5P_GPIOINT_GROUP_SIZE 8
104#define S5P_GPIOINT_COUNT (S5P_GPIOINT_GROUP_COUNT * S5P_GPIOINT_GROUP_SIZE) 104#define S5P_GPIOINT_COUNT (S5P_GPIOINT_GROUP_COUNT * S5P_GPIOINT_GROUP_SIZE)
105 105
106/* IRQ types common for all s5p platforms */
107#define S5P_IRQ_TYPE_LEVEL_LOW (0x00)
108#define S5P_IRQ_TYPE_LEVEL_HIGH (0x01)
109#define S5P_IRQ_TYPE_EDGE_FALLING (0x02)
110#define S5P_IRQ_TYPE_EDGE_RISING (0x03)
111#define S5P_IRQ_TYPE_EDGE_BOTH (0x04)
112
106#endif /* __ASM_PLAT_S5P_IRQS_H */ 113#endif /* __ASM_PLAT_S5P_IRQS_H */
diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c
index f36cd332702..752f1a645f9 100644
--- a/arch/arm/plat-s5p/irq-eint.c
+++ b/arch/arm/plat-s5p/irq-eint.c
@@ -67,23 +67,23 @@ static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type)
67 67
68 switch (type) { 68 switch (type) {
69 case IRQ_TYPE_EDGE_RISING: 69 case IRQ_TYPE_EDGE_RISING:
70 newvalue = S5P_EXTINT_RISEEDGE; 70 newvalue = S5P_IRQ_TYPE_EDGE_RISING;
71 break; 71 break;
72 72
73 case IRQ_TYPE_EDGE_FALLING: 73 case IRQ_TYPE_EDGE_FALLING:
74 newvalue = S5P_EXTINT_FALLEDGE; 74 newvalue = S5P_IRQ_TYPE_EDGE_FALLING;
75 break; 75 break;
76 76
77 case IRQ_TYPE_EDGE_BOTH: 77 case IRQ_TYPE_EDGE_BOTH:
78 newvalue = S5P_EXTINT_BOTHEDGE; 78 newvalue = S5P_IRQ_TYPE_EDGE_BOTH;
79 break; 79 break;
80 80
81 case IRQ_TYPE_LEVEL_LOW: 81 case IRQ_TYPE_LEVEL_LOW:
82 newvalue = S5P_EXTINT_LOWLEV; 82 newvalue = S5P_IRQ_TYPE_LEVEL_LOW;
83 break; 83 break;
84 84
85 case IRQ_TYPE_LEVEL_HIGH: 85 case IRQ_TYPE_LEVEL_HIGH:
86 newvalue = S5P_EXTINT_HILEV; 86 newvalue = S5P_IRQ_TYPE_LEVEL_HIGH;
87 break; 87 break;
88 88
89 default: 89 default:
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
index 768fd39a3a9..0e5dc8cbf5e 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -28,12 +28,6 @@
28#define GPIOINT_MASK_OFFSET 0x900 28#define GPIOINT_MASK_OFFSET 0x900
29#define GPIOINT_PEND_OFFSET 0xA00 29#define GPIOINT_PEND_OFFSET 0xA00
30 30
31#define GPIOINT_LEVEL_LOW 0x0
32#define GPIOINT_LEVEL_HIGH 0x1
33#define GPIOINT_EDGE_FALLING 0x2
34#define GPIOINT_EDGE_RISING 0x3
35#define GPIOINT_EDGE_BOTH 0x4
36
37static struct s3c_gpio_chip *irq_chips[S5P_GPIOINT_GROUP_MAXNR]; 31static struct s3c_gpio_chip *irq_chips[S5P_GPIOINT_GROUP_MAXNR];
38 32
39static int s5p_gpioint_get_group(unsigned int irq) 33static int s5p_gpioint_get_group(unsigned int irq)
@@ -118,19 +112,19 @@ static int s5p_gpioint_set_type(unsigned int irq, unsigned int type)
118 112
119 switch (type) { 113 switch (type) {
120 case IRQ_TYPE_EDGE_RISING: 114 case IRQ_TYPE_EDGE_RISING:
121 type = GPIOINT_EDGE_RISING; 115 type = S5P_IRQ_TYPE_EDGE_RISING;
122 break; 116 break;
123 case IRQ_TYPE_EDGE_FALLING: 117 case IRQ_TYPE_EDGE_FALLING:
124 type = GPIOINT_EDGE_FALLING; 118 type = S5P_IRQ_TYPE_EDGE_FALLING;
125 break; 119 break;
126 case IRQ_TYPE_EDGE_BOTH: 120 case IRQ_TYPE_EDGE_BOTH:
127 type = GPIOINT_EDGE_BOTH; 121 type = S5P_IRQ_TYPE_EDGE_BOTH;
128 break; 122 break;
129 case IRQ_TYPE_LEVEL_HIGH: 123 case IRQ_TYPE_LEVEL_HIGH:
130 type = GPIOINT_LEVEL_HIGH; 124 type = S5P_IRQ_TYPE_LEVEL_HIGH;
131 break; 125 break;
132 case IRQ_TYPE_LEVEL_LOW: 126 case IRQ_TYPE_LEVEL_LOW:
133 type = GPIOINT_LEVEL_LOW; 127 type = S5P_IRQ_TYPE_LEVEL_LOW;
134 break; 128 break;
135 case IRQ_TYPE_NONE: 129 case IRQ_TYPE_NONE:
136 default: 130 default: