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-rw-r--r--drivers/net/wireless/ath9k/hw.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath9k/hw.c b/drivers/net/wireless/ath9k/hw.c
index cfcaaf886d0..cad8e39c201 100644
--- a/drivers/net/wireless/ath9k/hw.c
+++ b/drivers/net/wireless/ath9k/hw.c
@@ -2666,7 +2666,6 @@ void ath9k_hw_configpcipowersave(struct ath_hw *ah, int restore)
2666 REG_WRITE(ah, INI_RA(&ah->iniPcieSerdes, i, 0), 2666 REG_WRITE(ah, INI_RA(&ah->iniPcieSerdes, i, 0),
2667 INI_RA(&ah->iniPcieSerdes, i, 1)); 2667 INI_RA(&ah->iniPcieSerdes, i, 1));
2668 } 2668 }
2669 udelay(1000);
2670 } else if (AR_SREV_9280(ah) && 2669 } else if (AR_SREV_9280(ah) &&
2671 (ah->hw_version.macRev == AR_SREV_REVISION_9280_10)) { 2670 (ah->hw_version.macRev == AR_SREV_REVISION_9280_10)) {
2672 REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fd00); 2671 REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fd00);
@@ -2690,7 +2689,6 @@ void ath9k_hw_configpcipowersave(struct ath_hw *ah, int restore)
2690 /* Load the new settings */ 2689 /* Load the new settings */
2691 REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000); 2690 REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
2692 2691
2693 udelay(1000);
2694 } else { 2692 } else {
2695 REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00); 2693 REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
2696 REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924); 2694 REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
@@ -2714,6 +2712,8 @@ void ath9k_hw_configpcipowersave(struct ath_hw *ah, int restore)
2714 REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000); 2712 REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
2715 } 2713 }
2716 2714
2715 udelay(1000);
2716
2717 /* set bit 19 to allow forcing of pcie core into L1 state */ 2717 /* set bit 19 to allow forcing of pcie core into L1 state */
2718 REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA); 2718 REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA);
2719 2719