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-rw-r--r--arch/arm/mach-tegra/cpu-tegra.c6
-rw-r--r--arch/arm/mach-tegra/dma.c4
-rw-r--r--arch/arm/mach-tegra/pcie.c6
-rw-r--r--arch/arm/mach-tegra/powergate.c4
-rw-r--r--arch/arm/mach-tegra/tegra2_clocks.c58
-rw-r--r--arch/arm/mach-tegra/tegra30_clocks.c28
-rw-r--r--arch/arm/mach-tegra/timer.c4
-rw-r--r--arch/arm/mach-tegra/usb_phy.c16
-rw-r--r--drivers/crypto/tegra-aes.c12
-rw-r--r--drivers/i2c/busses/i2c-tegra.c10
-rw-r--r--drivers/input/keyboard/tegra-kbc.c4
-rw-r--r--drivers/mmc/host/sdhci-tegra.c6
-rw-r--r--drivers/spi/spi-tegra.c4
-rw-r--r--drivers/staging/nvec/nvec.c8
-rw-r--r--drivers/usb/host/ehci-tegra.c20
-rw-r--r--sound/soc/tegra/tegra20_i2s.c4
-rw-r--r--sound/soc/tegra/tegra20_spdif.c4
-rw-r--r--sound/soc/tegra/tegra30_ahub.c8
-rw-r--r--sound/soc/tegra/tegra30_i2s.c4
-rw-r--r--sound/soc/tegra/tegra_asoc_utils.c12
20 files changed, 119 insertions, 103 deletions
diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c
index 7a065f0cf63..ceb52db1e2f 100644
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ b/arch/arm/mach-tegra/cpu-tegra.c
@@ -189,8 +189,8 @@ static int tegra_cpu_init(struct cpufreq_policy *policy)
189 return PTR_ERR(emc_clk); 189 return PTR_ERR(emc_clk);
190 } 190 }
191 191
192 clk_enable(emc_clk); 192 clk_prepare_enable(emc_clk);
193 clk_enable(cpu_clk); 193 clk_prepare_enable(cpu_clk);
194 194
195 cpufreq_frequency_table_cpuinfo(policy, freq_table); 195 cpufreq_frequency_table_cpuinfo(policy, freq_table);
196 cpufreq_frequency_table_get_attr(freq_table, policy->cpu); 196 cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
@@ -212,7 +212,7 @@ static int tegra_cpu_init(struct cpufreq_policy *policy)
212static int tegra_cpu_exit(struct cpufreq_policy *policy) 212static int tegra_cpu_exit(struct cpufreq_policy *policy)
213{ 213{
214 cpufreq_frequency_table_cpuinfo(policy, freq_table); 214 cpufreq_frequency_table_cpuinfo(policy, freq_table);
215 clk_disable(emc_clk); 215 clk_disable_unprepare(emc_clk);
216 clk_put(emc_clk); 216 clk_put(emc_clk);
217 clk_put(cpu_clk); 217 clk_put(cpu_clk);
218 return 0; 218 return 0;
diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c
index abea4f6e2dd..29c5114d607 100644
--- a/arch/arm/mach-tegra/dma.c
+++ b/arch/arm/mach-tegra/dma.c
@@ -714,13 +714,13 @@ int __init tegra_dma_init(void)
714 714
715 bitmap_fill(channel_usage, NV_DMA_MAX_CHANNELS); 715 bitmap_fill(channel_usage, NV_DMA_MAX_CHANNELS);
716 716
717 c = clk_get_sys("tegra-dma", NULL); 717 c = clk_get_sys("tegra-apbdma", NULL);
718 if (IS_ERR(c)) { 718 if (IS_ERR(c)) {
719 pr_err("Unable to get clock for APB DMA\n"); 719 pr_err("Unable to get clock for APB DMA\n");
720 ret = PTR_ERR(c); 720 ret = PTR_ERR(c);
721 goto fail; 721 goto fail;
722 } 722 }
723 ret = clk_enable(c); 723 ret = clk_prepare_enable(c);
724 if (ret != 0) { 724 if (ret != 0) {
725 pr_err("Unable to enable clock for APB DMA\n"); 725 pr_err("Unable to enable clock for APB DMA\n");
726 goto fail; 726 goto fail;
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 0e09137506e..d3ad5150d66 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -723,9 +723,9 @@ static int tegra_pcie_power_regate(void)
723 723
724 tegra_pcie_xclk_clamp(false); 724 tegra_pcie_xclk_clamp(false);
725 725
726 clk_enable(tegra_pcie.afi_clk); 726 clk_prepare_enable(tegra_pcie.afi_clk);
727 clk_enable(tegra_pcie.pex_clk); 727 clk_prepare_enable(tegra_pcie.pex_clk);
728 return clk_enable(tegra_pcie.pll_e); 728 return clk_prepare_enable(tegra_pcie.pll_e);
729} 729}
730 730
731static int tegra_pcie_clocks_get(void) 731static int tegra_pcie_clocks_get(void)
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index f5b12fb4ff1..15d506501cc 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -146,7 +146,7 @@ int tegra_powergate_sequence_power_up(int id, struct clk *clk)
146 if (ret) 146 if (ret)
147 goto err_power; 147 goto err_power;
148 148
149 ret = clk_enable(clk); 149 ret = clk_prepare_enable(clk);
150 if (ret) 150 if (ret)
151 goto err_clk; 151 goto err_clk;
152 152
@@ -162,7 +162,7 @@ int tegra_powergate_sequence_power_up(int id, struct clk *clk)
162 return 0; 162 return 0;
163 163
164err_clamp: 164err_clamp:
165 clk_disable(clk); 165 clk_disable_unprepare(clk);
166err_clk: 166err_clk:
167 tegra_powergate_power_off(id); 167 tegra_powergate_power_off(id);
168err_power: 168err_power:
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index b59315ce369..a703844b206 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -69,6 +69,8 @@
69 69
70#define PERIPH_CLK_SOURCE_MASK (3<<30) 70#define PERIPH_CLK_SOURCE_MASK (3<<30)
71#define PERIPH_CLK_SOURCE_SHIFT 30 71#define PERIPH_CLK_SOURCE_SHIFT 30
72#define PERIPH_CLK_SOURCE_PWM_MASK (7<<28)
73#define PERIPH_CLK_SOURCE_PWM_SHIFT 28
72#define PERIPH_CLK_SOURCE_ENABLE (1<<28) 74#define PERIPH_CLK_SOURCE_ENABLE (1<<28)
73#define PERIPH_CLK_SOURCE_DIVU71_MASK 0xFF 75#define PERIPH_CLK_SOURCE_DIVU71_MASK 0xFF
74#define PERIPH_CLK_SOURCE_DIVU16_MASK 0xFFFF 76#define PERIPH_CLK_SOURCE_DIVU16_MASK 0xFFFF
@@ -908,9 +910,20 @@ static void tegra2_periph_clk_init(struct clk *c)
908 u32 val = clk_readl(c->reg); 910 u32 val = clk_readl(c->reg);
909 const struct clk_mux_sel *mux = NULL; 911 const struct clk_mux_sel *mux = NULL;
910 const struct clk_mux_sel *sel; 912 const struct clk_mux_sel *sel;
913 u32 shift;
914 u32 mask;
915
916 if (c->flags & MUX_PWM) {
917 shift = PERIPH_CLK_SOURCE_PWM_SHIFT;
918 mask = PERIPH_CLK_SOURCE_PWM_MASK;
919 } else {
920 shift = PERIPH_CLK_SOURCE_SHIFT;
921 mask = PERIPH_CLK_SOURCE_MASK;
922 }
923
911 if (c->flags & MUX) { 924 if (c->flags & MUX) {
912 for (sel = c->inputs; sel->input != NULL; sel++) { 925 for (sel = c->inputs; sel->input != NULL; sel++) {
913 if (val >> PERIPH_CLK_SOURCE_SHIFT == sel->value) 926 if ((val & mask) >> shift == sel->value)
914 mux = sel; 927 mux = sel;
915 } 928 }
916 BUG_ON(!mux); 929 BUG_ON(!mux);
@@ -1023,12 +1036,23 @@ static int tegra2_periph_clk_set_parent(struct clk *c, struct clk *p)
1023{ 1036{
1024 u32 val; 1037 u32 val;
1025 const struct clk_mux_sel *sel; 1038 const struct clk_mux_sel *sel;
1039 u32 mask, shift;
1040
1026 pr_debug("%s: %s %s\n", __func__, c->name, p->name); 1041 pr_debug("%s: %s %s\n", __func__, c->name, p->name);
1042
1043 if (c->flags & MUX_PWM) {
1044 shift = PERIPH_CLK_SOURCE_PWM_SHIFT;
1045 mask = PERIPH_CLK_SOURCE_PWM_MASK;
1046 } else {
1047 shift = PERIPH_CLK_SOURCE_SHIFT;
1048 mask = PERIPH_CLK_SOURCE_MASK;
1049 }
1050
1027 for (sel = c->inputs; sel->input != NULL; sel++) { 1051 for (sel = c->inputs; sel->input != NULL; sel++) {
1028 if (sel->input == p) { 1052 if (sel->input == p) {
1029 val = clk_readl(c->reg); 1053 val = clk_readl(c->reg);
1030 val &= ~PERIPH_CLK_SOURCE_MASK; 1054 val &= ~mask;
1031 val |= (sel->value) << PERIPH_CLK_SOURCE_SHIFT; 1055 val |= (sel->value) << shift;
1032 1056
1033 if (c->refcnt) 1057 if (c->refcnt)
1034 clk_enable(p); 1058 clk_enable(p);
@@ -2149,14 +2173,14 @@ static struct clk tegra_clk_emc = {
2149 } 2173 }
2150 2174
2151static struct clk tegra_list_clks[] = { 2175static struct clk tegra_list_clks[] = {
2152 PERIPH_CLK("apbdma", "tegra-dma", NULL, 34, 0, 108000000, mux_pclk, 0), 2176 PERIPH_CLK("apbdma", "tegra-apbdma", NULL, 34, 0, 108000000, mux_pclk, 0),
2153 PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET), 2177 PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET),
2154 PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0), 2178 PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0),
2155 PERIPH_CLK("i2s1", "tegra20-i2s.0", NULL, 11, 0x100, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), 2179 PERIPH_CLK("i2s1", "tegra20-i2s.0", NULL, 11, 0x100, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71),
2156 PERIPH_CLK("i2s2", "tegra20-i2s.1", NULL, 18, 0x104, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), 2180 PERIPH_CLK("i2s2", "tegra20-i2s.1", NULL, 18, 0x104, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71),
2157 PERIPH_CLK("spdif_out", "spdif_out", NULL, 10, 0x108, 100000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), 2181 PERIPH_CLK("spdif_out", "spdif_out", NULL, 10, 0x108, 100000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71),
2158 PERIPH_CLK("spdif_in", "spdif_in", NULL, 10, 0x10c, 100000000, mux_pllp_pllc_pllm, MUX | DIV_U71), 2182 PERIPH_CLK("spdif_in", "spdif_in", NULL, 10, 0x10c, 100000000, mux_pllp_pllc_pllm, MUX | DIV_U71),
2159 PERIPH_CLK("pwm", "pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_audio_clkm_clk32, MUX | DIV_U71), 2183 PERIPH_CLK("pwm", "tegra-pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_audio_clkm_clk32, MUX | DIV_U71 | MUX_PWM),
2160 PERIPH_CLK("spi", "spi", NULL, 43, 0x114, 40000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), 2184 PERIPH_CLK("spi", "spi", NULL, 43, 0x114, 40000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71),
2161 PERIPH_CLK("xio", "xio", NULL, 45, 0x120, 150000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), 2185 PERIPH_CLK("xio", "xio", NULL, 45, 0x120, 150000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71),
2162 PERIPH_CLK("twc", "twc", NULL, 16, 0x12c, 150000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), 2186 PERIPH_CLK("twc", "twc", NULL, 16, 0x12c, 150000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71),
@@ -2189,11 +2213,11 @@ static struct clk tegra_list_clks[] = {
2189 PERIPH_CLK("i2c2_i2c", "tegra-i2c.1", "i2c", 0, 0, 72000000, mux_pllp_out3, 0), 2213 PERIPH_CLK("i2c2_i2c", "tegra-i2c.1", "i2c", 0, 0, 72000000, mux_pllp_out3, 0),
2190 PERIPH_CLK("i2c3_i2c", "tegra-i2c.2", "i2c", 0, 0, 72000000, mux_pllp_out3, 0), 2214 PERIPH_CLK("i2c3_i2c", "tegra-i2c.2", "i2c", 0, 0, 72000000, mux_pllp_out3, 0),
2191 PERIPH_CLK("dvc_i2c", "tegra-i2c.3", "i2c", 0, 0, 72000000, mux_pllp_out3, 0), 2215 PERIPH_CLK("dvc_i2c", "tegra-i2c.3", "i2c", 0, 0, 72000000, mux_pllp_out3, 0),
2192 PERIPH_CLK("uarta", "uart.0", NULL, 6, 0x178, 600000000, mux_pllp_pllc_pllm_clkm, MUX), 2216 PERIPH_CLK("uarta", "tegra-uart.0", NULL, 6, 0x178, 600000000, mux_pllp_pllc_pllm_clkm, MUX),
2193 PERIPH_CLK("uartb", "uart.1", NULL, 7, 0x17c, 600000000, mux_pllp_pllc_pllm_clkm, MUX), 2217 PERIPH_CLK("uartb", "tegra-uart.1", NULL, 7, 0x17c, 600000000, mux_pllp_pllc_pllm_clkm, MUX),
2194 PERIPH_CLK("uartc", "uart.2", NULL, 55, 0x1a0, 600000000, mux_pllp_pllc_pllm_clkm, MUX), 2218 PERIPH_CLK("uartc", "tegra-uart.2", NULL, 55, 0x1a0, 600000000, mux_pllp_pllc_pllm_clkm, MUX),
2195 PERIPH_CLK("uartd", "uart.3", NULL, 65, 0x1c0, 600000000, mux_pllp_pllc_pllm_clkm, MUX), 2219 PERIPH_CLK("uartd", "tegra-uart.3", NULL, 65, 0x1c0, 600000000, mux_pllp_pllc_pllm_clkm, MUX),
2196 PERIPH_CLK("uarte", "uart.4", NULL, 66, 0x1c4, 600000000, mux_pllp_pllc_pllm_clkm, MUX), 2220 PERIPH_CLK("uarte", "tegra-uart.4", NULL, 66, 0x1c4, 600000000, mux_pllp_pllc_pllm_clkm, MUX),
2197 PERIPH_CLK("3d", "3d", NULL, 24, 0x158, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | PERIPH_MANUAL_RESET), /* scales with voltage and process_id */ 2221 PERIPH_CLK("3d", "3d", NULL, 24, 0x158, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | PERIPH_MANUAL_RESET), /* scales with voltage and process_id */
2198 PERIPH_CLK("2d", "2d", NULL, 21, 0x15c, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */ 2222 PERIPH_CLK("2d", "2d", NULL, 21, 0x15c, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */
2199 PERIPH_CLK("vi", "tegra_camera", "vi", 20, 0x148, 150000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */ 2223 PERIPH_CLK("vi", "tegra_camera", "vi", 20, 0x148, 150000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */
@@ -2245,20 +2269,16 @@ static struct clk tegra_list_clks[] = {
2245 * table under two names. 2269 * table under two names.
2246 */ 2270 */
2247static struct clk_duplicate tegra_clk_duplicates[] = { 2271static struct clk_duplicate tegra_clk_duplicates[] = {
2248 CLK_DUPLICATE("uarta", "tegra_uart.0", NULL), 2272 CLK_DUPLICATE("uarta", "serial8250.0", NULL),
2249 CLK_DUPLICATE("uartb", "tegra_uart.1", NULL), 2273 CLK_DUPLICATE("uartb", "serial8250.1", NULL),
2250 CLK_DUPLICATE("uartc", "tegra_uart.2", NULL), 2274 CLK_DUPLICATE("uartc", "serial8250.2", NULL),
2251 CLK_DUPLICATE("uartd", "tegra_uart.3", NULL), 2275 CLK_DUPLICATE("uartd", "serial8250.3", NULL),
2252 CLK_DUPLICATE("uarte", "tegra_uart.4", NULL), 2276 CLK_DUPLICATE("uarte", "serial8250.4", NULL),
2253 CLK_DUPLICATE("usbd", "utmip-pad", NULL), 2277 CLK_DUPLICATE("usbd", "utmip-pad", NULL),
2254 CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), 2278 CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL),
2255 CLK_DUPLICATE("usbd", "tegra-otg", NULL), 2279 CLK_DUPLICATE("usbd", "tegra-otg", NULL),
2256 CLK_DUPLICATE("hdmi", "tegradc.0", "hdmi"), 2280 CLK_DUPLICATE("hdmi", "tegradc.0", "hdmi"),
2257 CLK_DUPLICATE("hdmi", "tegradc.1", "hdmi"), 2281 CLK_DUPLICATE("hdmi", "tegradc.1", "hdmi"),
2258 CLK_DUPLICATE("pwm", "tegra_pwm.0", NULL),
2259 CLK_DUPLICATE("pwm", "tegra_pwm.1", NULL),
2260 CLK_DUPLICATE("pwm", "tegra_pwm.2", NULL),
2261 CLK_DUPLICATE("pwm", "tegra_pwm.3", NULL),
2262 CLK_DUPLICATE("host1x", "tegra_grhost", "host1x"), 2282 CLK_DUPLICATE("host1x", "tegra_grhost", "host1x"),
2263 CLK_DUPLICATE("2d", "tegra_grhost", "gr2d"), 2283 CLK_DUPLICATE("2d", "tegra_grhost", "gr2d"),
2264 CLK_DUPLICATE("3d", "tegra_grhost", "gr3d"), 2284 CLK_DUPLICATE("3d", "tegra_grhost", "gr3d"),
diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c
index e33fe4b14a2..6674f100e16 100644
--- a/arch/arm/mach-tegra/tegra30_clocks.c
+++ b/arch/arm/mach-tegra/tegra30_clocks.c
@@ -2871,7 +2871,7 @@ static struct clk tegra30_clk_twd = {
2871 }, \ 2871 }, \
2872 } 2872 }
2873struct clk tegra_list_clks[] = { 2873struct clk tegra_list_clks[] = {
2874 PERIPH_CLK("apbdma", "tegra-dma", NULL, 34, 0, 26000000, mux_clk_m, 0), 2874 PERIPH_CLK("apbdma", "tegra-apbdma", NULL, 34, 0, 26000000, mux_clk_m, 0),
2875 PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET | PERIPH_ON_APB), 2875 PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET | PERIPH_ON_APB),
2876 PERIPH_CLK("kbc", "tegra-kbc", NULL, 36, 0, 32768, mux_clk_32k, PERIPH_NO_RESET | PERIPH_ON_APB), 2876 PERIPH_CLK("kbc", "tegra-kbc", NULL, 36, 0, 32768, mux_clk_32k, PERIPH_NO_RESET | PERIPH_ON_APB),
2877 PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0), 2877 PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0),
@@ -2886,7 +2886,7 @@ struct clk tegra_list_clks[] = {
2886 PERIPH_CLK("i2s4", "tegra30-i2s.4", NULL, 102, 0x3c0, 26000000, mux_pllaout0_audio4_2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB), 2886 PERIPH_CLK("i2s4", "tegra30-i2s.4", NULL, 102, 0x3c0, 26000000, mux_pllaout0_audio4_2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB),
2887 PERIPH_CLK("spdif_out", "tegra30-spdif", "spdif_out", 10, 0x108, 100000000, mux_pllaout0_audio_2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB), 2887 PERIPH_CLK("spdif_out", "tegra30-spdif", "spdif_out", 10, 0x108, 100000000, mux_pllaout0_audio_2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB),
2888 PERIPH_CLK("spdif_in", "tegra30-spdif", "spdif_in", 10, 0x10c, 100000000, mux_pllp_pllc_pllm, MUX | DIV_U71 | PERIPH_ON_APB), 2888 PERIPH_CLK("spdif_in", "tegra30-spdif", "spdif_in", 10, 0x10c, 100000000, mux_pllp_pllc_pllm, MUX | DIV_U71 | PERIPH_ON_APB),
2889 PERIPH_CLK("pwm", "pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_clk32_clkm, MUX | MUX_PWM | DIV_U71 | PERIPH_ON_APB), 2889 PERIPH_CLK("pwm", "tegra-pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_clk32_clkm, MUX | MUX_PWM | DIV_U71 | PERIPH_ON_APB),
2890 PERIPH_CLK("d_audio", "tegra30-ahub", "d_audio", 106, 0x3d0, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), 2890 PERIPH_CLK("d_audio", "tegra30-ahub", "d_audio", 106, 0x3d0, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71),
2891 PERIPH_CLK("dam0", "tegra30-dam.0", NULL, 108, 0x3d8, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), 2891 PERIPH_CLK("dam0", "tegra30-dam.0", NULL, 108, 0x3d8, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71),
2892 PERIPH_CLK("dam1", "tegra30-dam.1", NULL, 109, 0x3dc, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), 2892 PERIPH_CLK("dam1", "tegra30-dam.1", NULL, 109, 0x3dc, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71),
@@ -2924,16 +2924,11 @@ struct clk tegra_list_clks[] = {
2924 PERIPH_CLK("i2c3", "tegra-i2c.2", NULL, 67, 0x1b8, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PERIPH_ON_APB), 2924 PERIPH_CLK("i2c3", "tegra-i2c.2", NULL, 67, 0x1b8, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PERIPH_ON_APB),
2925 PERIPH_CLK("i2c4", "tegra-i2c.3", NULL, 103, 0x3c4, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PERIPH_ON_APB), 2925 PERIPH_CLK("i2c4", "tegra-i2c.3", NULL, 103, 0x3c4, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PERIPH_ON_APB),
2926 PERIPH_CLK("i2c5", "tegra-i2c.4", NULL, 47, 0x128, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PERIPH_ON_APB), 2926 PERIPH_CLK("i2c5", "tegra-i2c.4", NULL, 47, 0x128, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PERIPH_ON_APB),
2927 PERIPH_CLK("uarta", "tegra_uart.0", NULL, 6, 0x178, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), 2927 PERIPH_CLK("uarta", "tegra-uart.0", NULL, 6, 0x178, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB),
2928 PERIPH_CLK("uartb", "tegra_uart.1", NULL, 7, 0x17c, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), 2928 PERIPH_CLK("uartb", "tegra-uart.1", NULL, 7, 0x17c, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB),
2929 PERIPH_CLK("uartc", "tegra_uart.2", NULL, 55, 0x1a0, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), 2929 PERIPH_CLK("uartc", "tegra-uart.2", NULL, 55, 0x1a0, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB),
2930 PERIPH_CLK("uartd", "tegra_uart.3", NULL, 65, 0x1c0, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), 2930 PERIPH_CLK("uartd", "tegra-uart.3", NULL, 65, 0x1c0, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB),
2931 PERIPH_CLK("uarte", "tegra_uart.4", NULL, 66, 0x1c4, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), 2931 PERIPH_CLK("uarte", "tegra-uart.4", NULL, 66, 0x1c4, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB),
2932 PERIPH_CLK("uarta_dbg", "serial8250.0", "uarta", 6, 0x178, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB),
2933 PERIPH_CLK("uartb_dbg", "serial8250.0", "uartb", 7, 0x17c, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB),
2934 PERIPH_CLK("uartc_dbg", "serial8250.0", "uartc", 55, 0x1a0, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB),
2935 PERIPH_CLK("uartd_dbg", "serial8250.0", "uartd", 65, 0x1c0, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB),
2936 PERIPH_CLK("uarte_dbg", "serial8250.0", "uarte", 66, 0x1c4, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB),
2937 PERIPH_CLK_EX("vi", "tegra_camera", "vi", 20, 0x148, 425000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT, &tegra_vi_clk_ops), 2932 PERIPH_CLK_EX("vi", "tegra_camera", "vi", 20, 0x148, 425000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT, &tegra_vi_clk_ops),
2938 PERIPH_CLK("3d", "3d", NULL, 24, 0x158, 520000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT | DIV_U71_IDLE | PERIPH_MANUAL_RESET), 2933 PERIPH_CLK("3d", "3d", NULL, 24, 0x158, 520000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT | DIV_U71_IDLE | PERIPH_MANUAL_RESET),
2939 PERIPH_CLK("3d2", "3d2", NULL, 98, 0x3b0, 520000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT | DIV_U71_IDLE | PERIPH_MANUAL_RESET), 2934 PERIPH_CLK("3d2", "3d2", NULL, 98, 0x3b0, 520000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT | DIV_U71_IDLE | PERIPH_MANUAL_RESET),
@@ -2983,6 +2978,11 @@ struct clk tegra_list_clks[] = {
2983 * table under two names. 2978 * table under two names.
2984 */ 2979 */
2985struct clk_duplicate tegra_clk_duplicates[] = { 2980struct clk_duplicate tegra_clk_duplicates[] = {
2981 CLK_DUPLICATE("uarta", "serial8250.0", NULL),
2982 CLK_DUPLICATE("uartb", "serial8250.1", NULL),
2983 CLK_DUPLICATE("uartc", "serial8250.2", NULL),
2984 CLK_DUPLICATE("uartd", "serial8250.3", NULL),
2985 CLK_DUPLICATE("uarte", "serial8250.4", NULL),
2986 CLK_DUPLICATE("usbd", "utmip-pad", NULL), 2986 CLK_DUPLICATE("usbd", "utmip-pad", NULL),
2987 CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), 2987 CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL),
2988 CLK_DUPLICATE("usbd", "tegra-otg", NULL), 2988 CLK_DUPLICATE("usbd", "tegra-otg", NULL),
@@ -2990,10 +2990,6 @@ struct clk_duplicate tegra_clk_duplicates[] = {
2990 CLK_DUPLICATE("hdmi", "tegradc.1", "hdmi"), 2990 CLK_DUPLICATE("hdmi", "tegradc.1", "hdmi"),
2991 CLK_DUPLICATE("dsib", "tegradc.0", "dsib"), 2991 CLK_DUPLICATE("dsib", "tegradc.0", "dsib"),
2992 CLK_DUPLICATE("dsia", "tegradc.1", "dsia"), 2992 CLK_DUPLICATE("dsia", "tegradc.1", "dsia"),
2993 CLK_DUPLICATE("pwm", "tegra_pwm.0", NULL),
2994 CLK_DUPLICATE("pwm", "tegra_pwm.1", NULL),
2995 CLK_DUPLICATE("pwm", "tegra_pwm.2", NULL),
2996 CLK_DUPLICATE("pwm", "tegra_pwm.3", NULL),
2997 CLK_DUPLICATE("bsev", "tegra-avp", "bsev"), 2993 CLK_DUPLICATE("bsev", "tegra-avp", "bsev"),
2998 CLK_DUPLICATE("bsev", "nvavp", "bsev"), 2994 CLK_DUPLICATE("bsev", "nvavp", "bsev"),
2999 CLK_DUPLICATE("vde", "tegra-aes", "vde"), 2995 CLK_DUPLICATE("vde", "tegra-aes", "vde"),
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index 315672c7bd4..57b5bdc13b9 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -189,7 +189,7 @@ static void __init tegra_init_timer(void)
189 " Assuming 12Mhz input clock.\n"); 189 " Assuming 12Mhz input clock.\n");
190 rate = 12000000; 190 rate = 12000000;
191 } else { 191 } else {
192 clk_enable(clk); 192 clk_prepare_enable(clk);
193 rate = clk_get_rate(clk); 193 rate = clk_get_rate(clk);
194 } 194 }
195 195
@@ -201,7 +201,7 @@ static void __init tegra_init_timer(void)
201 if (IS_ERR(clk)) 201 if (IS_ERR(clk))
202 pr_warn("Unable to get rtc-tegra clock\n"); 202 pr_warn("Unable to get rtc-tegra clock\n");
203 else 203 else
204 clk_enable(clk); 204 clk_prepare_enable(clk);
205 205
206 switch (rate) { 206 switch (rate) {
207 case 12000000: 207 case 12000000:
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c
index 54e353c8e30..022b33a05c3 100644
--- a/arch/arm/mach-tegra/usb_phy.c
+++ b/arch/arm/mach-tegra/usb_phy.c
@@ -247,7 +247,7 @@ static void utmip_pad_power_on(struct tegra_usb_phy *phy)
247 unsigned long val, flags; 247 unsigned long val, flags;
248 void __iomem *base = phy->pad_regs; 248 void __iomem *base = phy->pad_regs;
249 249
250 clk_enable(phy->pad_clk); 250 clk_prepare_enable(phy->pad_clk);
251 251
252 spin_lock_irqsave(&utmip_pad_lock, flags); 252 spin_lock_irqsave(&utmip_pad_lock, flags);
253 253
@@ -259,7 +259,7 @@ static void utmip_pad_power_on(struct tegra_usb_phy *phy)
259 259
260 spin_unlock_irqrestore(&utmip_pad_lock, flags); 260 spin_unlock_irqrestore(&utmip_pad_lock, flags);
261 261
262 clk_disable(phy->pad_clk); 262 clk_disable_unprepare(phy->pad_clk);
263} 263}
264 264
265static int utmip_pad_power_off(struct tegra_usb_phy *phy) 265static int utmip_pad_power_off(struct tegra_usb_phy *phy)
@@ -272,7 +272,7 @@ static int utmip_pad_power_off(struct tegra_usb_phy *phy)
272 return -EINVAL; 272 return -EINVAL;
273 } 273 }
274 274
275 clk_enable(phy->pad_clk); 275 clk_prepare_enable(phy->pad_clk);
276 276
277 spin_lock_irqsave(&utmip_pad_lock, flags); 277 spin_lock_irqsave(&utmip_pad_lock, flags);
278 278
@@ -284,7 +284,7 @@ static int utmip_pad_power_off(struct tegra_usb_phy *phy)
284 284
285 spin_unlock_irqrestore(&utmip_pad_lock, flags); 285 spin_unlock_irqrestore(&utmip_pad_lock, flags);
286 286
287 clk_disable(phy->pad_clk); 287 clk_disable_unprepare(phy->pad_clk);
288 288
289 return 0; 289 return 0;
290} 290}
@@ -580,7 +580,7 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
580 msleep(5); 580 msleep(5);
581 gpio_direction_output(config->reset_gpio, 1); 581 gpio_direction_output(config->reset_gpio, 1);
582 582
583 clk_enable(phy->clk); 583 clk_prepare_enable(phy->clk);
584 msleep(1); 584 msleep(1);
585 585
586 val = readl(base + USB_SUSP_CTRL); 586 val = readl(base + USB_SUSP_CTRL);
@@ -689,7 +689,7 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
689 err = PTR_ERR(phy->pll_u); 689 err = PTR_ERR(phy->pll_u);
690 goto err0; 690 goto err0;
691 } 691 }
692 clk_enable(phy->pll_u); 692 clk_prepare_enable(phy->pll_u);
693 693
694 parent_rate = clk_get_rate(clk_get_parent(phy->pll_u)); 694 parent_rate = clk_get_rate(clk_get_parent(phy->pll_u));
695 for (i = 0; i < ARRAY_SIZE(tegra_freq_table); i++) { 695 for (i = 0; i < ARRAY_SIZE(tegra_freq_table); i++) {
@@ -735,7 +735,7 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,
735 return phy; 735 return phy;
736 736
737err1: 737err1:
738 clk_disable(phy->pll_u); 738 clk_disable_unprepare(phy->pll_u);
739 clk_put(phy->pll_u); 739 clk_put(phy->pll_u);
740err0: 740err0:
741 kfree(phy); 741 kfree(phy);
@@ -810,7 +810,7 @@ void tegra_usb_phy_close(struct tegra_usb_phy *phy)
810 clk_put(phy->clk); 810 clk_put(phy->clk);
811 else 811 else
812 utmip_pad_close(phy); 812 utmip_pad_close(phy);
813 clk_disable(phy->pll_u); 813 clk_disable_unprepare(phy->pll_u);
814 clk_put(phy->pll_u); 814 clk_put(phy->pll_u);
815 kfree(phy); 815 kfree(phy);
816} 816}
diff --git a/drivers/crypto/tegra-aes.c b/drivers/crypto/tegra-aes.c
index 422a9766c7c..ac236f6724f 100644
--- a/drivers/crypto/tegra-aes.c
+++ b/drivers/crypto/tegra-aes.c
@@ -572,7 +572,7 @@ static void aes_workqueue_handler(struct work_struct *work)
572 struct tegra_aes_dev *dd = aes_dev; 572 struct tegra_aes_dev *dd = aes_dev;
573 int ret; 573 int ret;
574 574
575 ret = clk_enable(dd->aes_clk); 575 ret = clk_prepare_enable(dd->aes_clk);
576 if (ret) 576 if (ret)
577 BUG_ON("clock enable failed"); 577 BUG_ON("clock enable failed");
578 578
@@ -581,7 +581,7 @@ static void aes_workqueue_handler(struct work_struct *work)
581 ret = tegra_aes_handle_req(dd); 581 ret = tegra_aes_handle_req(dd);
582 } while (!ret); 582 } while (!ret);
583 583
584 clk_disable(dd->aes_clk); 584 clk_disable_unprepare(dd->aes_clk);
585} 585}
586 586
587static irqreturn_t aes_irq(int irq, void *dev_id) 587static irqreturn_t aes_irq(int irq, void *dev_id)
@@ -673,7 +673,7 @@ static int tegra_aes_get_random(struct crypto_rng *tfm, u8 *rdata,
673 /* take mutex to access the aes hw */ 673 /* take mutex to access the aes hw */
674 mutex_lock(&aes_lock); 674 mutex_lock(&aes_lock);
675 675
676 ret = clk_enable(dd->aes_clk); 676 ret = clk_prepare_enable(dd->aes_clk);
677 if (ret) 677 if (ret)
678 return ret; 678 return ret;
679 679
@@ -700,7 +700,7 @@ static int tegra_aes_get_random(struct crypto_rng *tfm, u8 *rdata,
700 } 700 }
701 701
702out: 702out:
703 clk_disable(dd->aes_clk); 703 clk_disable_unprepare(dd->aes_clk);
704 mutex_unlock(&aes_lock); 704 mutex_unlock(&aes_lock);
705 705
706 dev_dbg(dd->dev, "%s: done\n", __func__); 706 dev_dbg(dd->dev, "%s: done\n", __func__);
@@ -758,7 +758,7 @@ static int tegra_aes_rng_reset(struct crypto_rng *tfm, u8 *seed,
758 758
759 dd->flags = FLAGS_ENCRYPT | FLAGS_RNG; 759 dd->flags = FLAGS_ENCRYPT | FLAGS_RNG;
760 760
761 ret = clk_enable(dd->aes_clk); 761 ret = clk_prepare_enable(dd->aes_clk);
762 if (ret) 762 if (ret)
763 return ret; 763 return ret;
764 764
@@ -788,7 +788,7 @@ static int tegra_aes_rng_reset(struct crypto_rng *tfm, u8 *seed,
788 memcpy(dd->dt, dt, DEFAULT_RNG_BLK_SZ); 788 memcpy(dd->dt, dt, DEFAULT_RNG_BLK_SZ);
789 789
790out: 790out:
791 clk_disable(dd->aes_clk); 791 clk_disable_unprepare(dd->aes_clk);
792 mutex_unlock(&aes_lock); 792 mutex_unlock(&aes_lock);
793 793
794 dev_dbg(dd->dev, "%s: done\n", __func__); 794 dev_dbg(dd->dev, "%s: done\n", __func__);
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 8b2e555a956..3da7ee3eb50 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -341,7 +341,7 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
341 u32 val; 341 u32 val;
342 int err = 0; 342 int err = 0;
343 343
344 clk_enable(i2c_dev->clk); 344 clk_prepare_enable(i2c_dev->clk);
345 345
346 tegra_periph_reset_assert(i2c_dev->clk); 346 tegra_periph_reset_assert(i2c_dev->clk);
347 udelay(2); 347 udelay(2);
@@ -372,7 +372,7 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
372 if (tegra_i2c_flush_fifos(i2c_dev)) 372 if (tegra_i2c_flush_fifos(i2c_dev))
373 err = -ETIMEDOUT; 373 err = -ETIMEDOUT;
374 374
375 clk_disable(i2c_dev->clk); 375 clk_disable_unprepare(i2c_dev->clk);
376 376
377 if (i2c_dev->irq_disabled) { 377 if (i2c_dev->irq_disabled) {
378 i2c_dev->irq_disabled = 0; 378 i2c_dev->irq_disabled = 0;
@@ -546,14 +546,14 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
546 if (i2c_dev->is_suspended) 546 if (i2c_dev->is_suspended)
547 return -EBUSY; 547 return -EBUSY;
548 548
549 clk_enable(i2c_dev->clk); 549 clk_prepare_enable(i2c_dev->clk);
550 for (i = 0; i < num; i++) { 550 for (i = 0; i < num; i++) {
551 int stop = (i == (num - 1)) ? 1 : 0; 551 int stop = (i == (num - 1)) ? 1 : 0;
552 ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], stop); 552 ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], stop);
553 if (ret) 553 if (ret)
554 break; 554 break;
555 } 555 }
556 clk_disable(i2c_dev->clk); 556 clk_disable_unprepare(i2c_dev->clk);
557 return ret ?: i; 557 return ret ?: i;
558} 558}
559 559
@@ -666,7 +666,7 @@ static int __devinit tegra_i2c_probe(struct platform_device *pdev)
666 goto err_free; 666 goto err_free;
667 } 667 }
668 668
669 clk_enable(i2c_dev->i2c_clk); 669 clk_prepare_enable(i2c_dev->i2c_clk);
670 670
671 i2c_set_adapdata(&i2c_dev->adapter, i2c_dev); 671 i2c_set_adapdata(&i2c_dev->adapter, i2c_dev);
672 i2c_dev->adapter.owner = THIS_MODULE; 672 i2c_dev->adapter.owner = THIS_MODULE;
diff --git a/drivers/input/keyboard/tegra-kbc.c b/drivers/input/keyboard/tegra-kbc.c
index 4ffe64d5310..2c1c9ed1bd9 100644
--- a/drivers/input/keyboard/tegra-kbc.c
+++ b/drivers/input/keyboard/tegra-kbc.c
@@ -492,7 +492,7 @@ static int tegra_kbc_start(struct tegra_kbc *kbc)
492 unsigned int debounce_cnt; 492 unsigned int debounce_cnt;
493 u32 val = 0; 493 u32 val = 0;
494 494
495 clk_enable(kbc->clk); 495 clk_prepare_enable(kbc->clk);
496 496
497 /* Reset the KBC controller to clear all previous status.*/ 497 /* Reset the KBC controller to clear all previous status.*/
498 tegra_periph_reset_assert(kbc->clk); 498 tegra_periph_reset_assert(kbc->clk);
@@ -556,7 +556,7 @@ static void tegra_kbc_stop(struct tegra_kbc *kbc)
556 disable_irq(kbc->irq); 556 disable_irq(kbc->irq);
557 del_timer_sync(&kbc->timer); 557 del_timer_sync(&kbc->timer);
558 558
559 clk_disable(kbc->clk); 559 clk_disable_unprepare(kbc->clk);
560} 560}
561 561
562static int tegra_kbc_open(struct input_dev *dev) 562static int tegra_kbc_open(struct input_dev *dev)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 6e5338a071c..0810ccc23d7 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -337,7 +337,7 @@ static int __devinit sdhci_tegra_probe(struct platform_device *pdev)
337 rc = PTR_ERR(clk); 337 rc = PTR_ERR(clk);
338 goto err_clk_get; 338 goto err_clk_get;
339 } 339 }
340 clk_enable(clk); 340 clk_prepare_enable(clk);
341 pltfm_host->clk = clk; 341 pltfm_host->clk = clk;
342 342
343 host->mmc->pm_caps = plat->pm_flags; 343 host->mmc->pm_caps = plat->pm_flags;
@@ -352,7 +352,7 @@ static int __devinit sdhci_tegra_probe(struct platform_device *pdev)
352 return 0; 352 return 0;
353 353
354err_add_host: 354err_add_host:
355 clk_disable(pltfm_host->clk); 355 clk_disable_unprepare(pltfm_host->clk);
356 clk_put(pltfm_host->clk); 356 clk_put(pltfm_host->clk);
357err_clk_get: 357err_clk_get:
358 if (gpio_is_valid(plat->wp_gpio)) 358 if (gpio_is_valid(plat->wp_gpio))
@@ -393,7 +393,7 @@ static int __devexit sdhci_tegra_remove(struct platform_device *pdev)
393 if (gpio_is_valid(plat->power_gpio)) 393 if (gpio_is_valid(plat->power_gpio))
394 gpio_free(plat->power_gpio); 394 gpio_free(plat->power_gpio);
395 395
396 clk_disable(pltfm_host->clk); 396 clk_disable_unprepare(pltfm_host->clk);
397 clk_put(pltfm_host->clk); 397 clk_put(pltfm_host->clk);
398 398
399 sdhci_pltfm_free(pdev); 399 sdhci_pltfm_free(pdev);
diff --git a/drivers/spi/spi-tegra.c b/drivers/spi/spi-tegra.c
index ae6d78a3e91..7f99ff3553a 100644
--- a/drivers/spi/spi-tegra.c
+++ b/drivers/spi/spi-tegra.c
@@ -261,7 +261,7 @@ static void spi_tegra_start_transfer(struct spi_device *spi,
261 clk_set_rate(tspi->clk, speed); 261 clk_set_rate(tspi->clk, speed);
262 262
263 if (tspi->cur_speed == 0) 263 if (tspi->cur_speed == 0)
264 clk_enable(tspi->clk); 264 clk_prepare_enable(tspi->clk);
265 265
266 tspi->cur_speed = speed; 266 tspi->cur_speed = speed;
267 267
@@ -373,7 +373,7 @@ static void tegra_spi_rx_dma_complete(struct tegra_dma_req *req)
373 spi = m->state; 373 spi = m->state;
374 spi_tegra_start_message(spi, m); 374 spi_tegra_start_message(spi, m);
375 } else { 375 } else {
376 clk_disable(tspi->clk); 376 clk_disable_unprepare(tspi->clk);
377 tspi->cur_speed = 0; 377 tspi->cur_speed = 0;
378 } 378 }
379 } 379 }
diff --git a/drivers/staging/nvec/nvec.c b/drivers/staging/nvec/nvec.c
index 3c60088871e..9356886f489 100644
--- a/drivers/staging/nvec/nvec.c
+++ b/drivers/staging/nvec/nvec.c
@@ -675,7 +675,7 @@ static void tegra_init_i2c_slave(struct nvec_chip *nvec)
675{ 675{
676 u32 val; 676 u32 val;
677 677
678 clk_enable(nvec->i2c_clk); 678 clk_prepare_enable(nvec->i2c_clk);
679 679
680 tegra_periph_reset_assert(nvec->i2c_clk); 680 tegra_periph_reset_assert(nvec->i2c_clk);
681 udelay(2); 681 udelay(2);
@@ -695,14 +695,14 @@ static void tegra_init_i2c_slave(struct nvec_chip *nvec)
695 695
696 enable_irq(nvec->irq); 696 enable_irq(nvec->irq);
697 697
698 clk_disable(nvec->i2c_clk); 698 clk_disable_unprepare(nvec->i2c_clk);
699} 699}
700 700
701static void nvec_disable_i2c_slave(struct nvec_chip *nvec) 701static void nvec_disable_i2c_slave(struct nvec_chip *nvec)
702{ 702{
703 disable_irq(nvec->irq); 703 disable_irq(nvec->irq);
704 writel(I2C_SL_NEWSL | I2C_SL_NACK, nvec->base + I2C_SL_CNFG); 704 writel(I2C_SL_NEWSL | I2C_SL_NACK, nvec->base + I2C_SL_CNFG);
705 clk_disable(nvec->i2c_clk); 705 clk_disable_unprepare(nvec->i2c_clk);
706} 706}
707 707
708static void nvec_power_off(void) 708static void nvec_power_off(void)
@@ -812,7 +812,7 @@ static int __devinit tegra_nvec_probe(struct platform_device *pdev)
812 812
813 tegra_init_i2c_slave(nvec); 813 tegra_init_i2c_slave(nvec);
814 814
815 clk_enable(i2c_clk); 815 clk_prepare_enable(i2c_clk);
816 816
817 817
818 /* enable event reporting */ 818 /* enable event reporting */
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 68548236ec4..ab8a3bf628e 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -46,8 +46,8 @@ static void tegra_ehci_power_up(struct usb_hcd *hcd)
46{ 46{
47 struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); 47 struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
48 48
49 clk_enable(tegra->emc_clk); 49 clk_prepare_enable(tegra->emc_clk);
50 clk_enable(tegra->clk); 50 clk_prepare_enable(tegra->clk);
51 tegra_usb_phy_power_on(tegra->phy); 51 tegra_usb_phy_power_on(tegra->phy);
52 tegra->host_resumed = 1; 52 tegra->host_resumed = 1;
53} 53}
@@ -58,8 +58,8 @@ static void tegra_ehci_power_down(struct usb_hcd *hcd)
58 58
59 tegra->host_resumed = 0; 59 tegra->host_resumed = 0;
60 tegra_usb_phy_power_off(tegra->phy); 60 tegra_usb_phy_power_off(tegra->phy);
61 clk_disable(tegra->clk); 61 clk_disable_unprepare(tegra->clk);
62 clk_disable(tegra->emc_clk); 62 clk_disable_unprepare(tegra->emc_clk);
63} 63}
64 64
65static int tegra_ehci_internal_port_reset( 65static int tegra_ehci_internal_port_reset(
@@ -671,7 +671,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
671 goto fail_clk; 671 goto fail_clk;
672 } 672 }
673 673
674 err = clk_enable(tegra->clk); 674 err = clk_prepare_enable(tegra->clk);
675 if (err) 675 if (err)
676 goto fail_clken; 676 goto fail_clken;
677 677
@@ -682,7 +682,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
682 goto fail_emc_clk; 682 goto fail_emc_clk;
683 } 683 }
684 684
685 clk_enable(tegra->emc_clk); 685 clk_prepare_enable(tegra->emc_clk);
686 clk_set_rate(tegra->emc_clk, 400000000); 686 clk_set_rate(tegra->emc_clk, 400000000);
687 687
688 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 688 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -782,10 +782,10 @@ fail:
782fail_phy: 782fail_phy:
783 iounmap(hcd->regs); 783 iounmap(hcd->regs);
784fail_io: 784fail_io:
785 clk_disable(tegra->emc_clk); 785 clk_disable_unprepare(tegra->emc_clk);
786 clk_put(tegra->emc_clk); 786 clk_put(tegra->emc_clk);
787fail_emc_clk: 787fail_emc_clk:
788 clk_disable(tegra->clk); 788 clk_disable_unprepare(tegra->clk);
789fail_clken: 789fail_clken:
790 clk_put(tegra->clk); 790 clk_put(tegra->clk);
791fail_clk: 791fail_clk:
@@ -820,10 +820,10 @@ static int tegra_ehci_remove(struct platform_device *pdev)
820 tegra_usb_phy_close(tegra->phy); 820 tegra_usb_phy_close(tegra->phy);
821 iounmap(hcd->regs); 821 iounmap(hcd->regs);
822 822
823 clk_disable(tegra->clk); 823 clk_disable_unprepare(tegra->clk);
824 clk_put(tegra->clk); 824 clk_put(tegra->clk);
825 825
826 clk_disable(tegra->emc_clk); 826 clk_disable_unprepare(tegra->emc_clk);
827 clk_put(tegra->emc_clk); 827 clk_put(tegra->emc_clk);
828 828
829 kfree(tegra); 829 kfree(tegra);
diff --git a/sound/soc/tegra/tegra20_i2s.c b/sound/soc/tegra/tegra20_i2s.c
index 0c7af63d444..1647dbfe74b 100644
--- a/sound/soc/tegra/tegra20_i2s.c
+++ b/sound/soc/tegra/tegra20_i2s.c
@@ -62,7 +62,7 @@ static int tegra20_i2s_runtime_suspend(struct device *dev)
62{ 62{
63 struct tegra20_i2s *i2s = dev_get_drvdata(dev); 63 struct tegra20_i2s *i2s = dev_get_drvdata(dev);
64 64
65 clk_disable(i2s->clk_i2s); 65 clk_disable_unprepare(i2s->clk_i2s);
66 66
67 return 0; 67 return 0;
68} 68}
@@ -72,7 +72,7 @@ static int tegra20_i2s_runtime_resume(struct device *dev)
72 struct tegra20_i2s *i2s = dev_get_drvdata(dev); 72 struct tegra20_i2s *i2s = dev_get_drvdata(dev);
73 int ret; 73 int ret;
74 74
75 ret = clk_enable(i2s->clk_i2s); 75 ret = clk_prepare_enable(i2s->clk_i2s);
76 if (ret) { 76 if (ret) {
77 dev_err(dev, "clk_enable failed: %d\n", ret); 77 dev_err(dev, "clk_enable failed: %d\n", ret);
78 return ret; 78 return ret;
diff --git a/sound/soc/tegra/tegra20_spdif.c b/sound/soc/tegra/tegra20_spdif.c
index f9b57418bd0..2262e4fdec2 100644
--- a/sound/soc/tegra/tegra20_spdif.c
+++ b/sound/soc/tegra/tegra20_spdif.c
@@ -54,7 +54,7 @@ static int tegra20_spdif_runtime_suspend(struct device *dev)
54{ 54{
55 struct tegra20_spdif *spdif = dev_get_drvdata(dev); 55 struct tegra20_spdif *spdif = dev_get_drvdata(dev);
56 56
57 clk_disable(spdif->clk_spdif_out); 57 clk_disable_unprepare(spdif->clk_spdif_out);
58 58
59 return 0; 59 return 0;
60} 60}
@@ -64,7 +64,7 @@ static int tegra20_spdif_runtime_resume(struct device *dev)
64 struct tegra20_spdif *spdif = dev_get_drvdata(dev); 64 struct tegra20_spdif *spdif = dev_get_drvdata(dev);
65 int ret; 65 int ret;
66 66
67 ret = clk_enable(spdif->clk_spdif_out); 67 ret = clk_prepare_enable(spdif->clk_spdif_out);
68 if (ret) { 68 if (ret) {
69 dev_err(dev, "clk_enable failed: %d\n", ret); 69 dev_err(dev, "clk_enable failed: %d\n", ret);
70 return ret; 70 return ret;
diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c
index f43edb364a1..bf5610122c7 100644
--- a/sound/soc/tegra/tegra30_ahub.c
+++ b/sound/soc/tegra/tegra30_ahub.c
@@ -56,8 +56,8 @@ static int tegra30_ahub_runtime_suspend(struct device *dev)
56 regcache_cache_only(ahub->regmap_apbif, true); 56 regcache_cache_only(ahub->regmap_apbif, true);
57 regcache_cache_only(ahub->regmap_ahub, true); 57 regcache_cache_only(ahub->regmap_ahub, true);
58 58
59 clk_disable(ahub->clk_apbif); 59 clk_disable_unprepare(ahub->clk_apbif);
60 clk_disable(ahub->clk_d_audio); 60 clk_disable_unprepare(ahub->clk_d_audio);
61 61
62 return 0; 62 return 0;
63} 63}
@@ -77,12 +77,12 @@ static int tegra30_ahub_runtime_resume(struct device *dev)
77{ 77{
78 int ret; 78 int ret;
79 79
80 ret = clk_enable(ahub->clk_d_audio); 80 ret = clk_prepare_enable(ahub->clk_d_audio);
81 if (ret) { 81 if (ret) {
82 dev_err(dev, "clk_enable d_audio failed: %d\n", ret); 82 dev_err(dev, "clk_enable d_audio failed: %d\n", ret);
83 return ret; 83 return ret;
84 } 84 }
85 ret = clk_enable(ahub->clk_apbif); 85 ret = clk_prepare_enable(ahub->clk_apbif);
86 if (ret) { 86 if (ret) {
87 dev_err(dev, "clk_enable apbif failed: %d\n", ret); 87 dev_err(dev, "clk_enable apbif failed: %d\n", ret);
88 clk_disable(ahub->clk_d_audio); 88 clk_disable(ahub->clk_d_audio);
diff --git a/sound/soc/tegra/tegra30_i2s.c b/sound/soc/tegra/tegra30_i2s.c
index 8596032985d..d308faaae14 100644
--- a/sound/soc/tegra/tegra30_i2s.c
+++ b/sound/soc/tegra/tegra30_i2s.c
@@ -62,7 +62,7 @@ static int tegra30_i2s_runtime_suspend(struct device *dev)
62 62
63 regcache_cache_only(i2s->regmap, true); 63 regcache_cache_only(i2s->regmap, true);
64 64
65 clk_disable(i2s->clk_i2s); 65 clk_disable_unprepare(i2s->clk_i2s);
66 66
67 return 0; 67 return 0;
68} 68}
@@ -72,7 +72,7 @@ static int tegra30_i2s_runtime_resume(struct device *dev)
72 struct tegra30_i2s *i2s = dev_get_drvdata(dev); 72 struct tegra30_i2s *i2s = dev_get_drvdata(dev);
73 int ret; 73 int ret;
74 74
75 ret = clk_enable(i2s->clk_i2s); 75 ret = clk_prepare_enable(i2s->clk_i2s);
76 if (ret) { 76 if (ret) {
77 dev_err(dev, "clk_enable failed: %d\n", ret); 77 dev_err(dev, "clk_enable failed: %d\n", ret);
78 return ret; 78 return ret;
diff --git a/sound/soc/tegra/tegra_asoc_utils.c b/sound/soc/tegra/tegra_asoc_utils.c
index 9515ce58ea0..6872c77a119 100644
--- a/sound/soc/tegra/tegra_asoc_utils.c
+++ b/sound/soc/tegra/tegra_asoc_utils.c
@@ -69,9 +69,9 @@ int tegra_asoc_utils_set_rate(struct tegra_asoc_utils_data *data, int srate,
69 data->set_baseclock = 0; 69 data->set_baseclock = 0;
70 data->set_mclk = 0; 70 data->set_mclk = 0;
71 71
72 clk_disable(data->clk_cdev1); 72 clk_disable_unprepare(data->clk_cdev1);
73 clk_disable(data->clk_pll_a_out0); 73 clk_disable_unprepare(data->clk_pll_a_out0);
74 clk_disable(data->clk_pll_a); 74 clk_disable_unprepare(data->clk_pll_a);
75 75
76 err = clk_set_rate(data->clk_pll_a, new_baseclock); 76 err = clk_set_rate(data->clk_pll_a, new_baseclock);
77 if (err) { 77 if (err) {
@@ -87,19 +87,19 @@ int tegra_asoc_utils_set_rate(struct tegra_asoc_utils_data *data, int srate,
87 87
88 /* Don't set cdev1/extern1 rate; it's locked to pll_a_out0 */ 88 /* Don't set cdev1/extern1 rate; it's locked to pll_a_out0 */
89 89
90 err = clk_enable(data->clk_pll_a); 90 err = clk_prepare_enable(data->clk_pll_a);
91 if (err) { 91 if (err) {
92 dev_err(data->dev, "Can't enable pll_a: %d\n", err); 92 dev_err(data->dev, "Can't enable pll_a: %d\n", err);
93 return err; 93 return err;
94 } 94 }
95 95
96 err = clk_enable(data->clk_pll_a_out0); 96 err = clk_prepare_enable(data->clk_pll_a_out0);
97 if (err) { 97 if (err) {
98 dev_err(data->dev, "Can't enable pll_a_out0: %d\n", err); 98 dev_err(data->dev, "Can't enable pll_a_out0: %d\n", err);
99 return err; 99 return err;
100 } 100 }
101 101
102 err = clk_enable(data->clk_cdev1); 102 err = clk_prepare_enable(data->clk_cdev1);
103 if (err) { 103 if (err) {
104 dev_err(data->dev, "Can't enable cdev1: %d\n", err); 104 dev_err(data->dev, "Can't enable cdev1: %d\n", err);
105 return err; 105 return err;