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-rw-r--r--arch/mips/sibyte/sb1250/time.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index 511c89d65f3..adc0b5271a0 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -75,10 +75,10 @@ void sb1250_time_init(void)
75 /* Disable the timer and set up the count */ 75 /* Disable the timer and set up the count */
76 __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 76 __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
77#ifdef CONFIG_SIMULATION 77#ifdef CONFIG_SIMULATION
78 __raw_writeq(50000 / HZ, 78 __raw_writeq((50000 / HZ) - 1,
79 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT))); 79 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
80#else 80#else
81 __raw_writeq(1000000 / HZ, 81 __raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1,
82 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT))); 82 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
83#endif 83#endif
84 84