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-rw-r--r--arch/x86/Kconfig2
-rw-r--r--arch/x86/kernel/cpu/addon_cpuid_features.c21
-rw-r--r--arch/x86/kernel/cpu/common.c27
-rw-r--r--arch/x86/kernel/geode_32.c19
-rw-r--r--arch/x86/kernel/i387.c12
-rw-r--r--arch/x86/kernel/setup.c2
-rw-r--r--arch/x86/kernel/setup_32.c7
-rw-r--r--arch/x86/kernel/setup_64.c13
-rw-r--r--arch/x86/mm/pat.c50
-rw-r--r--arch/x86/pci/k8-bus_64.c8
-rw-r--r--include/asm-x86/bitops.h37
-rw-r--r--include/asm-x86/geode.h12
-rw-r--r--include/asm-x86/i387.h10
-rw-r--r--include/asm-x86/pat.h8
-rw-r--r--include/asm-x86/topology.h18
15 files changed, 136 insertions, 110 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index bbcafaa160c..fe361ae7ef2 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -335,6 +335,7 @@ config X86_RDC321X
335 select GENERIC_GPIO 335 select GENERIC_GPIO
336 select LEDS_CLASS 336 select LEDS_CLASS
337 select LEDS_GPIO 337 select LEDS_GPIO
338 select NEW_LEDS
338 help 339 help
339 This option is needed for RDC R-321x system-on-chip, also known 340 This option is needed for RDC R-321x system-on-chip, also known
340 as R-8610-(G). 341 as R-8610-(G).
@@ -1662,7 +1663,6 @@ config GEODE_MFGPT_TIMER
1662 1663
1663config OLPC 1664config OLPC
1664 bool "One Laptop Per Child support" 1665 bool "One Laptop Per Child support"
1665 depends on MGEODE_LX
1666 default n 1666 default n
1667 help 1667 help
1668 Add support for detecting the unique features of the OLPC 1668 Add support for detecting the unique features of the OLPC
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 238468ae199..c2e1ce33c7c 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -6,6 +6,7 @@
6 6
7#include <linux/cpu.h> 7#include <linux/cpu.h>
8 8
9#include <asm/pat.h>
9#include <asm/processor.h> 10#include <asm/processor.h>
10 11
11struct cpuid_bit { 12struct cpuid_bit {
@@ -48,3 +49,23 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
48 set_cpu_cap(c, cb->feature); 49 set_cpu_cap(c, cb->feature);
49 } 50 }
50} 51}
52
53#ifdef CONFIG_X86_PAT
54void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
55{
56 switch (c->x86_vendor) {
57 case X86_VENDOR_AMD:
58 if (c->x86 >= 0xf && c->x86 <= 0x11)
59 return;
60 break;
61 case X86_VENDOR_INTEL:
62 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
63 return;
64 break;
65 }
66
67 pat_disable(cpu_has_pat ?
68 "PAT disabled. Not yet verified on this CPU type." :
69 "PAT not supported by CPU.");
70}
71#endif
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 35b4f6a9c8e..d0463a94624 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -12,6 +12,7 @@
12#include <asm/mmu_context.h> 12#include <asm/mmu_context.h>
13#include <asm/mtrr.h> 13#include <asm/mtrr.h>
14#include <asm/mce.h> 14#include <asm/mce.h>
15#include <asm/pat.h>
15#ifdef CONFIG_X86_LOCAL_APIC 16#ifdef CONFIG_X86_LOCAL_APIC
16#include <asm/mpspec.h> 17#include <asm/mpspec.h>
17#include <asm/apic.h> 18#include <asm/apic.h>
@@ -308,19 +309,6 @@ static void __cpuinit early_get_cap(struct cpuinfo_x86 *c)
308 309
309 } 310 }
310 311
311 clear_cpu_cap(c, X86_FEATURE_PAT);
312
313 switch (c->x86_vendor) {
314 case X86_VENDOR_AMD:
315 if (c->x86 >= 0xf && c->x86 <= 0x11)
316 set_cpu_cap(c, X86_FEATURE_PAT);
317 break;
318 case X86_VENDOR_INTEL:
319 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
320 set_cpu_cap(c, X86_FEATURE_PAT);
321 break;
322 }
323
324} 312}
325 313
326/* 314/*
@@ -409,18 +397,6 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
409 init_scattered_cpuid_features(c); 397 init_scattered_cpuid_features(c);
410 } 398 }
411 399
412 clear_cpu_cap(c, X86_FEATURE_PAT);
413
414 switch (c->x86_vendor) {
415 case X86_VENDOR_AMD:
416 if (c->x86 >= 0xf && c->x86 <= 0x11)
417 set_cpu_cap(c, X86_FEATURE_PAT);
418 break;
419 case X86_VENDOR_INTEL:
420 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
421 set_cpu_cap(c, X86_FEATURE_PAT);
422 break;
423 }
424} 400}
425 401
426static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c) 402static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
@@ -651,6 +627,7 @@ void __init early_cpu_init(void)
651 cpu_devs[cvdev->vendor] = cvdev->cpu_dev; 627 cpu_devs[cvdev->vendor] = cvdev->cpu_dev;
652 628
653 early_cpu_detect(); 629 early_cpu_detect();
630 validate_pat_support(&boot_cpu_data);
654} 631}
655 632
656/* Make sure %fs is initialized properly in idle threads */ 633/* Make sure %fs is initialized properly in idle threads */
diff --git a/arch/x86/kernel/geode_32.c b/arch/x86/kernel/geode_32.c
index 9dad6ca6cd7..e8edd63ab00 100644
--- a/arch/x86/kernel/geode_32.c
+++ b/arch/x86/kernel/geode_32.c
@@ -161,6 +161,25 @@ void geode_gpio_setup_event(unsigned int gpio, int pair, int pme)
161} 161}
162EXPORT_SYMBOL_GPL(geode_gpio_setup_event); 162EXPORT_SYMBOL_GPL(geode_gpio_setup_event);
163 163
164int geode_has_vsa2(void)
165{
166 static int has_vsa2 = -1;
167
168 if (has_vsa2 == -1) {
169 /*
170 * The VSA has virtual registers that we can query for a
171 * signature.
172 */
173 outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
174 outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
175
176 has_vsa2 = (inw(VSA_VRC_DATA) == VSA_SIG);
177 }
178
179 return has_vsa2;
180}
181EXPORT_SYMBOL_GPL(geode_has_vsa2);
182
164static int __init geode_southbridge_init(void) 183static int __init geode_southbridge_init(void)
165{ 184{
166 if (!is_geode()) 185 if (!is_geode())
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c
index db6839b5319..e03cc952f23 100644
--- a/arch/x86/kernel/i387.c
+++ b/arch/x86/kernel/i387.c
@@ -450,7 +450,6 @@ static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
450{ 450{
451 struct task_struct *tsk = current; 451 struct task_struct *tsk = current;
452 452
453 clear_fpu(tsk);
454 return __copy_from_user(&tsk->thread.xstate->fsave, buf, 453 return __copy_from_user(&tsk->thread.xstate->fsave, buf,
455 sizeof(struct i387_fsave_struct)); 454 sizeof(struct i387_fsave_struct));
456} 455}
@@ -461,7 +460,6 @@ static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf)
461 struct user_i387_ia32_struct env; 460 struct user_i387_ia32_struct env;
462 int err; 461 int err;
463 462
464 clear_fpu(tsk);
465 err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0], 463 err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
466 sizeof(struct i387_fxsave_struct)); 464 sizeof(struct i387_fxsave_struct));
467 /* mxcsr reserved bits must be masked to zero for security reasons */ 465 /* mxcsr reserved bits must be masked to zero for security reasons */
@@ -478,6 +476,16 @@ int restore_i387_ia32(struct _fpstate_ia32 __user *buf)
478 int err; 476 int err;
479 477
480 if (HAVE_HWFP) { 478 if (HAVE_HWFP) {
479 struct task_struct *tsk = current;
480
481 clear_fpu(tsk);
482
483 if (!used_math()) {
484 err = init_fpu(tsk);
485 if (err)
486 return err;
487 }
488
481 if (cpu_has_fxsr) 489 if (cpu_has_fxsr)
482 err = restore_i387_fxsave(buf); 490 err = restore_i387_fxsave(buf);
483 else 491 else
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index cc6f5eb20b2..c0c68c18a78 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -95,7 +95,7 @@ void __init setup_per_cpu_areas(void)
95 95
96 /* Copy section for each CPU (we discard the original) */ 96 /* Copy section for each CPU (we discard the original) */
97 size = PERCPU_ENOUGH_ROOM; 97 size = PERCPU_ENOUGH_ROOM;
98 printk(KERN_INFO "PERCPU: Allocating %zd bytes of per cpu data\n", 98 printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n",
99 size); 99 size);
100 100
101 for_each_possible_cpu(i) { 101 for_each_possible_cpu(i) {
diff --git a/arch/x86/kernel/setup_32.c b/arch/x86/kernel/setup_32.c
index 2283422af79..2c5f8b213e8 100644
--- a/arch/x86/kernel/setup_32.c
+++ b/arch/x86/kernel/setup_32.c
@@ -127,7 +127,12 @@ static struct resource standard_io_resources[] = { {
127}, { 127}, {
128 .name = "keyboard", 128 .name = "keyboard",
129 .start = 0x0060, 129 .start = 0x0060,
130 .end = 0x006f, 130 .end = 0x0060,
131 .flags = IORESOURCE_BUSY | IORESOURCE_IO
132}, {
133 .name = "keyboard",
134 .start = 0x0064,
135 .end = 0x0064,
131 .flags = IORESOURCE_BUSY | IORESOURCE_IO 136 .flags = IORESOURCE_BUSY | IORESOURCE_IO
132}, { 137}, {
133 .name = "dma page reg", 138 .name = "dma page reg",
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
index 22c14e21c97..f2fc8feb727 100644
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@ -70,6 +70,7 @@
70#include <asm/ds.h> 70#include <asm/ds.h>
71#include <asm/topology.h> 71#include <asm/topology.h>
72#include <asm/trampoline.h> 72#include <asm/trampoline.h>
73#include <asm/pat.h>
73 74
74#include <mach_apic.h> 75#include <mach_apic.h>
75#ifdef CONFIG_PARAVIRT 76#ifdef CONFIG_PARAVIRT
@@ -128,7 +129,9 @@ static struct resource standard_io_resources[] = {
128 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 129 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
129 { .name = "timer1", .start = 0x50, .end = 0x53, 130 { .name = "timer1", .start = 0x50, .end = 0x53,
130 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 131 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
131 { .name = "keyboard", .start = 0x60, .end = 0x6f, 132 { .name = "keyboard", .start = 0x60, .end = 0x60,
133 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
134 { .name = "keyboard", .start = 0x64, .end = 0x64,
132 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 135 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
133 { .name = "dma page reg", .start = 0x80, .end = 0x8f, 136 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
134 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 137 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
@@ -1063,25 +1066,19 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1063 if (c->extended_cpuid_level >= 0x80000007) 1066 if (c->extended_cpuid_level >= 0x80000007)
1064 c->x86_power = cpuid_edx(0x80000007); 1067 c->x86_power = cpuid_edx(0x80000007);
1065 1068
1066
1067 clear_cpu_cap(c, X86_FEATURE_PAT);
1068
1069 switch (c->x86_vendor) { 1069 switch (c->x86_vendor) {
1070 case X86_VENDOR_AMD: 1070 case X86_VENDOR_AMD:
1071 early_init_amd(c); 1071 early_init_amd(c);
1072 if (c->x86 >= 0xf && c->x86 <= 0x11)
1073 set_cpu_cap(c, X86_FEATURE_PAT);
1074 break; 1072 break;
1075 case X86_VENDOR_INTEL: 1073 case X86_VENDOR_INTEL:
1076 early_init_intel(c); 1074 early_init_intel(c);
1077 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
1078 set_cpu_cap(c, X86_FEATURE_PAT);
1079 break; 1075 break;
1080 case X86_VENDOR_CENTAUR: 1076 case X86_VENDOR_CENTAUR:
1081 early_init_centaur(c); 1077 early_init_centaur(c);
1082 break; 1078 break;
1083 } 1079 }
1084 1080
1081 validate_pat_support(c);
1085} 1082}
1086 1083
1087/* 1084/*
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index 277446cd30b..60adbe22efa 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -25,31 +25,24 @@
25#include <asm/mtrr.h> 25#include <asm/mtrr.h>
26#include <asm/io.h> 26#include <asm/io.h>
27 27
28int pat_wc_enabled = 1; 28#ifdef CONFIG_X86_PAT
29int __read_mostly pat_wc_enabled = 1;
29 30
30static u64 __read_mostly boot_pat_state; 31void __init pat_disable(char *reason)
31
32static int nopat(char *str)
33{ 32{
34 pat_wc_enabled = 0; 33 pat_wc_enabled = 0;
35 printk(KERN_INFO "x86: PAT support disabled.\n"); 34 printk(KERN_INFO "%s\n", reason);
36
37 return 0;
38} 35}
39early_param("nopat", nopat);
40 36
41static int pat_known_cpu(void) 37static int nopat(char *str)
42{ 38{
43 if (!pat_wc_enabled) 39 pat_disable("PAT support disabled.");
44 return 0;
45
46 if (cpu_has_pat)
47 return 1;
48
49 pat_wc_enabled = 0;
50 printk(KERN_INFO "CPU and/or kernel does not support PAT.\n");
51 return 0; 40 return 0;
52} 41}
42early_param("nopat", nopat);
43#endif
44
45static u64 __read_mostly boot_pat_state;
53 46
54enum { 47enum {
55 PAT_UC = 0, /* uncached */ 48 PAT_UC = 0, /* uncached */
@@ -66,17 +59,19 @@ void pat_init(void)
66{ 59{
67 u64 pat; 60 u64 pat;
68 61
69#ifndef CONFIG_X86_PAT 62 if (!pat_wc_enabled)
70 nopat(NULL);
71#endif
72
73 /* Boot CPU enables PAT based on CPU feature */
74 if (!smp_processor_id() && !pat_known_cpu())
75 return; 63 return;
76 64
77 /* APs enable PAT iff boot CPU has enabled it before */ 65 /* Paranoia check. */
78 if (smp_processor_id() && !pat_wc_enabled) 66 if (!cpu_has_pat) {
79 return; 67 printk(KERN_ERR "PAT enabled, but CPU feature cleared\n");
68 /*
69 * Panic if this happens on the secondary CPU, and we
70 * switched to PAT on the boot CPU. We have no way to
71 * undo PAT.
72 */
73 BUG_ON(boot_pat_state);
74 }
80 75
81 /* Set PWT to Write-Combining. All other bits stay the same */ 76 /* Set PWT to Write-Combining. All other bits stay the same */
82 /* 77 /*
@@ -95,9 +90,8 @@ void pat_init(void)
95 PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC); 90 PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC);
96 91
97 /* Boot CPU check */ 92 /* Boot CPU check */
98 if (!smp_processor_id()) { 93 if (!boot_pat_state)
99 rdmsrl(MSR_IA32_CR_PAT, boot_pat_state); 94 rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
100 }
101 95
102 wrmsrl(MSR_IA32_CR_PAT, pat); 96 wrmsrl(MSR_IA32_CR_PAT, pat);
103 printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n", 97 printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n",
diff --git a/arch/x86/pci/k8-bus_64.c b/arch/x86/pci/k8-bus_64.c
index ab6d4b18a88..5c2799c20e4 100644
--- a/arch/x86/pci/k8-bus_64.c
+++ b/arch/x86/pci/k8-bus_64.c
@@ -504,14 +504,6 @@ static int __init early_fill_mp_bus_info(void)
504 } 504 }
505 } 505 }
506 506
507#ifdef CONFIG_NUMA
508 for (i = 0; i < BUS_NR; i++) {
509 node = mp_bus_to_node[i];
510 if (node >= 0)
511 printk(KERN_DEBUG "bus: %02x to node: %02x\n", i, node);
512 }
513#endif
514
515 for (i = 0; i < pci_root_num; i++) { 507 for (i = 0; i < pci_root_num; i++) {
516 int res_num; 508 int res_num;
517 int busnum; 509 int busnum;
diff --git a/include/asm-x86/bitops.h b/include/asm-x86/bitops.h
index b81a4d4d333..ee4b3ead6a4 100644
--- a/include/asm-x86/bitops.h
+++ b/include/asm-x86/bitops.h
@@ -23,13 +23,10 @@
23#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1) 23#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1)
24/* Technically wrong, but this avoids compilation errors on some gcc 24/* Technically wrong, but this avoids compilation errors on some gcc
25 versions. */ 25 versions. */
26#define ADDR "=m" (*(volatile long *)addr) 26#define ADDR "=m" (*(volatile long *) addr)
27#define BIT_ADDR "=m" (((volatile int *)addr)[nr >> 5])
28#else 27#else
29#define ADDR "+m" (*(volatile long *) addr) 28#define ADDR "+m" (*(volatile long *) addr)
30#define BIT_ADDR "+m" (((volatile int *)addr)[nr >> 5])
31#endif 29#endif
32#define BASE_ADDR "m" (*(volatile int *)addr)
33 30
34/** 31/**
35 * set_bit - Atomically set a bit in memory 32 * set_bit - Atomically set a bit in memory
@@ -77,7 +74,7 @@ static inline void __set_bit(int nr, volatile void *addr)
77 */ 74 */
78static inline void clear_bit(int nr, volatile void *addr) 75static inline void clear_bit(int nr, volatile void *addr)
79{ 76{
80 asm volatile(LOCK_PREFIX "btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); 77 asm volatile(LOCK_PREFIX "btr %1,%0" : ADDR : "Ir" (nr));
81} 78}
82 79
83/* 80/*
@@ -96,7 +93,7 @@ static inline void clear_bit_unlock(unsigned nr, volatile void *addr)
96 93
97static inline void __clear_bit(int nr, volatile void *addr) 94static inline void __clear_bit(int nr, volatile void *addr)
98{ 95{
99 asm volatile("btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); 96 asm volatile("btr %1,%0" : ADDR : "Ir" (nr));
100} 97}
101 98
102/* 99/*
@@ -131,7 +128,7 @@ static inline void __clear_bit_unlock(unsigned nr, volatile void *addr)
131 */ 128 */
132static inline void __change_bit(int nr, volatile void *addr) 129static inline void __change_bit(int nr, volatile void *addr)
133{ 130{
134 asm volatile("btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); 131 asm volatile("btc %1,%0" : ADDR : "Ir" (nr));
135} 132}
136 133
137/** 134/**
@@ -145,7 +142,7 @@ static inline void __change_bit(int nr, volatile void *addr)
145 */ 142 */
146static inline void change_bit(int nr, volatile void *addr) 143static inline void change_bit(int nr, volatile void *addr)
147{ 144{
148 asm volatile(LOCK_PREFIX "btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); 145 asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr));
149} 146}
150 147
151/** 148/**
@@ -191,9 +188,10 @@ static inline int __test_and_set_bit(int nr, volatile void *addr)
191{ 188{
192 int oldbit; 189 int oldbit;
193 190
194 asm volatile("bts %2,%3\n\t" 191 asm("bts %2,%1\n\t"
195 "sbb %0,%0" 192 "sbb %0,%0"
196 : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); 193 : "=r" (oldbit), ADDR
194 : "Ir" (nr));
197 return oldbit; 195 return oldbit;
198} 196}
199 197
@@ -229,9 +227,10 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr)
229{ 227{
230 int oldbit; 228 int oldbit;
231 229
232 asm volatile("btr %2,%3\n\t" 230 asm volatile("btr %2,%1\n\t"
233 "sbb %0,%0" 231 "sbb %0,%0"
234 : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); 232 : "=r" (oldbit), ADDR
233 : "Ir" (nr));
235 return oldbit; 234 return oldbit;
236} 235}
237 236
@@ -240,9 +239,10 @@ static inline int __test_and_change_bit(int nr, volatile void *addr)
240{ 239{
241 int oldbit; 240 int oldbit;
242 241
243 asm volatile("btc %2,%3\n\t" 242 asm volatile("btc %2,%1\n\t"
244 "sbb %0,%0" 243 "sbb %0,%0"
245 : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); 244 : "=r" (oldbit), ADDR
245 : "Ir" (nr) : "memory");
246 246
247 return oldbit; 247 return oldbit;
248} 248}
@@ -276,11 +276,10 @@ static inline int variable_test_bit(int nr, volatile const void *addr)
276{ 276{
277 int oldbit; 277 int oldbit;
278 278
279 asm volatile("bt %2,%3\n\t" 279 asm volatile("bt %2,%1\n\t"
280 "sbb %0,%0" 280 "sbb %0,%0"
281 : "=r" (oldbit) 281 : "=r" (oldbit)
282 : "m" (((volatile const int *)addr)[nr >> 5]), 282 : "m" (*(unsigned long *)addr), "Ir" (nr));
283 "Ir" (nr), BASE_ADDR);
284 283
285 return oldbit; 284 return oldbit;
286} 285}
@@ -397,8 +396,6 @@ static inline int fls(int x)
397} 396}
398#endif /* __KERNEL__ */ 397#endif /* __KERNEL__ */
399 398
400#undef BASE_ADDR
401#undef BIT_ADDR
402#undef ADDR 399#undef ADDR
403 400
404static inline void set_bit_string(unsigned long *bitmap, 401static inline void set_bit_string(unsigned long *bitmap,
diff --git a/include/asm-x86/geode.h b/include/asm-x86/geode.h
index 7154dc4de95..6e6458853a3 100644
--- a/include/asm-x86/geode.h
+++ b/include/asm-x86/geode.h
@@ -185,16 +185,14 @@ static inline int is_geode(void)
185 return (is_geode_gx() || is_geode_lx()); 185 return (is_geode_gx() || is_geode_lx());
186} 186}
187 187
188/* 188#ifdef CONFIG_MGEODE_LX
189 * The VSA has virtual registers that we can query for a signature. 189extern int geode_has_vsa2(void);
190 */ 190#else
191static inline int geode_has_vsa2(void) 191static inline int geode_has_vsa2(void)
192{ 192{
193 outw(VSA_VR_UNLOCK, VSA_VRC_INDEX); 193 return 0;
194 outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
195
196 return (inw(VSA_VRC_DATA) == VSA_SIG);
197} 194}
195#endif
198 196
199/* MFGPTs */ 197/* MFGPTs */
200 198
diff --git a/include/asm-x86/i387.h b/include/asm-x86/i387.h
index da2adb45f6e..6b722d31593 100644
--- a/include/asm-x86/i387.h
+++ b/include/asm-x86/i387.h
@@ -175,7 +175,15 @@ static inline int save_i387(struct _fpstate __user *buf)
175 */ 175 */
176static inline int restore_i387(struct _fpstate __user *buf) 176static inline int restore_i387(struct _fpstate __user *buf)
177{ 177{
178 set_used_math(); 178 struct task_struct *tsk = current;
179 int err;
180
181 if (!used_math()) {
182 err = init_fpu(tsk);
183 if (err)
184 return err;
185 }
186
179 if (!(task_thread_info(current)->status & TS_USEDFPU)) { 187 if (!(task_thread_info(current)->status & TS_USEDFPU)) {
180 clts(); 188 clts();
181 task_thread_info(current)->status |= TS_USEDFPU; 189 task_thread_info(current)->status |= TS_USEDFPU;
diff --git a/include/asm-x86/pat.h b/include/asm-x86/pat.h
index 8b822b5a178..88f60cc6a22 100644
--- a/include/asm-x86/pat.h
+++ b/include/asm-x86/pat.h
@@ -4,7 +4,13 @@
4 4
5#include <linux/types.h> 5#include <linux/types.h>
6 6
7#ifdef CONFIG_X86_PAT
7extern int pat_wc_enabled; 8extern int pat_wc_enabled;
9extern void validate_pat_support(struct cpuinfo_x86 *c);
10#else
11static const int pat_wc_enabled = 0;
12static inline void validate_pat_support(struct cpuinfo_x86 *c) { }
13#endif
8 14
9extern void pat_init(void); 15extern void pat_init(void);
10 16
@@ -12,5 +18,7 @@ extern int reserve_memtype(u64 start, u64 end,
12 unsigned long req_type, unsigned long *ret_type); 18 unsigned long req_type, unsigned long *ret_type);
13extern int free_memtype(u64 start, u64 end); 19extern int free_memtype(u64 start, u64 end);
14 20
21extern void pat_disable(char *reason);
22
15#endif 23#endif
16 24
diff --git a/include/asm-x86/topology.h b/include/asm-x86/topology.h
index 4f35a0fb4f2..dcf3f8131d6 100644
--- a/include/asm-x86/topology.h
+++ b/include/asm-x86/topology.h
@@ -25,6 +25,16 @@
25#ifndef _ASM_X86_TOPOLOGY_H 25#ifndef _ASM_X86_TOPOLOGY_H
26#define _ASM_X86_TOPOLOGY_H 26#define _ASM_X86_TOPOLOGY_H
27 27
28#ifdef CONFIG_X86_32
29# ifdef CONFIG_X86_HT
30# define ENABLE_TOPO_DEFINES
31# endif
32#else
33# ifdef CONFIG_SMP
34# define ENABLE_TOPO_DEFINES
35# endif
36#endif
37
28#ifdef CONFIG_NUMA 38#ifdef CONFIG_NUMA
29#include <linux/cpumask.h> 39#include <linux/cpumask.h>
30#include <asm/mpspec.h> 40#include <asm/mpspec.h>
@@ -130,10 +140,6 @@ extern unsigned long node_end_pfn[];
130extern unsigned long node_remap_size[]; 140extern unsigned long node_remap_size[];
131#define node_has_online_mem(nid) (node_start_pfn[nid] != node_end_pfn[nid]) 141#define node_has_online_mem(nid) (node_start_pfn[nid] != node_end_pfn[nid])
132 142
133# ifdef CONFIG_X86_HT
134# define ENABLE_TOPO_DEFINES
135# endif
136
137# define SD_CACHE_NICE_TRIES 1 143# define SD_CACHE_NICE_TRIES 1
138# define SD_IDLE_IDX 1 144# define SD_IDLE_IDX 1
139# define SD_NEWIDLE_IDX 2 145# define SD_NEWIDLE_IDX 2
@@ -141,10 +147,6 @@ extern unsigned long node_remap_size[];
141 147
142#else 148#else
143 149
144# ifdef CONFIG_SMP
145# define ENABLE_TOPO_DEFINES
146# endif
147
148# define SD_CACHE_NICE_TRIES 2 150# define SD_CACHE_NICE_TRIES 2
149# define SD_IDLE_IDX 2 151# define SD_IDLE_IDX 2
150# define SD_NEWIDLE_IDX 2 152# define SD_NEWIDLE_IDX 2