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-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c22
-rw-r--r--drivers/video/da8xx-fb.c43
-rw-r--r--include/video/da8xx-fb.h22
3 files changed, 19 insertions, 68 deletions
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index bd2f72b414b..fcb30d3ae24 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -518,29 +518,9 @@ void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
518 } 518 }
519} 519}
520 520
521static const struct display_panel disp_panel = {
522 QVGA,
523 16,
524 16,
525 COLOR_ACTIVE,
526};
527
528static struct lcd_ctrl_config lcd_cfg = { 521static struct lcd_ctrl_config lcd_cfg = {
529 &disp_panel, 522 .panel_shade = COLOR_ACTIVE,
530 .ac_bias = 255,
531 .ac_bias_intrpt = 0,
532 .dma_burst_sz = 16,
533 .bpp = 16, 523 .bpp = 16,
534 .fdd = 255,
535 .tft_alt_mode = 0,
536 .stn_565_mode = 0,
537 .mono_8bit_mode = 0,
538 .invert_line_clock = 1,
539 .invert_frm_clock = 1,
540 .sync_edge = 0,
541 .sync_ctrl = 1,
542 .raster_order = 0,
543 .fifo_th = 6,
544}; 524};
545 525
546struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = { 526struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = {
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index c3db0366d59..3fd9ec5f993 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -226,7 +226,8 @@ static struct fb_videomode known_lcd_panels[] = {
226 .lower_margin = 2, 226 .lower_margin = 2,
227 .hsync_len = 0, 227 .hsync_len = 0,
228 .vsync_len = 0, 228 .vsync_len = 0,
229 .sync = FB_SYNC_CLK_INVERT, 229 .sync = FB_SYNC_CLK_INVERT |
230 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
230 }, 231 },
231 /* Sharp LK043T1DG01 */ 232 /* Sharp LK043T1DG01 */
232 [1] = { 233 [1] = {
@@ -240,7 +241,7 @@ static struct fb_videomode known_lcd_panels[] = {
240 .lower_margin = 2, 241 .lower_margin = 2,
241 .hsync_len = 41, 242 .hsync_len = 41,
242 .vsync_len = 10, 243 .vsync_len = 10,
243 .sync = 0, 244 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
244 .flag = 0, 245 .flag = 0,
245 }, 246 },
246 [2] = { 247 [2] = {
@@ -255,7 +256,7 @@ static struct fb_videomode known_lcd_panels[] = {
255 .lower_margin = 10, 256 .lower_margin = 10,
256 .hsync_len = 10, 257 .hsync_len = 10,
257 .vsync_len = 10, 258 .vsync_len = 10,
258 .sync = 0, 259 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
259 .flag = 0, 260 .flag = 0,
260 }, 261 },
261}; 262};
@@ -387,10 +388,9 @@ static int lcd_cfg_dma(int burst_size, int fifo_th)
387 reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_8); 388 reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_8);
388 break; 389 break;
389 case 16: 390 case 16:
391 default:
390 reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_16); 392 reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_16);
391 break; 393 break;
392 default:
393 return -EINVAL;
394 } 394 }
395 395
396 reg |= (fifo_th << 8); 396 reg |= (fifo_th << 8);
@@ -435,7 +435,8 @@ static void lcd_cfg_vertical_sync(int back_porch, int pulse_width,
435 lcdc_write(reg, LCD_RASTER_TIMING_1_REG); 435 lcdc_write(reg, LCD_RASTER_TIMING_1_REG);
436} 436}
437 437
438static int lcd_cfg_display(const struct lcd_ctrl_config *cfg) 438static int lcd_cfg_display(const struct lcd_ctrl_config *cfg,
439 struct fb_videomode *panel)
439{ 440{
440 u32 reg; 441 u32 reg;
441 u32 reg_int; 442 u32 reg_int;
@@ -444,7 +445,7 @@ static int lcd_cfg_display(const struct lcd_ctrl_config *cfg)
444 LCD_MONO_8BIT_MODE | 445 LCD_MONO_8BIT_MODE |
445 LCD_MONOCHROME_MODE); 446 LCD_MONOCHROME_MODE);
446 447
447 switch (cfg->p_disp_panel->panel_shade) { 448 switch (cfg->panel_shade) {
448 case MONOCHROME: 449 case MONOCHROME:
449 reg |= LCD_MONOCHROME_MODE; 450 reg |= LCD_MONOCHROME_MODE;
450 if (cfg->mono_8bit_mode) 451 if (cfg->mono_8bit_mode)
@@ -457,7 +458,9 @@ static int lcd_cfg_display(const struct lcd_ctrl_config *cfg)
457 break; 458 break;
458 459
459 case COLOR_PASSIVE: 460 case COLOR_PASSIVE:
460 if (cfg->stn_565_mode) 461 /* AC bias applicable only for Pasive panels */
462 lcd_cfg_ac_bias(cfg->ac_bias, cfg->ac_bias_intrpt);
463 if (cfg->bpp == 12 && cfg->stn_565_mode)
461 reg |= LCD_STN_565_ENABLE; 464 reg |= LCD_STN_565_ENABLE;
462 break; 465 break;
463 466
@@ -478,22 +481,19 @@ static int lcd_cfg_display(const struct lcd_ctrl_config *cfg)
478 481
479 reg = lcdc_read(LCD_RASTER_TIMING_2_REG); 482 reg = lcdc_read(LCD_RASTER_TIMING_2_REG);
480 483
481 if (cfg->sync_ctrl) 484 reg |= LCD_SYNC_CTRL;
482 reg |= LCD_SYNC_CTRL;
483 else
484 reg &= ~LCD_SYNC_CTRL;
485 485
486 if (cfg->sync_edge) 486 if (cfg->sync_edge)
487 reg |= LCD_SYNC_EDGE; 487 reg |= LCD_SYNC_EDGE;
488 else 488 else
489 reg &= ~LCD_SYNC_EDGE; 489 reg &= ~LCD_SYNC_EDGE;
490 490
491 if (cfg->invert_line_clock) 491 if (panel->sync & FB_SYNC_HOR_HIGH_ACT)
492 reg |= LCD_INVERT_LINE_CLOCK; 492 reg |= LCD_INVERT_LINE_CLOCK;
493 else 493 else
494 reg &= ~LCD_INVERT_LINE_CLOCK; 494 reg &= ~LCD_INVERT_LINE_CLOCK;
495 495
496 if (cfg->invert_frm_clock) 496 if (panel->sync & FB_SYNC_VERT_HIGH_ACT)
497 reg |= LCD_INVERT_FRAME_CLOCK; 497 reg |= LCD_INVERT_FRAME_CLOCK;
498 else 498 else
499 reg &= ~LCD_INVERT_FRAME_CLOCK; 499 reg &= ~LCD_INVERT_FRAME_CLOCK;
@@ -738,9 +738,6 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
738 if (ret < 0) 738 if (ret < 0)
739 return ret; 739 return ret;
740 740
741 /* Configure the AC bias properties. */
742 lcd_cfg_ac_bias(cfg->ac_bias, cfg->ac_bias_intrpt);
743
744 /* Configure the vertical and horizontal sync properties. */ 741 /* Configure the vertical and horizontal sync properties. */
745 lcd_cfg_vertical_sync(panel->lower_margin, panel->vsync_len, 742 lcd_cfg_vertical_sync(panel->lower_margin, panel->vsync_len,
746 panel->upper_margin); 743 panel->upper_margin);
@@ -748,18 +745,12 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
748 panel->left_margin); 745 panel->left_margin);
749 746
750 /* Configure for disply */ 747 /* Configure for disply */
751 ret = lcd_cfg_display(cfg); 748 ret = lcd_cfg_display(cfg, panel);
752 if (ret < 0) 749 if (ret < 0)
753 return ret; 750 return ret;
754 751
755 if (QVGA != cfg->p_disp_panel->panel_type) 752 bpp = cfg->bpp;
756 return -EINVAL;
757 753
758 if (cfg->bpp <= cfg->p_disp_panel->max_bpp &&
759 cfg->bpp >= cfg->p_disp_panel->min_bpp)
760 bpp = cfg->bpp;
761 else
762 bpp = cfg->p_disp_panel->max_bpp;
763 if (bpp == 12) 754 if (bpp == 12)
764 bpp = 16; 755 bpp = 16;
765 ret = lcd_cfg_frame_buffer(par, (unsigned int)panel->xres, 756 ret = lcd_cfg_frame_buffer(par, (unsigned int)panel->xres,
@@ -1381,7 +1372,7 @@ static int __devinit fb_probe(struct platform_device *device)
1381 da8xx_fb_var.yres_virtual = lcdc_info->yres * LCD_NUM_BUFFERS; 1372 da8xx_fb_var.yres_virtual = lcdc_info->yres * LCD_NUM_BUFFERS;
1382 1373
1383 da8xx_fb_var.grayscale = 1374 da8xx_fb_var.grayscale =
1384 lcd_cfg->p_disp_panel->panel_shade == MONOCHROME ? 1 : 0; 1375 lcd_cfg->panel_shade == MONOCHROME ? 1 : 0;
1385 da8xx_fb_var.bits_per_pixel = lcd_cfg->bpp; 1376 da8xx_fb_var.bits_per_pixel = lcd_cfg->bpp;
1386 1377
1387 da8xx_fb_var.hsync_len = lcdc_info->hsync_len; 1378 da8xx_fb_var.hsync_len = lcdc_info->hsync_len;
diff --git a/include/video/da8xx-fb.h b/include/video/da8xx-fb.h
index 12e4e1de5e3..f88825928dd 100644
--- a/include/video/da8xx-fb.h
+++ b/include/video/da8xx-fb.h
@@ -12,10 +12,6 @@
12#ifndef DA8XX_FB_H 12#ifndef DA8XX_FB_H
13#define DA8XX_FB_H 13#define DA8XX_FB_H
14 14
15enum panel_type {
16 QVGA = 0
17};
18
19enum panel_shade { 15enum panel_shade {
20 MONOCHROME = 0, 16 MONOCHROME = 0,
21 COLOR_ACTIVE, 17 COLOR_ACTIVE,
@@ -27,13 +23,6 @@ enum raster_load_mode {
27 LOAD_PALETTE, 23 LOAD_PALETTE,
28}; 24};
29 25
30struct display_panel {
31 enum panel_type panel_type; /* QVGA */
32 int max_bpp;
33 int min_bpp;
34 enum panel_shade panel_shade;
35};
36
37struct da8xx_lcdc_platform_data { 26struct da8xx_lcdc_platform_data {
38 const char manu_name[10]; 27 const char manu_name[10];
39 void *controller_data; 28 void *controller_data;
@@ -42,7 +31,7 @@ struct da8xx_lcdc_platform_data {
42}; 31};
43 32
44struct lcd_ctrl_config { 33struct lcd_ctrl_config {
45 const struct display_panel *p_disp_panel; 34 enum panel_shade panel_shade;
46 35
47 /* AC Bias Pin Frequency */ 36 /* AC Bias Pin Frequency */
48 int ac_bias; 37 int ac_bias;
@@ -68,18 +57,9 @@ struct lcd_ctrl_config {
68 /* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */ 57 /* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */
69 unsigned char mono_8bit_mode; 58 unsigned char mono_8bit_mode;
70 59
71 /* Invert line clock */
72 unsigned char invert_line_clock;
73
74 /* Invert frame clock */
75 unsigned char invert_frm_clock;
76
77 /* Horizontal and Vertical Sync Edge: 0=rising 1=falling */ 60 /* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
78 unsigned char sync_edge; 61 unsigned char sync_edge;
79 62
80 /* Horizontal and Vertical Sync: Control: 0=ignore */
81 unsigned char sync_ctrl;
82
83 /* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */ 63 /* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
84 unsigned char raster_order; 64 unsigned char raster_order;
85 65