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-rw-r--r--arch/arm/mach-omap2/pm34xx.c20
1 files changed, 11 insertions, 9 deletions
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index bfa8b8c8171..b2740c5e050 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -407,13 +407,14 @@ void omap_sram_idle(void)
407 omap3_intc_prepare_idle(); 407 omap3_intc_prepare_idle();
408 408
409 /* 409 /*
410 * On EMU/HS devices ROM code restores a SRDC value 410 * On EMU/HS devices ROM code restores a SRDC value
411 * from scratchpad which has automatic self refresh on timeout 411 * from scratchpad which has automatic self refresh on timeout
412 * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443. 412 * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443.
413 * Hence store/restore the SDRC_POWER register here. 413 * Hence store/restore the SDRC_POWER register here.
414 */ 414 */
415 if (omap_rev() >= OMAP3430_REV_ES3_0 && 415 if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 &&
416 omap_type() != OMAP2_DEVICE_TYPE_GP && 416 (omap_type() == OMAP2_DEVICE_TYPE_EMU ||
417 omap_type() == OMAP2_DEVICE_TYPE_SEC) &&
417 core_next_state == PWRDM_POWER_OFF) 418 core_next_state == PWRDM_POWER_OFF)
418 sdrc_pwr = sdrc_read_reg(SDRC_POWER); 419 sdrc_pwr = sdrc_read_reg(SDRC_POWER);
419 420
@@ -430,8 +431,9 @@ void omap_sram_idle(void)
430 omap34xx_do_sram_idle(save_state); 431 omap34xx_do_sram_idle(save_state);
431 432
432 /* Restore normal SDRC POWER settings */ 433 /* Restore normal SDRC POWER settings */
433 if (omap_rev() >= OMAP3430_REV_ES3_0 && 434 if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 &&
434 omap_type() != OMAP2_DEVICE_TYPE_GP && 435 (omap_type() == OMAP2_DEVICE_TYPE_EMU ||
436 omap_type() == OMAP2_DEVICE_TYPE_SEC) &&
435 core_next_state == PWRDM_POWER_OFF) 437 core_next_state == PWRDM_POWER_OFF)
436 sdrc_write_reg(sdrc_pwr, SDRC_POWER); 438 sdrc_write_reg(sdrc_pwr, SDRC_POWER);
437 439