7 files changed, 158 insertions, 97 deletions

diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 32ee3f89596..d9bc3fa7bb2 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -762,16 +762,19 @@ static u8 da850_iis_serializer_direction[] = {
 };
 
 static struct snd_platform_data da850_evm_snd_data = {
-        .tx_dma_offset  = 0x2000,
-        .rx_dma_offset  = 0x2000,
-        .op_mode        = DAVINCI_MCASP_IIS_MODE,
-        .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
-        .tdm_slots      = 2,
-        .serial_dir     = da850_iis_serializer_direction,
-        .asp_chan_q     = EVENTQ_0,
-        .version        = MCASP_VERSION_2,
-        .txnumevt       = 1,
-        .rxnumevt       = 1,
+        .tx_dma_offset          = 0x2000,
+        .rx_dma_offset          = 0x2000,
+        .op_mode                = DAVINCI_MCASP_IIS_MODE,
+        .num_serializer         = ARRAY_SIZE(da850_iis_serializer_direction),
+        .tdm_slots              = 2,
+        .serial_dir             = da850_iis_serializer_direction,
+        .asp_chan_q             = EVENTQ_0,
+        .ram_chan_q             = EVENTQ_1,
+        .version                = MCASP_VERSION_2,
+        .txnumevt               = 1,
+        .rxnumevt               = 1,
+        .sram_size_playback     = SZ_8K,
+        .sram_size_capture      = SZ_8K,
 };
 
 static const short da850_evm_mcasp_pins[] __initconst = {
@@ -1509,6 +1512,7 @@ static __init void da850_evm_init(void)
                 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
                                 ret);
 
+        da850_evm_snd_data.sram_pool = sram_get_gen_pool();
         da8xx_register_mcasp(0, &da850_evm_snd_data);
 
         ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
diff --git a/include/linux/platform_data/davinci_asp.h b/include/linux/platform_data/davinci_asp.h
index d0c5825876f..8db5ae03b6e 100644
--- a/include/linux/platform_data/davinci_asp.h
+++ b/include/linux/platform_data/davinci_asp.h
@@ -16,12 +16,13 @@
 #ifndef __DAVINCI_ASP_H
 #define __DAVINCI_ASP_H
 
+#include <linux/genalloc.h>
+
 struct snd_platform_data {
         u32 tx_dma_offset;
         u32 rx_dma_offset;
         int asp_chan_q; /* event queue number for ASP channel */
         int ram_chan_q; /* event queue number for RAM channel */
-        unsigned int codec_fmt;
         /*
          * Allowing this is more efficient and eliminates left and right swaps
          * caused by underruns, but will swap the left and right channels
@@ -30,6 +31,7 @@ struct snd_platform_data {
         unsigned enable_channel_combine:1;
         unsigned sram_size_playback;
         unsigned sram_size_capture;
+        struct gen_pool *sram_pool;
 
         /*
          * If McBSP peripheral gets the clock from an external pin,
diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c
index 6fac5af1329..d55e6477bff 100644
--- a/sound/soc/davinci/davinci-evm.c
+++ b/sound/soc/davinci/davinci-evm.c
@@ -71,6 +71,11 @@ static int evm_hw_params(struct snd_pcm_substream *substream,
         if (ret < 0)
                 return ret;
 
+        /* set the CPU system clock */
+        ret = snd_soc_dai_set_sysclk(cpu_dai, 0, sysclk, SND_SOC_CLOCK_OUT);
+        if (ret < 0)
+                return ret;
+
         return 0;
 }
 
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c
index 714e51e5be5..55e2bf652be 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -199,6 +199,7 @@
 #define ACLKXE          BIT(5)
 #define TX_ASYNC        BIT(6)
 #define ACLKXPOL        BIT(7)
+#define ACLKXDIV_MASK   0x1f
 
 /*
  * DAVINCI_MCASP_ACLKRCTL_REG Receive Clock Control Register Bits
@@ -207,6 +208,7 @@
 #define ACLKRE          BIT(5)
 #define RX_ASYNC        BIT(6)
 #define ACLKRPOL        BIT(7)
+#define ACLKRDIV_MASK   0x1f
 
 /*
  * DAVINCI_MCASP_AHCLKXCTL_REG - High Frequency Transmit Clock Control
@@ -215,6 +217,7 @@
 #define AHCLKXDIV(val)  (val)
 #define AHCLKXPOL       BIT(14)
 #define AHCLKXE         BIT(15)
+#define AHCLKXDIV_MASK  0xfff
 
 /*
  * DAVINCI_MCASP_AHCLKRCTL_REG - High Frequency Receive Clock Control
@@ -223,6 +226,7 @@
 #define AHCLKRDIV(val)  (val)
 #define AHCLKRPOL       BIT(14)
 #define AHCLKRE         BIT(15)
+#define AHCLKRDIV_MASK  0xfff
 
 /*
  * DAVINCI_MCASP_XRSRCTL_BASE_REG -  Serializer Control Register Bits
@@ -473,6 +477,23 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
         struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
         void __iomem *base = dev->base;
 
+        switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+        case SND_SOC_DAIFMT_DSP_B:
+        case SND_SOC_DAIFMT_AC97:
+                mcasp_clr_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
+                mcasp_clr_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
+                break;
+        default:
+                /* configure a full-word SYNC pulse (LRCLK) */
+                mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
+                mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
+
+                /* make 1st data bit occur one ACLK cycle after the frame sync */
+                mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, FSXDLY(1));
+                mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, FSRDLY(1));
+                break;
+        }
+
         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
         case SND_SOC_DAIFMT_CBS_CFS:
                 /* codec is clock and frame slave */
@@ -482,8 +503,7 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
                 mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);
                 mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE);
 
-                mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG,
-                                ACLKX | AHCLKX | AFSX);
+                mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, ACLKX | AFSX);
                 break;
         case SND_SOC_DAIFMT_CBM_CFS:
                 /* codec is clock master and frame slave */
@@ -554,59 +574,75 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
         return 0;
 }
 
-static int davinci_config_channel_size(struct davinci_audio_dev *dev,
-                                       int channel_size)
+static int davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div)
 {
-        u32 fmt = 0;
-        u32 mask, rotate;
-
-        switch (channel_size) {
-        case DAVINCI_AUDIO_WORD_8:
-                fmt = 0x03;
-                rotate = 6;
-                mask = 0x000000ff;
-                break;
+        struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai);
 
-        case DAVINCI_AUDIO_WORD_12:
-                fmt = 0x05;
+        switch (div_id) {
+        case 0:         /* MCLK divider */