diff options
| -rw-r--r-- | arch/blackfin/include/asm/bfin_serial.h | 6 | ||||
| -rw-r--r-- | arch/blackfin/include/asm/gptimers.h | 18 | ||||
| -rw-r--r-- | arch/blackfin/include/asm/unistd.h | 3 | ||||
| -rw-r--r-- | arch/blackfin/kernel/debug-mmrs.c | 36 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h | 79 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf518/include/mach/defBF514.h | 16 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h | 79 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf527/include/mach/defBF525.h | 4 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h | 52 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h | 79 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h | 93 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h | 94 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf548/include/mach/defBF547.h | 19 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h | 52 | ||||
| -rw-r--r-- | arch/blackfin/mach-common/entry.S | 1 |
15 files changed, 62 insertions, 569 deletions
diff --git a/arch/blackfin/include/asm/bfin_serial.h b/arch/blackfin/include/asm/bfin_serial.h index 7dbc664eab1..7fd0ec7b5b0 100644 --- a/arch/blackfin/include/asm/bfin_serial.h +++ b/arch/blackfin/include/asm/bfin_serial.h | |||
| @@ -184,7 +184,7 @@ struct bfin_uart_regs { | |||
| 184 | #undef __BFP | 184 | #undef __BFP |
| 185 | 185 | ||
| 186 | #ifndef port_membase | 186 | #ifndef port_membase |
| 187 | # define port_membase(p) (((struct bfin_serial_port *)(p))->port.membase) | 187 | # define port_membase(p) 0 |
| 188 | #endif | 188 | #endif |
| 189 | 189 | ||
| 190 | #define UART_GET_CHAR(p) bfin_read16(port_membase(p) + OFFSET_RBR) | 190 | #define UART_GET_CHAR(p) bfin_read16(port_membase(p) + OFFSET_RBR) |
| @@ -235,10 +235,10 @@ struct bfin_uart_regs { | |||
| 235 | #define UART_SET_DLAB(p) do { UART_PUT_LCR(p, UART_GET_LCR(p) | DLAB); SSYNC(); } while (0) | 235 | #define UART_SET_DLAB(p) do { UART_PUT_LCR(p, UART_GET_LCR(p) | DLAB); SSYNC(); } while (0) |
| 236 | 236 | ||
| 237 | #ifndef put_lsr_cache | 237 | #ifndef put_lsr_cache |
| 238 | # define put_lsr_cache(p, v) (((struct bfin_serial_port *)(p))->lsr = (v)) | 238 | # define put_lsr_cache(p, v) |
| 239 | #endif | 239 | #endif |
| 240 | #ifndef get_lsr_cache | 240 | #ifndef get_lsr_cache |
| 241 | # define get_lsr_cache(p) (((struct bfin_serial_port *)(p))->lsr) | 241 | # define get_lsr_cache(p) 0 |
| 242 | #endif | 242 | #endif |
| 243 | 243 | ||
| 244 | /* The hardware clears the LSR bits upon read, so we need to cache | 244 | /* The hardware clears the LSR bits upon read, so we need to cache |
diff --git a/arch/blackfin/include/asm/gptimers.h b/arch/blackfin/include/asm/gptimers.h index c722acdda0d..38657dac123 100644 --- a/arch/blackfin/include/asm/gptimers.h +++ b/arch/blackfin/include/asm/gptimers.h | |||
| @@ -193,4 +193,22 @@ uint16_t get_enabled_gptimers(void); | |||
| 193 | uint32_t get_gptimer_status(unsigned int group); | 193 | uint32_t get_gptimer_status(unsigned int group); |
| 194 | void set_gptimer_status(unsigned int group, uint32_t value); | 194 | void set_gptimer_status(unsigned int group, uint32_t value); |
| 195 | 195 | ||
| 196 | /* | ||
| 197 | * All Blackfin system MMRs are padded to 32bits even if the register | ||
| 198 | * itself is only 16bits. So use a helper macro to streamline this. | ||
| 199 | */ | ||
| 200 | #define __BFP(m) u16 m; u16 __pad_##m | ||
| 201 | |||
| 202 | /* | ||
| 203 | * bfin timer registers layout | ||
| 204 | */ | ||
| 205 | struct bfin_gptimer_regs { | ||
| 206 | __BFP(config); | ||
| 207 | u32 counter; | ||
| 208 | u32 period; | ||
| 209 | u32 width; | ||
| 210 | }; | ||
| 211 | |||
| 212 | #undef __BFP | ||
| 213 | |||
| 196 | #endif | 214 | #endif |
diff --git a/arch/blackfin/include/asm/unistd.h b/arch/blackfin/include/asm/unistd.h index 6ff9c411b14..0ccba60b9cc 100644 --- a/arch/blackfin/include/asm/unistd.h +++ b/arch/blackfin/include/asm/unistd.h | |||
| @@ -398,8 +398,9 @@ | |||
| 398 | #define __NR_clock_adjtime 377 | 398 | #define __NR_clock_adjtime 377 |
| 399 | #define __NR_syncfs 378 | 399 | #define __NR_syncfs 378 |
| 400 | #define __NR_setns 379 | 400 | #define __NR_setns 379 |
| 401 | #define __NR_sendmmsg 380 | ||
| 401 | 402 | ||
| 402 | #define __NR_syscall 380 | 403 | #define __NR_syscall 381 |
| 403 | #define NR_syscalls __NR_syscall | 404 | #define NR_syscalls __NR_syscall |
| 404 | 405 | ||
| 405 | /* Old optional stuff no one actually uses */ | 406 | /* Old optional stuff no one actually uses */ |
diff --git a/arch/blackfin/kernel/debug-mmrs.c b/arch/blackfin/kernel/debug-mmrs.c index 94b1d8a0256..fce4807ceef 100644 --- a/arch/blackfin/kernel/debug-mmrs.c +++ b/arch/blackfin/kernel/debug-mmrs.c | |||
| @@ -13,6 +13,7 @@ | |||
| 13 | 13 | ||
| 14 | #include <asm/blackfin.h> | 14 | #include <asm/blackfin.h> |
| 15 | #include <asm/gpio.h> | 15 | #include <asm/gpio.h> |
| 16 | #include <asm/gptimers.h> | ||
| 16 | #include <asm/bfin_can.h> | 17 | #include <asm/bfin_can.h> |
| 17 | #include <asm/bfin_dma.h> | 18 | #include <asm/bfin_dma.h> |
| 18 | #include <asm/bfin_ppi.h> | 19 | #include <asm/bfin_ppi.h> |
| @@ -230,8 +231,8 @@ bfin_debug_mmrs_dma(struct dentry *parent, unsigned long base, int num, char mdm | |||
| 230 | #define DMA(num) _DMA(num, DMA##num##_NEXT_DESC_PTR, 0, "") | 231 | #define DMA(num) _DMA(num, DMA##num##_NEXT_DESC_PTR, 0, "") |
| 231 | #define _MDMA(num, x) \ | 232 | #define _MDMA(num, x) \ |
| 232 | do { \ | 233 | do { \ |
| 233 | _DMA(num, x##DMA_D##num##_CONFIG, 'D', #x); \ | 234 | _DMA(num, x##DMA_D##num##_NEXT_DESC_PTR, 'D', #x); \ |
| 234 | _DMA(num, x##DMA_S##num##_CONFIG, 'S', #x); \ | 235 | _DMA(num, x##DMA_S##num##_NEXT_DESC_PTR, 'S', #x); \ |
| 235 | } while (0) | 236 | } while (0) |
| 236 | #define MDMA(num) _MDMA(num, M) | 237 | #define MDMA(num) _MDMA(num, M) |
| 237 | #define IMDMA(num) _MDMA(num, IM) | 238 | #define IMDMA(num) _MDMA(num, IM) |
| @@ -264,20 +265,15 @@ bfin_debug_mmrs_eppi(struct dentry *parent, unsigned long base, int num) | |||
| 264 | /* | 265 | /* |
| 265 | * General Purpose Timers | 266 | * General Purpose Timers |
| 266 | */ | 267 | */ |
| 267 | #define GPTIMER_OFF(mmr) (TIMER0_##mmr - TIMER0_CONFIG) | 268 | #define __GPTIMER(uname, lname) __REGS(gptimer, #uname, lname) |
| 268 | #define __GPTIMER(name) \ | ||
| 269 | do { \ | ||
| 270 | strcpy(_buf, #name); \ | ||
| 271 | debugfs_create_x16(buf, S_IRUSR|S_IWUSR, parent, (u16 *)(base + GPTIMER_OFF(name))); \ | ||
| 272 | } while (0) | ||
| 273 | static void __init __maybe_unused | 269 | static void __init __maybe_unused |
| 274 | bfin_debug_mmrs_gptimer(struct dentry *parent, unsigned long base, int num) | 270 | bfin_debug_mmrs_gptimer(struct dentry *parent, unsigned long base, int num) |
| 275 | { | 271 | { |
| 276 | char buf[32], *_buf = REGS_STR_PFX(buf, TIMER, num); | 272 | char buf[32], *_buf = REGS_STR_PFX(buf, TIMER, num); |
| 277 | __GPTIMER(CONFIG); | 273 | __GPTIMER(CONFIG, config); |
| 278 | __GPTIMER(COUNTER); | 274 | __GPTIMER(COUNTER, counter); |
| 279 | __GPTIMER(PERIOD); | 275 | __GPTIMER(PERIOD, period); |
| 280 | __GPTIMER(WIDTH); | 276 | __GPTIMER(WIDTH, width); |
| 281 | } | 277 | } |
| 282 | #define GPTIMER(num) bfin_debug_mmrs_gptimer(parent, TIMER##num##_CONFIG, num) | 278 | #define GPTIMER(num) bfin_debug_mmrs_gptimer(parent, TIMER##num##_CONFIG, num) |
| 283 | 279 | ||
| @@ -355,7 +351,7 @@ bfin_debug_mmrs_ppi(struct dentry *parent, unsigned long base, int num) | |||
| 355 | __PPI(DELAY, delay); | 351 | __PPI(DELAY, delay); |
| 356 | __PPI(FRAME, frame); | 352 | __PPI(FRAME, frame); |
| 357 | } | 353 | } |
| 358 | #define PPI(num) bfin_debug_mmrs_ppi(parent, PPI##num##_STATUS, num) | 354 | #define PPI(num) bfin_debug_mmrs_ppi(parent, PPI##num##_CONTROL, num) |
| 359 | 355 | ||
| 360 | /* | 356 | /* |
| 361 | * SPI | 357 | * SPI |
| @@ -1288,15 +1284,15 @@ static int __init bfin_debug_mmrs_init(void) | |||
| 1288 | D16(VR_CTL); | 1284 | D16(VR_CTL); |
| 1289 | D32(CHIPID); /* it's part of this hardware block */ | 1285 | D32(CHIPID); /* it's part of this hardware block */ |
| 1290 | 1286 | ||
| 1291 | #if defined(PPI_STATUS) || defined(PPI0_STATUS) || defined(PPI1_STATUS) | 1287 | #if defined(PPI_CONTROL) || defined(PPI0_CONTROL) || defined(PPI1_CONTROL) |
| 1292 | parent = debugfs_create_dir("ppi", top); | 1288 | parent = debugfs_create_dir("ppi", top); |
| 1293 | # ifdef PPI_STATUS | 1289 | # ifdef PPI_CONTROL |
| 1294 | bfin_debug_mmrs_ppi(parent, PPI_STATUS, -1); | 1290 | bfin_debug_mmrs_ppi(parent, PPI_CONTROL, -1); |
| 1295 | # endif | 1291 | # endif |
| 1296 | # ifdef PPI0_STATUS | 1292 | # ifdef PPI0_CONTROL |
| 1297 | PPI(0); | 1293 | PPI(0); |
| 1298 | # endif | 1294 | # endif |
| 1299 | # ifdef PPI1_STATUS | 1295 | # ifdef PPI1_CONTROL |
| 1300 | PPI(1); | 1296 | PPI(1); |
| 1301 | # endif | 1297 | # endif |
| 1302 | #endif | 1298 | #endif |
| @@ -1341,6 +1337,10 @@ static int __init bfin_debug_mmrs_init(void) | |||
| 1341 | D16(RSI_PID1); | 1337 | D16(RSI_PID1); |
| 1342 | D16(RSI_PID2); | 1338 | D16(RSI_PID2); |
| 1343 | D16(RSI_PID3); | 1339 | D16(RSI_PID3); |
| 1340 | D16(RSI_PID4); | ||
| 1341 | D16(RSI_PID5); | ||
| 1342 | D16(RSI_PID6); | ||
| 1343 | D16(RSI_PID7); | ||
| 1344 | D16(RSI_PWR_CONTROL); | 1344 | D16(RSI_PWR_CONTROL); |
| 1345 | D16(RSI_RD_WAIT_EN); | 1345 | D16(RSI_RD_WAIT_EN); |
| 1346 | D32(RSI_RESPONSE0); | 1346 | D32(RSI_RESPONSE0); |
diff --git a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h deleted file mode 100644 index f6d924ac0c4..00000000000 --- a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h +++ /dev/null | |||
| @@ -1,79 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2008-2009 Analog Devices Inc. | ||
| 3 | * | ||
| 4 | * Licensed under the GPL-2 or later | ||
| 5 | */ | ||
| 6 | |||
| 7 | #include <asm/dma.h> | ||
| 8 | #include <asm/portm | ||
