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-rw-r--r--Documentation/devicetree/bindings/net/fsl-fec.txt2
-rw-r--r--Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt2
-rw-r--r--arch/arm/boot/dts/imx27-phytec-phycore.dts8
-rw-r--r--arch/arm/boot/dts/imx27.dtsi14
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts8
-rw-r--r--arch/arm/boot/dts/imx51.dtsi8
-rw-r--r--arch/arm/boot/dts/imx53-ard.dts2
-rw-r--r--arch/arm/boot/dts/imx53-evk.dts4
-rw-r--r--arch/arm/boot/dts/imx53-qsb.dts4
-rw-r--r--arch/arm/boot/dts/imx53-smd.dts8
-rw-r--r--arch/arm/boot/dts/imx53.dtsi12
-rw-r--r--arch/arm/boot/dts/imx6q-arm2.dts4
-rw-r--r--arch/arm/boot/dts/imx6q-sabrelite.dts4
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi12
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c22
15 files changed, 57 insertions, 57 deletions
diff --git a/Documentation/devicetree/bindings/net/fsl-fec.txt b/Documentation/devicetree/bindings/net/fsl-fec.txt
index de439517dff..7ab9e1a2d8b 100644
--- a/Documentation/devicetree/bindings/net/fsl-fec.txt
+++ b/Documentation/devicetree/bindings/net/fsl-fec.txt
@@ -14,7 +14,7 @@ Optional properties:
14 14
15Example: 15Example:
16 16
17fec@83fec000 { 17ethernet@83fec000 {
18 compatible = "fsl,imx51-fec", "fsl,imx27-fec"; 18 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
19 reg = <0x83fec000 0x4000>; 19 reg = <0x83fec000 0x4000>;
20 interrupts = <87>; 20 interrupts = <87>;
diff --git a/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt b/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt
index a9c0406280e..b462d0c5482 100644
--- a/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt
+++ b/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt
@@ -11,7 +11,7 @@ Optional properties:
11 11
12Example: 12Example:
13 13
14uart@73fbc000 { 14serial@73fbc000 {
15 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 15 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
16 reg = <0x73fbc000 0x4000>; 16 reg = <0x73fbc000 0x4000>;
17 interrupts = <31>; 17 interrupts = <31>;
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore.dts b/arch/arm/boot/dts/imx27-phytec-phycore.dts
index a51a08fc2af..2b0ff60247a 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore.dts
@@ -27,22 +27,22 @@
27 status = "okay"; 27 status = "okay";
28 }; 28 };
29 29
30 uart@1000a000 { 30 serial@1000a000 {
31 fsl,uart-has-rtscts; 31 fsl,uart-has-rtscts;
32 status = "okay"; 32 status = "okay";
33 }; 33 };
34 34
35 uart@1000b000 { 35 serial@1000b000 {
36 fsl,uart-has-rtscts; 36 fsl,uart-has-rtscts;
37 status = "okay"; 37 status = "okay";
38 }; 38 };
39 39
40 uart@1000c000 { 40 serial@1000c000 {
41 fsl,uart-has-rtscts; 41 fsl,uart-has-rtscts;
42 status = "okay"; 42 status = "okay";
43 }; 43 };
44 44
45 fec@1002b000 { 45 ethernet@1002b000 {
46 status = "okay"; 46 status = "okay";
47 }; 47 };
48 48
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index bc5e7d5ddd5..2b1a166d41f 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -59,28 +59,28 @@
59 status = "disabled"; 59 status = "disabled";
60 }; 60 };
61 61
62 uart1: uart@1000a000 { 62 uart1: serial@1000a000 {
63 compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 63 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
64 reg = <0x1000a000 0x1000>; 64 reg = <0x1000a000 0x1000>;
65 interrupts = <20>; 65 interrupts = <20>;
66 status = "disabled"; 66 status = "disabled";
67 }; 67 };
68 68
69 uart2: uart@1000b000 { 69 uart2: serial@1000b000 {
70 compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 70 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
71 reg = <0x1000b000 0x1000>; 71 reg = <0x1000b000 0x1000>;
72 interrupts = <19>; 72 interrupts = <19>;
73 status = "disabled"; 73 status = "disabled";
74 }; 74 };
75 75
76 uart3: uart@1000c000 { 76 uart3: serial@1000c000 {
77 compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 77 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
78 reg = <0x1000c000 0x1000>; 78 reg = <0x1000c000 0x1000>;
79 interrupts = <18>; 79 interrupts = <18>;
80 status = "disabled"; 80 status = "disabled";
81 }; 81 };
82 82
83 uart4: uart@1000d000 { 83 uart4: serial@1000d000 {
84 compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 84 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
85 reg = <0x1000d000 0x1000>; 85 reg = <0x1000d000 0x1000>;
86 interrupts = <17>; 86 interrupts = <17>;
@@ -183,14 +183,14 @@
183 status = "disabled"; 183 status = "disabled";
184 }; 184 };
185 185
186 uart5: uart@1001b000 { 186 uart5: serial@1001b000 {
187 compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 187 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
188 reg = <0x1001b000 0x1000>; 188 reg = <0x1001b000 0x1000>;
189 interrupts = <49>; 189 interrupts = <49>;
190 status = "disabled"; 190 status = "disabled";
191 }; 191 };
192 192
193 uart6: uart@1001c000 { 193 uart6: serial@1001c000 {
194 compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 194 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
195 reg = <0x1001c000 0x1000>; 195 reg = <0x1001c000 0x1000>;
196 interrupts = <48>; 196 interrupts = <48>;
@@ -206,7 +206,7 @@
206 status = "disabled"; 206 status = "disabled";
207 }; 207 };
208 208
209 fec: fec@1002b000 { 209 fec: ethernet@1002b000 {
210 compatible = "fsl,imx27-fec"; 210 compatible = "fsl,imx27-fec";
211 reg = <0x1002b000 0x4000>; 211 reg = <0x1002b000 0x4000>;
212 interrupts = <50>; 212 interrupts = <50>;
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index fd729d459d9..d42a404c0ce 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -36,7 +36,7 @@
36 status = "okay"; 36 status = "okay";
37 }; 37 };
38 38
39 uart3: uart@7000c000 { 39 uart3: serial@7000c000 {
40 fsl,uart-has-rtscts; 40 fsl,uart-has-rtscts;
41 status = "okay"; 41 status = "okay";
42 }; 42 };
@@ -173,12 +173,12 @@
173 reg = <0x73fa8000 0x4000>; 173 reg = <0x73fa8000 0x4000>;
174 }; 174 };
175 175
176 uart1: uart@73fbc000 { 176 uart1: serial@73fbc000 {
177 fsl,uart-has-rtscts; 177 fsl,uart-has-rtscts;
178 status = "okay"; 178 status = "okay";
179 }; 179 };
180 180
181 uart2: uart@73fc0000 { 181 uart2: serial@73fc0000 {
182 status = "okay"; 182 status = "okay";
183 }; 183 };
184 }; 184 };
@@ -197,7 +197,7 @@
197 }; 197 };
198 }; 198 };
199 199
200 fec@83fec000 { 200 ethernet@83fec000 {
201 phy-mode = "mii"; 201 phy-mode = "mii";
202 status = "okay"; 202 status = "okay";
203 }; 203 };
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 6663986fe1c..66f0ebd8417 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -86,7 +86,7 @@
86 status = "disabled"; 86 status = "disabled";
87 }; 87 };
88 88
89 uart3: uart@7000c000 { 89 uart3: serial@7000c000 {
90 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 90 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
91 reg = <0x7000c000 0x4000>; 91 reg = <0x7000c000 0x4000>;
92 interrupts = <33>; 92 interrupts = <33>;
@@ -171,14 +171,14 @@
171 status = "disabled"; 171 status = "disabled";
172 }; 172 };
173 173
174 uart1: uart@73fbc000 { 174 uart1: serial@73fbc000 {
175 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 175 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
176 reg = <0x73fbc000 0x4000>; 176 reg = <0x73fbc000 0x4000>;
177 interrupts = <31>; 177 interrupts = <31>;
178 status = "disabled"; 178 status = "disabled";
179 }; 179 };
180 180
181 uart2: uart@73fc0000 { 181 uart2: serial@73fc0000 {
182 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 182 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
183 reg = <0x73fc0000 0x4000>; 183 reg = <0x73fc0000 0x4000>;
184 interrupts = <32>; 184 interrupts = <32>;
@@ -235,7 +235,7 @@
235 status = "disabled"; 235 status = "disabled";
236 }; 236 };
237 237
238 fec@83fec000 { 238 ethernet@83fec000 {
239 compatible = "fsl,imx51-fec", "fsl,imx27-fec"; 239 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
240 reg = <0x83fec000 0x4000>; 240 reg = <0x83fec000 0x4000>;
241 interrupts = <87>; 241 interrupts = <87>;
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
index 4c61b7f9857..5b8eafcdbee 100644
--- a/arch/arm/boot/dts/imx53-ard.dts
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -40,7 +40,7 @@
40 reg = <0x53fa8000 0x4000>; 40 reg = <0x53fa8000 0x4000>;
41 }; 41 };
42 42
43 uart1: uart@53fbc000 { 43 uart1: serial@53fbc000 {
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 }; 46 };
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts
index 8ce5fe14a22..9c798034675 100644
--- a/arch/arm/boot/dts/imx53-evk.dts
+++ b/arch/arm/boot/dts/imx53-evk.dts
@@ -71,7 +71,7 @@
71 reg = <0x53fa8000 0x4000>; 71 reg = <0x53fa8000 0x4000>;
72 }; 72 };
73 73
74 uart1: uart@53fbc000 { 74 uart1: serial@53fbc000 {
75 status = "okay"; 75 status = "okay";
76 }; 76 };
77 }; 77 };
@@ -95,7 +95,7 @@
95 }; 95 };
96 }; 96 };
97 97
98 fec@63fec000 { 98 ethernet@63fec000 {
99 phy-mode = "rmii"; 99 phy-mode = "rmii";
100 phy-reset-gpios = <&gpio7 6 0>; 100 phy-reset-gpios = <&gpio7 6 0>;
101 status = "okay"; 101 status = "okay";
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index de34a174058..b08b5874da6 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -45,7 +45,7 @@
45 reg = <0x53fa8000 0x4000>; 45 reg = <0x53fa8000 0x4000>;
46 }; 46 };
47 47
48 uart1: uart@53fbc000 { 48 uart1: serial@53fbc000 {
49 status = "okay"; 49 status = "okay";
50 }; 50 };
51 }; 51 };
@@ -78,7 +78,7 @@
78 }; 78 };
79 }; 79 };
80 80
81 fec@63fec000 { 81 ethernet@63fec000 {
82 phy-mode = "rmii"; 82 phy-mode = "rmii";
83 phy-reset-gpios = <&gpio7 6 0>; 83 phy-reset-gpios = <&gpio7 6 0>;
84 status = "okay"; 84 status = "okay";
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index a984fa508a0..a3529afc4d2 100644
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -35,7 +35,7 @@
35 status = "okay"; 35 status = "okay";
36 }; 36 };
37 37
38 uart3: uart@5000c000 { 38 uart3: serial@5000c000 {
39 fsl,uart-has-rtscts; 39 fsl,uart-has-rtscts;
40 status = "okay"; 40 status = "okay";
41 }; 41 };
@@ -86,11 +86,11 @@
86 reg = <0x53fa8000 0x4000>; 86 reg = <0x53fa8000 0x4000>;
87 }; 87 };
88 88
89 uart1: uart@53fbc000 { 89 uart1: serial@53fbc000 {
90 status = "okay"; 90 status = "okay";
91 }; 91 };
92 92
93 uart2: uart@53fc0000 { 93 uart2: serial@53fc0000 {
94 status = "okay"; 94 status = "okay";
95 }; 95 };
96 }; 96 };
@@ -138,7 +138,7 @@
138 }; 138 };
139 }; 139 };
140 140
141 fec@63fec000 { 141 ethernet@63fec000 {
142 phy-mode = "rmii"; 142 phy-mode = "rmii";
143 phy-reset-gpios = <&gpio7 6 0>; 143 phy-reset-gpios = <&gpio7 6 0>;
144 status = "okay"; 144 status = "okay";
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 5dd91b942c9..5188615b517 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -88,7 +88,7 @@
88 status = "disabled"; 88 status = "disabled";
89 }; 89 };
90 90
91 uart3: uart@5000c000 { 91 uart3: serial@5000c000 {
92 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 92 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
93 reg = <0x5000c000 0x4000>; 93 reg = <0x5000c000 0x4000>;
94 interrupts = <33>; 94 interrupts = <33>;
@@ -173,14 +173,14 @@
173 status = "disabled"; 173 status = "disabled";
174 }; 174 };
175 175
176 uart1: uart@53fbc000 { 176 uart1: serial@53fbc000 {
177 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 177 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
178 reg = <0x53fbc000 0x4000>; 178 reg = <0x53fbc000 0x4000>;
179 interrupts = <31>; 179 interrupts = <31>;
180 status = "disabled"; 180 status = "disabled";
181 }; 181 };
182 182
183 uart2: uart@53fc0000 { 183 uart2: serial@53fc0000 {
184 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 184 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
185 reg = <0x53fc0000 0x4000>; 185 reg = <0x53fc0000 0x4000>;
186 interrupts = <32>; 186 interrupts = <32>;
@@ -226,7 +226,7 @@
226 status = "disabled"; 226 status = "disabled";
227 }; 227 };
228 228
229 uart4: uart@53ff0000 { 229 uart4: serial@53ff0000 {
230 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 230 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
231 reg = <0x53ff0000 0x4000>; 231 reg = <0x53ff0000 0x4000>;
232 interrupts = <13>; 232 interrupts = <13>;
@@ -241,7 +241,7 @@
241 reg = <0x60000000 0x10000000>; 241 reg = <0x60000000 0x10000000>;
242 ranges; 242 ranges;
243 243
244 uart5: uart@63f90000 { 244 uart5: serial@63f90000 {
245 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 245 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
246 reg = <0x63f90000 0x4000>; 246 reg = <0x63f90000 0x4000>;
247 interrupts = <86>; 247 interrupts = <86>;
@@ -290,7 +290,7 @@
290 status = "disabled"; 290 status = "disabled";
291 }; 291 };
292 292
293 fec@63fec000 { 293 ethernet@63fec000 {
294 compatible = "fsl,imx53-fec", "fsl,imx25-fec"; 294 compatible = "fsl,imx53-fec", "fsl,imx25-fec";
295 reg = <0x63fec000 0x4000>; 295 reg = <0x63fec000 0x4000>;
296 interrupts = <87>; 296 interrupts = <87>;
diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts
index 1b2b64fd120..9c468d2338f 100644
--- a/arch/arm/boot/dts/imx6q-arm2.dts
+++ b/arch/arm/boot/dts/imx6q-arm2.dts
@@ -23,7 +23,7 @@
23 23
24 soc { 24 soc {
25 aips-bus@02100000 { /* AIPS2 */ 25 aips-bus@02100000 { /* AIPS2 */
26 enet@02188000 { 26 ethernet@02188000 {
27 phy-mode = "rgmii"; 27 phy-mode = "rgmii";
28 local-mac-address = [00 04 9F 01 1B 61]; 28 local-mac-address = [00 04 9F 01 1B 61];
29 status = "okay"; 29 status = "okay";
@@ -42,7 +42,7 @@
42 status = "okay"; 42 status = "okay";
43 }; 43 };
44 44
45 uart4: uart@021f0000 { 45 uart4: serial@021f0000 {
46 status = "okay"; 46 status = "okay";
47 }; 47 };
48 }; 48 };
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index 4663a4e5a28..a93c593fed8 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -23,7 +23,7 @@
23 23
24 soc { 24 soc {
25 aips-bus@02100000 { /* AIPS2 */ 25 aips-bus@02100000 { /* AIPS2 */
26 enet@02188000 { 26 ethernet@02188000 {
27 phy-mode = "rgmii"; 27 phy-mode = "rgmii";
28 phy-reset-gpios = <&gpio3 23 0>; 28 phy-reset-gpios = <&gpio3 23 0>;
29 status = "okay"; 29 status = "okay";
@@ -43,7 +43,7 @@
43 status = "okay"; 43 status = "okay";
44 }; 44 };
45 45
46 uart2: uart@021e8000 { 46 uart2: serial@021e8000 {
47 status = "okay"; 47 status = "okay";
48 }; 48 };
49 49
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 68f2e429416..56c5304e4cb 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -165,7 +165,7 @@
165 status = "disabled"; 165 status = "disabled";
166 }; 166 };
167 167
168 uart1: uart@02020000 { 168 uart1: serial@02020000 {
169 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 169 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
170 reg = <0x02020000 0x4000>; 170 reg = <0x02020000 0x4000>;
171 interrupts = <0 26 0x04>; 171 interrupts = <0 26 0x04>;
@@ -506,7 +506,7 @@
506 reg = <0x0217c000 0x4000>; 506 reg = <0x0217c000 0x4000>;
507 }; 507 };
508 508
509 enet@02188000 { 509 ethernet@02188000 {
510 compatible = "fsl,imx6q-fec"; 510 compatible = "fsl,imx6q-fec";
511 reg = <0x02188000 0x4000>; 511 reg = <0x02188000 0x4000>;
512 interrupts = <0 118 0x04 0 119 0x04>; 512 interrupts = <0 118 0x04 0 119 0x04>;
@@ -627,28 +627,28 @@
627 interrupts = <0 18 0x04>; 627 interrupts = <0 18 0x04>;
628 }; 628 };
629 629
630 uart2: uart@021e8000 { 630 uart2: serial@021e8000 {
631 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 631 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
632 reg = <0x021e8000 0x4000>; 632 reg = <0x021e8000 0x4000>;
633 interrupts = <0 27 0x04>; 633 interrupts = <0 27 0x04>;
634 status = "disabled"; 634 status = "disabled";
635 }; 635 };
636 636
637 uart3: uart@021ec000 { 637 uart3: serial@021ec000 {
638 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 638 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
639 reg = <0x021ec000 0x4000>; 639 reg = <0x021ec000 0x4000>;
640 interrupts = <0 28 0x04>; 640 interrupts = <0 28 0x04>;
641 status = "disabled"; 641 status = "disabled";
642 }; 642 };
643 643
644 uart4: uart@021f0000 { 644 uart4: serial@021f0000 {
645 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 645 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
646 reg = <0x021f0000 0x4000>; 646 reg = <0x021f0000 0x4000>;
647 interrupts = <0 29 0x04>; 647 interrupts = <0 29 0x04>;
648 status = "disabled"; 648 status = "disabled";
649 }; 649 };
650 650
651 uart5: uart@021f4000 { 651 uart5: serial@021f4000 {
652 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 652 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
653 reg = <0x021f4000 0x4000>; 653 reg = <0x021f4000 0x4000>;
654 interrupts = <0 30 0x04>; 654 interrupts = <0 30 0x04>;
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index f40a35da2e5..b37ad4bc203 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -392,17 +392,17 @@ int __init mx6q_clocks_init(void)
392 clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); 392 clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
393 clk_register_clkdev(clk[twd], NULL, "smp_twd"); 393 clk_register_clkdev(clk[twd], NULL, "smp_twd");
394 clk_register_clkdev(clk[usboh3], NULL, "usboh3"); 394 clk_register_clkdev(clk[usboh3], NULL, "usboh3");
395 clk_register_clkdev(clk[uart_serial], "per", "2020000.uart"); 395 clk_register_clkdev(clk[uart_serial], "per", "2020000.serial");
396 clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.uart"); 396 clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial");
397 clk_register_clkdev(clk[uart_serial], "per", "21e8000.uart"); 397 clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial");
398 clk_register_clkdev(clk[uart_ipg], "ipg", "21e8000.uart"); 398 clk_register_clkdev(clk[uart_ipg], "ipg", "21e8000.serial");
399 clk_register_clkdev(clk[uart_serial], "per", "21ec000.uart"); 399 clk_register_clkdev(clk[uart_serial], "per", "21ec000.serial");
400 clk_register_clkdev(clk[uart_ipg], "ipg", "21ec000.uart"); 400 clk_register_clkdev(clk[uart_ipg], "ipg", "21ec000.serial");
401 clk_register_clkdev(clk[uart_serial], "per", "21f0000.uart"); 401 clk_register_clkdev(clk[uart_serial], "per", "21f0000.serial");
402 clk_register_clkdev(clk[uart_ipg], "ipg", "21f0000.uart"); 402 clk_register_clkdev(clk[uart_ipg], "ipg", "21f0000.serial");
403 clk_register_clkdev(clk[uart_serial], "per", "21f4000.uart"); 403 clk_register_clkdev(clk[uart_serial], "per", "21f4000.serial");
404 clk_register_clkdev(clk[uart_ipg], "ipg", "21f4000.uart"); 404 clk_register_clkdev(clk[uart_ipg], "ipg", "21f4000.serial");
405 clk_register_clkdev(clk[enet], NULL, "2188000.enet"); 405 clk_register_clkdev(clk[enet], NULL, "2188000.ethernet");
406 clk_register_clkdev(clk[usdhc1], NULL, "2190000.usdhc"); 406 clk_register_clkdev(clk[usdhc1], NULL, "2190000.usdhc");
407 clk_register_clkdev(clk[usdhc2], NULL, "2194000.usdhc"); 407 clk_register_clkdev(clk[usdhc2], NULL, "2194000.usdhc");
408 clk_register_clkdev(clk[usdhc3], NULL, "2198000.usdhc"); 408 clk_register_clkdev(clk[usdhc3], NULL, "2198000.usdhc");
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-22 02:39:26 -0400