diff options
author | Peter Ujfalusi <peter.ujfalusi@nokia.com> | 2009-04-03 07:39:05 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-04-03 07:48:40 -0400 |
commit | 103f211d0be2bed75b5739de62a10415ef0bbc25 (patch) | |
tree | 17014a12ab363204e710a04248fb16cdf9e6b14d /sound | |
parent | 0a11b16853b642a26eb248ac4db422e6dfa04ae5 (diff) |
ASoC: TWL4030: Add actual support for 96KHz playback support
Adds the needed code to be able to use 96KHz playback.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound')
-rw-r--r-- | sound/soc/codecs/twl4030.c | 3 | ||||
-rw-r--r-- | sound/soc/codecs/twl4030.h | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c index 4199498a891..bfda7a88e82 100644 --- a/sound/soc/codecs/twl4030.c +++ b/sound/soc/codecs/twl4030.c | |||
@@ -1311,6 +1311,9 @@ static int twl4030_hw_params(struct snd_pcm_substream *substream, | |||
1311 | case 48000: | 1311 | case 48000: |
1312 | mode |= TWL4030_APLL_RATE_48000; | 1312 | mode |= TWL4030_APLL_RATE_48000; |
1313 | break; | 1313 | break; |
1314 | case 96000: | ||
1315 | mode |= TWL4030_APLL_RATE_96000; | ||
1316 | break; | ||
1314 | default: | 1317 | default: |
1315 | printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n", | 1318 | printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n", |
1316 | params_rate(params)); | 1319 | params_rate(params)); |
diff --git a/sound/soc/codecs/twl4030.h b/sound/soc/codecs/twl4030.h index 33dbb144dad..cb63765db1d 100644 --- a/sound/soc/codecs/twl4030.h +++ b/sound/soc/codecs/twl4030.h | |||
@@ -109,6 +109,7 @@ | |||
109 | #define TWL4030_APLL_RATE_32000 0x80 | 109 | #define TWL4030_APLL_RATE_32000 0x80 |
110 | #define TWL4030_APLL_RATE_44100 0x90 | 110 | #define TWL4030_APLL_RATE_44100 0x90 |
111 | #define TWL4030_APLL_RATE_48000 0xA0 | 111 | #define TWL4030_APLL_RATE_48000 0xA0 |
112 | #define TWL4030_APLL_RATE_96000 0xE0 | ||
112 | #define TWL4030_SEL_16K 0x04 | 113 | #define TWL4030_SEL_16K 0x04 |
113 | #define TWL4030_CODECPDZ 0x02 | 114 | #define TWL4030_CODECPDZ 0x02 |
114 | #define TWL4030_OPT_MODE 0x01 | 115 | #define TWL4030_OPT_MODE 0x01 |