diff options
author | Jonathan Herman <hermanjl@cs.unc.edu> | 2013-01-22 10:38:37 -0500 |
---|---|---|
committer | Jonathan Herman <hermanjl@cs.unc.edu> | 2013-01-22 10:38:37 -0500 |
commit | fcc9d2e5a6c89d22b8b773a64fb4ad21ac318446 (patch) | |
tree | a57612d1888735a2ec7972891b68c1ac5ec8faea /sound/soc/tegra/tegra_max98088.c | |
parent | 8dea78da5cee153b8af9c07a2745f6c55057fe12 (diff) |
Diffstat (limited to 'sound/soc/tegra/tegra_max98088.c')
-rw-r--r-- | sound/soc/tegra/tegra_max98088.c | 1233 |
1 files changed, 1233 insertions, 0 deletions
diff --git a/sound/soc/tegra/tegra_max98088.c b/sound/soc/tegra/tegra_max98088.c new file mode 100644 index 00000000000..bae2b783895 --- /dev/null +++ b/sound/soc/tegra/tegra_max98088.c | |||
@@ -0,0 +1,1233 @@ | |||
1 | /* | ||
2 | * tegra_max98088.c - Tegra machine ASoC driver for boards using MAX98088 codec. | ||
3 | * | ||
4 | * Author: Sumit Bhattacharya <sumitb@nvidia.com> | ||
5 | * Copyright (C) 2011 - NVIDIA, Inc. | ||
6 | * | ||
7 | * Based on code copyright/by: | ||
8 | * | ||
9 | * (c) 2010, 2011 Nvidia Graphics Pvt. Ltd. | ||
10 | * | ||
11 | * Copyright 2007 Wolfson Microelectronics PLC. | ||
12 | * Author: Graeme Gregory | ||
13 | * graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or | ||
16 | * modify it under the terms of the GNU General Public License | ||
17 | * version 2 as published by the Free Software Foundation. | ||
18 | * | ||
19 | * This program is distributed in the hope that it will be useful, but | ||
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
22 | * General Public License for more details. | ||
23 | * | ||
24 | * You should have received a copy of the GNU General Public License | ||
25 | * along with this program; if not, write to the Free Software | ||
26 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
27 | * 02110-1301 USA | ||
28 | * | ||
29 | */ | ||
30 | |||
31 | #include <asm/mach-types.h> | ||
32 | |||
33 | #include <linux/clk.h> | ||
34 | #include <linux/module.h> | ||
35 | #include <linux/platform_device.h> | ||
36 | #include <linux/slab.h> | ||
37 | #include <linux/gpio.h> | ||
38 | #include <linux/regulator/consumer.h> | ||
39 | #ifdef CONFIG_SWITCH | ||
40 | #include <linux/switch.h> | ||
41 | #endif | ||
42 | |||
43 | #include <mach/tegra_asoc_pdata.h> | ||
44 | |||
45 | #include <sound/core.h> | ||
46 | #include <sound/jack.h> | ||
47 | #include <sound/pcm.h> | ||
48 | #include <sound/pcm_params.h> | ||
49 | #include <sound/soc.h> | ||
50 | |||
51 | #include "../codecs/max98088.h" | ||
52 | |||
53 | #include "tegra_pcm.h" | ||
54 | #include "tegra_asoc_utils.h" | ||
55 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
56 | #include "tegra30_ahub.h" | ||
57 | #include "tegra30_i2s.h" | ||
58 | #include "tegra30_dam.h" | ||
59 | #endif | ||
60 | |||
61 | #define DRV_NAME "tegra-snd-max98088" | ||
62 | |||
63 | #define GPIO_SPKR_EN BIT(0) | ||
64 | #define GPIO_HP_MUTE BIT(1) | ||
65 | #define GPIO_INT_MIC_EN BIT(2) | ||
66 | #define GPIO_EXT_MIC_EN BIT(3) | ||
67 | |||
68 | #define DAI_LINK_HIFI 0 | ||
69 | #define DAI_LINK_SPDIF 1 | ||
70 | #define DAI_LINK_BTSCO 2 | ||
71 | #define DAI_LINK_VOICE_CALL 3 | ||
72 | #define DAI_LINK_BT_VOICE_CALL 4 | ||
73 | #define NUM_DAI_LINKS 5 | ||
74 | |||
75 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
76 | const char *tegra_max98088_i2s_dai_name[TEGRA30_NR_I2S_IFC] = { | ||
77 | "tegra30-i2s.0", | ||
78 | "tegra30-i2s.1", | ||
79 | "tegra30-i2s.2", | ||
80 | "tegra30-i2s.3", | ||
81 | "tegra30-i2s.4", | ||
82 | }; | ||
83 | #endif | ||
84 | |||
85 | extern int g_is_call_mode; | ||
86 | |||
87 | struct tegra_max98088 { | ||
88 | struct tegra_asoc_utils_data util_data; | ||
89 | struct tegra_asoc_platform_data *pdata; | ||
90 | int gpio_requested; | ||
91 | bool init_done; | ||
92 | int is_call_mode; | ||
93 | int is_device_bt; | ||
94 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
95 | struct codec_config codec_info[NUM_I2S_DEVICES]; | ||
96 | #endif | ||
97 | enum snd_soc_bias_level bias_level; | ||
98 | struct snd_soc_card *pcard; | ||
99 | }; | ||
100 | |||
101 | static int tegra_call_mode_info(struct snd_kcontrol *kcontrol, | ||
102 | struct snd_ctl_elem_info *uinfo) | ||
103 | { | ||
104 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | ||
105 | uinfo->count = 1; | ||
106 | uinfo->value.integer.min = 0; | ||
107 | uinfo->value.integer.max = 1; | ||
108 | return 0; | ||
109 | } | ||
110 | |||
111 | static int tegra_call_mode_get(struct snd_kcontrol *kcontrol, | ||
112 | struct snd_ctl_elem_value *ucontrol) | ||
113 | { | ||
114 | struct tegra_max98088 *machine = snd_kcontrol_chip(kcontrol); | ||
115 | |||
116 | ucontrol->value.integer.value[0] = machine->is_call_mode; | ||
117 | |||
118 | return 0; | ||
119 | } | ||
120 | |||
121 | static int tegra_call_mode_put(struct snd_kcontrol *kcontrol, | ||
122 | struct snd_ctl_elem_value *ucontrol) | ||
123 | { | ||
124 | struct tegra_max98088 *machine = snd_kcontrol_chip(kcontrol); | ||
125 | int is_call_mode_new = ucontrol->value.integer.value[0]; | ||
126 | int codec_index; | ||
127 | unsigned int i; | ||
128 | |||
129 | if (machine->is_call_mode == is_call_mode_new) | ||
130 | return 0; | ||
131 | |||
132 | if (machine->is_device_bt) | ||
133 | codec_index = BT_SCO; | ||
134 | else | ||
135 | codec_index = HIFI_CODEC; | ||
136 | |||
137 | if (is_call_mode_new) { | ||
138 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
139 | if (machine->codec_info[codec_index].rate == 0 || | ||
140 | machine->codec_info[codec_index].channels == 0) | ||
141 | return -EINVAL; | ||
142 | |||
143 | for (i = 0; i < machine->pcard->num_links; i++) | ||
144 | machine->pcard->dai_link[i].ignore_suspend = 1; | ||
145 | |||
146 | tegra30_make_voice_call_connections( | ||
147 | &machine->codec_info[codec_index], | ||
148 | &machine->codec_info[BASEBAND]); | ||
149 | #endif | ||
150 | } else { | ||
151 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
152 | tegra30_break_voice_call_connections( | ||
153 | &machine->codec_info[codec_index], | ||
154 | &machine->codec_info[BASEBAND]); | ||
155 | |||
156 | for (i = 0; i < machine->pcard->num_links; i++) | ||
157 | machine->pcard->dai_link[i].ignore_suspend = 0; | ||
158 | #endif | ||
159 | } | ||
160 | |||
161 | machine->is_call_mode = is_call_mode_new; | ||
162 | g_is_call_mode = machine->is_call_mode; | ||
163 | |||
164 | return 1; | ||
165 | } | ||
166 | |||
167 | struct snd_kcontrol_new tegra_call_mode_control = { | ||
168 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, | ||
169 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
170 | .name = "Call Mode Switch", | ||
171 | .private_value = 0xffff, | ||
172 | .info = tegra_call_mode_info, | ||
173 | .get = tegra_call_mode_get, | ||
174 | .put = tegra_call_mode_put | ||
175 | }; | ||
176 | |||
177 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
178 | static int tegra_max98088_set_dam_cif(int dam_ifc, int srate, | ||
179 | int channels, int bit_size, int src_on, int src_srate, | ||
180 | int src_channels, int src_bit_size) | ||
181 | { | ||
182 | tegra30_dam_set_gain(dam_ifc, TEGRA30_DAM_CHIN1, 0x1000); | ||
183 | tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHOUT, | ||
184 | srate); | ||
185 | tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHIN1, | ||
186 | srate); | ||
187 | tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN1, | ||
188 | channels, bit_size, channels, | ||
189 | bit_size); | ||
190 | tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHOUT, | ||
191 | channels, bit_size, channels, | ||
192 | bit_size); | ||
193 | |||
194 | if (src_on) { | ||
195 | tegra30_dam_set_gain(dam_ifc, TEGRA30_DAM_CHIN0_SRC, 0x1000); | ||
196 | tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHIN0_SRC, | ||
197 | src_srate); | ||
198 | tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN0_SRC, | ||
199 | src_channels, src_bit_size, 1, 16); | ||
200 | } | ||
201 | |||
202 | return 0; | ||
203 | } | ||
204 | #endif | ||
205 | |||
206 | static int tegra_max98088_hw_params(struct snd_pcm_substream *substream, | ||
207 | struct snd_pcm_hw_params *params) | ||
208 | { | ||
209 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
210 | struct snd_soc_dai *codec_dai = rtd->codec_dai; | ||
211 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; | ||
212 | struct snd_soc_codec *codec = rtd->codec; | ||
213 | struct snd_soc_card *card = codec->card; | ||
214 | struct tegra_max98088 *machine = snd_soc_card_get_drvdata(card); | ||
215 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
216 | struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(cpu_dai); | ||
217 | #endif | ||
218 | int srate, mclk, sample_size, i2s_daifmt; | ||
219 | int err; | ||
220 | struct clk *clk; | ||
221 | int rate; | ||
222 | |||
223 | switch (params_format(params)) { | ||
224 | case SNDRV_PCM_FORMAT_S16_LE: | ||
225 | sample_size = 16; | ||
226 | break; | ||
227 | default: | ||
228 | return -EINVAL; | ||
229 | } | ||
230 | |||
231 | srate = params_rate(params); | ||
232 | switch (srate) { | ||
233 | case 8000: | ||
234 | case 16000: | ||
235 | case 24000: | ||
236 | case 32000: | ||
237 | case 48000: | ||
238 | case 64000: | ||
239 | case 96000: | ||
240 | mclk = 12288000; | ||
241 | break; | ||
242 | case 11025: | ||
243 | case 22050: | ||
244 | case 44100: | ||
245 | case 88200: | ||
246 | mclk = 11289600; | ||
247 | break; | ||
248 | default: | ||
249 | mclk = 12000000; | ||
250 | break; | ||
251 | } | ||
252 | |||
253 | |||
254 | #if defined(CONFIG_ARCH_TEGRA_2x_SOC) | ||
255 | clk = clk_get_sys(NULL, "cdev1"); | ||
256 | #else | ||
257 | clk = clk_get_sys("extern1", NULL); | ||
258 | #endif | ||
259 | if (IS_ERR(clk)) { | ||
260 | dev_err(card->dev, "Can't retrieve clk cdev1\n"); | ||
261 | err = PTR_ERR(clk); | ||
262 | return err; | ||
263 | } | ||
264 | |||
265 | rate = clk_get_rate(clk); | ||
266 | printk("extern1 rate=%d\n",rate); | ||
267 | |||
268 | #if TEGRA30_I2S_MASTER_PLAYBACK | ||
269 | i2s_daifmt = SND_SOC_DAIFMT_I2S | | ||
270 | SND_SOC_DAIFMT_NB_NF | | ||
271 | SND_SOC_DAIFMT_CBS_CFS; | ||
272 | #else | ||
273 | i2s_daifmt = SND_SOC_DAIFMT_I2S | | ||
274 | SND_SOC_DAIFMT_NB_NF | | ||
275 | SND_SOC_DAIFMT_CBM_CFM; | ||
276 | mclk = rate; | ||
277 | #endif | ||
278 | |||
279 | err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk); | ||
280 | if (err < 0) { | ||
281 | if (!(machine->util_data.set_mclk % mclk)) | ||
282 | mclk = machine->util_data.set_mclk; | ||
283 | else { | ||
284 | dev_err(card->dev, "Can't configure clocks\n"); | ||
285 | return err; | ||
286 | } | ||
287 | } | ||
288 | |||
289 | tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1); | ||
290 | |||
291 | err = snd_soc_dai_set_fmt(codec_dai,i2s_daifmt); | ||
292 | if (err < 0) { | ||
293 | dev_err(card->dev, "codec_dai fmt not set\n"); | ||
294 | return err; | ||
295 | } | ||
296 | |||
297 | err = snd_soc_dai_set_fmt(cpu_dai, i2s_daifmt); | ||
298 | if (err < 0) { | ||
299 | dev_err(card->dev, "cpu_dai fmt not set\n"); | ||
300 | return err; | ||
301 | } | ||
302 | |||
303 | err = snd_soc_dai_set_sysclk(codec_dai, 0, mclk, | ||
304 | SND_SOC_CLOCK_IN); | ||
305 | if (err < 0) { | ||
306 | dev_err(card->dev, "codec_dai clock not set\n"); | ||
307 | return err; | ||
308 | } | ||
309 | |||
310 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
311 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | ||
312 | tegra_max98088_set_dam_cif(i2s->dam_ifc, srate, | ||
313 | params_channels(params), sample_size, 0, 0, 0, 0); | ||
314 | #endif | ||
315 | |||
316 | return 0; | ||
317 | } | ||
318 | |||
319 | static int tegra_spdif_hw_params(struct snd_pcm_substream *substream, | ||
320 | struct snd_pcm_hw_params *params) | ||
321 | { | ||
322 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
323 | struct snd_soc_card *card = rtd->card; | ||
324 | struct tegra_max98088 *machine = snd_soc_card_get_drvdata(card); | ||
325 | int srate, mclk, min_mclk; | ||
326 | int err; | ||
327 | |||
328 | srate = params_rate(params); | ||
329 | switch (srate) { | ||
330 | case 11025: | ||
331 | case 22050: | ||
332 | case 44100: | ||
333 | case 88200: | ||
334 | mclk = 11289600; | ||
335 | break; | ||
336 | case 8000: | ||
337 | case 16000: | ||
338 | case 32000: | ||
339 | case 48000: | ||
340 | case 64000: | ||
341 | case 96000: | ||
342 | mclk = 12288000; | ||
343 | break; | ||
344 | default: | ||
345 | return -EINVAL; | ||
346 | } | ||
347 | min_mclk = 128 * srate; | ||
348 | |||
349 | err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk); | ||
350 | if (err < 0) { | ||
351 | if (!(machine->util_data.set_mclk % min_mclk)) | ||
352 | mclk = machine->util_data.set_mclk; | ||
353 | else { | ||
354 | dev_err(card->dev, "Can't configure clocks\n"); | ||
355 | return err; | ||
356 | } | ||
357 | } | ||
358 | |||
359 | tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1); | ||
360 | |||
361 | return 0; | ||
362 | } | ||
363 | |||
364 | static int tegra_bt_hw_params(struct snd_pcm_substream *substream, | ||
365 | struct snd_pcm_hw_params *params) | ||
366 | { | ||
367 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
368 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
369 | struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(rtd->cpu_dai); | ||
370 | #endif | ||
371 | struct snd_soc_card *card = rtd->card; | ||
372 | struct tegra_max98088 *machine = snd_soc_card_get_drvdata(card); | ||
373 | int err, srate, mclk, min_mclk, sample_size; | ||
374 | |||
375 | switch (params_format(params)) { | ||
376 | case SNDRV_PCM_FORMAT_S16_LE: | ||
377 | sample_size = 16; | ||
378 | break; | ||
379 | default: | ||
380 | return -EINVAL; | ||
381 | } | ||
382 | |||
383 | srate = params_rate(params); | ||
384 | switch (srate) { | ||
385 | case 11025: | ||
386 | case 22050: | ||
387 | case 44100: | ||
388 | case 88200: | ||
389 | mclk = 11289600; | ||
390 | break; | ||
391 | case 8000: | ||
392 | case 16000: | ||
393 | case 32000: | ||
394 | case 48000: | ||
395 | case 64000: | ||
396 | case 96000: | ||
397 | mclk = 12288000; | ||
398 | break; | ||
399 | default: | ||
400 | return -EINVAL; | ||
401 | } | ||
402 | min_mclk = 64 * srate; | ||
403 | |||
404 | err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk); | ||
405 | if (err < 0) { | ||
406 | if (!(machine->util_data.set_mclk % min_mclk)) | ||
407 | mclk = machine->util_data.set_mclk; | ||
408 | else { | ||
409 | dev_err(card->dev, "Can't configure clocks\n"); | ||
410 | return err; | ||
411 | } | ||
412 | } | ||
413 | |||
414 | tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1); | ||
415 | |||
416 | err = snd_soc_dai_set_fmt(rtd->cpu_dai, | ||
417 | SND_SOC_DAIFMT_DSP_A | | ||
418 | SND_SOC_DAIFMT_NB_NF | | ||
419 | SND_SOC_DAIFMT_CBS_CFS); | ||
420 | if (err < 0) { | ||
421 | dev_err(rtd->codec->card->dev, "cpu_dai fmt not set\n"); | ||
422 | return err; | ||
423 | } | ||
424 | |||
425 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
426 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | ||
427 | tegra_max98088_set_dam_cif(i2s->dam_ifc, params_rate(params), | ||
428 | params_channels(params), sample_size, 0, 0, 0, 0); | ||
429 | #endif | ||
430 | |||
431 | return 0; | ||
432 | } | ||
433 | |||
434 | static int tegra_hw_free(struct snd_pcm_substream *substream) | ||
435 | { | ||
436 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
437 | struct tegra_max98088 *machine = snd_soc_card_get_drvdata(rtd->card); | ||
438 | |||
439 | tegra_asoc_utils_lock_clk_rate(&machine->util_data, 0); | ||
440 | |||
441 | return 0; | ||
442 | } | ||
443 | |||
444 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
445 | static int tegra_max98088_startup(struct snd_pcm_substream *substream) | ||
446 | { | ||
447 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
448 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; | ||
449 | struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(cpu_dai); | ||
450 | struct tegra_max98088 *machine = snd_soc_card_get_drvdata(rtd->card); | ||
451 | struct codec_config *codec_info; | ||
452 | struct codec_config *bb_info; | ||
453 | int codec_index; | ||
454 | |||
455 | if (!i2s->is_dam_used) | ||
456 | return 0; | ||
457 | |||
458 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | ||
459 | /*dam configuration*/ | ||
460 | if (!i2s->dam_ch_refcount) | ||
461 | i2s->dam_ifc = tegra30_dam_allocate_controller(); | ||
462 | |||
463 | tegra30_dam_allocate_channel(i2s->dam_ifc, TEGRA30_DAM_CHIN1); | ||
464 | i2s->dam_ch_refcount++; | ||
465 | tegra30_dam_enable_clock(i2s->dam_ifc); | ||
466 | |||
467 | tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 + | ||
468 | (i2s->dam_ifc*2), i2s->txcif); | ||
469 | |||
470 | /* | ||
471 | *make the dam tx to i2s rx connection if this is the only client | ||
472 | *using i2s for playback | ||
473 | */ | ||
474 | if (i2s->playback_ref_count == 1) | ||
475 | tegra30_ahub_set_rx_cif_source( | ||
476 | TEGRA30_AHUB_RXCIF_I2S0_RX0 + i2s->id, | ||
477 | TEGRA30_AHUB_TXCIF_DAM0_TX0 + i2s->dam_ifc); | ||
478 | |||
479 | /* enable the dam*/ | ||
480 | tegra30_dam_enable(i2s->dam_ifc, TEGRA30_DAM_ENABLE, | ||
481 | TEGRA30_DAM_CHIN1); | ||
482 | } else { | ||
483 | |||
484 | i2s->is_call_mode_rec = machine->is_call_mode; | ||
485 | |||
486 | if (!i2s->is_call_mode_rec) | ||
487 | return 0; | ||
488 | |||
489 | if (machine->is_device_bt) | ||
490 | codec_index = BT_SCO; | ||
491 | else | ||
492 | codec_index = HIFI_CODEC; | ||
493 | |||
494 | codec_info = &machine->codec_info[codec_index]; | ||
495 | bb_info = &machine->codec_info[BASEBAND]; | ||
496 | |||
497 | /* allocate a dam for voice call recording */ | ||
498 | |||
499 | i2s->call_record_dam_ifc = tegra30_dam_allocate_controller(); | ||
500 | tegra30_dam_allocate_channel(i2s->call_record_dam_ifc, | ||
501 | TEGRA30_DAM_CHIN0_SRC); | ||
502 | tegra30_dam_allocate_channel(i2s->call_record_dam_ifc, | ||
503 | TEGRA30_DAM_CHIN1); | ||
504 | tegra30_dam_enable_clock(i2s->call_record_dam_ifc); | ||
505 | |||
506 | /* configure the dam */ | ||
507 | tegra_max98088_set_dam_cif(i2s->call_record_dam_ifc, | ||
508 | codec_info->rate, codec_info->channels, | ||
509 | codec_info->bitsize, 1, bb_info->rate, | ||
510 | bb_info->channels, bb_info->bitsize); | ||
511 | |||
512 | /* setup the connections for voice call record */ | ||
513 | |||
514 | tegra30_ahub_unset_rx_cif_source(i2s->rxcif); | ||
515 | tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX0 + | ||
516 | (i2s->call_record_dam_ifc*2), | ||
517 | TEGRA30_AHUB_TXCIF_I2S0_TX0 + bb_info->i2s_id); | ||
518 | tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 + | ||
519 | (i2s->call_record_dam_ifc*2), | ||
520 | TEGRA30_AHUB_TXCIF_I2S0_TX0 + codec_info->i2s_id); | ||
521 | tegra30_ahub_set_rx_cif_source(i2s->rxcif, | ||
522 | TEGRA30_AHUB_TXCIF_DAM0_TX0 + i2s->call_record_dam_ifc); | ||
523 | |||
524 | /* enable the dam*/ | ||
525 | |||
526 | tegra30_dam_enable(i2s->call_record_dam_ifc, TEGRA30_DAM_ENABLE, | ||
527 | TEGRA30_DAM_CHIN1); | ||
528 | tegra30_dam_enable(i2s->call_record_dam_ifc, TEGRA30_DAM_ENABLE, | ||
529 | TEGRA30_DAM_CHIN0_SRC); | ||
530 | } | ||
531 | |||
532 | return 0; | ||
533 | } | ||
534 | |||
535 | static void tegra_max98088_shutdown(struct snd_pcm_substream *substream) | ||
536 | { | ||
537 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
538 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; | ||
539 | struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(cpu_dai); | ||
540 | |||
541 | if (!i2s->is_dam_used) | ||
542 | return; | ||
543 | |||
544 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | ||
545 | /* disable the dam*/ | ||
546 | tegra30_dam_enable(i2s->dam_ifc, TEGRA30_DAM_DISABLE, | ||
547 | TEGRA30_DAM_CHIN1); | ||
548 | |||
549 | /* disconnect the ahub connections*/ | ||
550 | tegra30_ahub_unset_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 + | ||
551 | (i2s->dam_ifc*2)); | ||
552 | |||
553 | /* disable the dam and free the controller */ | ||
554 | tegra30_dam_disable_clock(i2s->dam_ifc); | ||
555 | tegra30_dam_free_channel(i2s->dam_ifc, TEGRA30_DAM_CHIN1); | ||
556 | i2s->dam_ch_refcount--; | ||
557 | if (!i2s->dam_ch_refcount) | ||
558 | tegra30_dam_free_controller(i2s->dam_ifc); | ||
559 | } else { | ||
560 | |||
561 | if (!i2s->is_call_mode_rec) | ||
562 | return 0; | ||
563 | |||
564 | i2s->is_call_mode_rec = 0; | ||
565 | |||
566 | /* disable the dam*/ | ||
567 | tegra30_dam_enable(i2s->call_record_dam_ifc, | ||
568 | TEGRA30_DAM_DISABLE, TEGRA30_DAM_CHIN1); | ||
569 | tegra30_dam_enable(i2s->call_record_dam_ifc, | ||
570 | TEGRA30_DAM_DISABLE, TEGRA30_DAM_CHIN0_SRC); | ||
571 | |||
572 | /* disconnect the ahub connections*/ | ||
573 | tegra30_ahub_unset_rx_cif_source(i2s->rxcif); | ||
574 | tegra30_ahub_unset_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX0 + | ||
575 | (i2s->call_record_dam_ifc*2)); | ||
576 | tegra30_ahub_unset_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 + | ||
577 | (i2s->call_record_dam_ifc*2)); | ||
578 | |||
579 | /* free the dam channels and dam controller */ | ||
580 | tegra30_dam_disable_clock(i2s->call_record_dam_ifc); | ||
581 | tegra30_dam_free_channel(i2s->call_record_dam_ifc, | ||
582 | TEGRA30_DAM_CHIN1); | ||
583 | tegra30_dam_free_channel(i2s->call_record_dam_ifc, | ||
584 | TEGRA30_DAM_CHIN0_SRC); | ||
585 | tegra30_dam_free_controller(i2s->call_record_dam_ifc); | ||
586 | } | ||
587 | |||
588 | return; | ||
589 | } | ||
590 | #endif | ||
591 | |||
592 | static int tegra_voice_call_hw_params(struct snd_pcm_substream *substream, | ||
593 | struct snd_pcm_hw_params *params) | ||
594 | { | ||
595 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
596 | struct snd_soc_dai *codec_dai = rtd->codec_dai; | ||
597 | struct snd_soc_codec *codec = rtd->codec; | ||
598 | struct snd_soc_card *card = codec->card; | ||
599 | struct tegra_max98088 *machine = snd_soc_card_get_drvdata(card); | ||
600 | int srate, mclk; | ||
601 | int err; | ||
602 | |||
603 | srate = params_rate(params); | ||
604 | switch (srate) { | ||
605 | case 8000: | ||
606 | case 16000: | ||
607 | case 24000: | ||
608 | case 32000: | ||
609 | case 48000: | ||
610 | case 64000: | ||
611 | case 96000: | ||
612 | mclk = 12288000; | ||
613 | break; | ||
614 | case 11025: | ||
615 | case 22050: | ||
616 | case 44100: | ||
617 | case 88200: | ||
618 | mclk = 11289600; | ||
619 | break; | ||
620 | default: | ||
621 | return -EINVAL; | ||
622 | break; | ||
623 | } | ||
624 | |||
625 | err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk); | ||
626 | if (err < 0) { | ||
627 | if (!(machine->util_data.set_mclk % mclk)) | ||
628 | mclk = machine->util_data.set_mclk; | ||
629 | else { | ||
630 | dev_err(card->dev, "Can't configure clocks\n"); | ||
631 | return err; | ||
632 | } | ||
633 | } | ||
634 | |||
635 | tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1); | ||
636 | |||
637 | err = snd_soc_dai_set_fmt(codec_dai, | ||
638 | SND_SOC_DAIFMT_I2S | | ||
639 | SND_SOC_DAIFMT_NB_NF | | ||
640 | SND_SOC_DAIFMT_CBS_CFS); | ||
641 | if (err < 0) { | ||
642 | dev_err(card->dev, "codec_dai fmt not set\n"); | ||
643 | return err; | ||
644 | } | ||
645 | |||
646 | err = snd_soc_dai_set_sysclk(codec_dai, 0, mclk, | ||
647 | SND_SOC_CLOCK_IN); | ||
648 | if (err < 0) { | ||
649 | dev_err(card->dev, "codec_dai clock not set\n"); | ||
650 | return err; | ||
651 | } | ||
652 | |||
653 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
654 | /* codec configuration */ | ||
655 | machine->codec_info[HIFI_CODEC].rate = params_rate(params); | ||
656 | machine->codec_info[HIFI_CODEC].channels = params_channels(params); | ||
657 | machine->codec_info[HIFI_CODEC].bitsize = 16; | ||
658 | machine->codec_info[HIFI_CODEC].is_i2smaster = 1; | ||
659 | machine->codec_info[HIFI_CODEC].is_format_dsp = 0; | ||
660 | |||
661 | /* baseband configuration */ | ||
662 | machine->codec_info[BASEBAND].bitsize = 16; | ||
663 | machine->codec_info[BASEBAND].is_i2smaster = 1; | ||
664 | machine->codec_info[BASEBAND].is_format_dsp = 1; | ||
665 | #endif | ||
666 | |||
667 | machine->is_device_bt = 0; | ||
668 | |||
669 | return 0; | ||
670 | } | ||
671 | |||
672 | static void tegra_voice_call_shutdown(struct snd_pcm_substream *substream) | ||
673 | { | ||
674 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
675 | struct tegra_max98088 *machine = | ||
676 | snd_soc_card_get_drvdata(rtd->codec->card); | ||
677 | |||
678 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
679 | machine->codec_info[HIFI_CODEC].rate = 0; | ||
680 | machine->codec_info[HIFI_CODEC].channels = 0; | ||
681 | #endif | ||
682 | |||
683 | return; | ||
684 | } | ||
685 | |||
686 | static int tegra_bt_voice_call_hw_params(struct snd_pcm_substream *substream, | ||
687 | struct snd_pcm_hw_params *params) | ||
688 | { | ||
689 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
690 | struct snd_soc_card *card = rtd->card; | ||
691 | struct tegra_max98088 *machine = snd_soc_card_get_drvdata(card); | ||
692 | int err, srate, mclk, min_mclk; | ||
693 | |||
694 | srate = params_rate(params); | ||
695 | switch (srate) { | ||
696 | case 11025: | ||
697 | case 22050: | ||
698 | case 44100: | ||
699 | case 88200: | ||
700 | mclk = 11289600; | ||
701 | break; | ||
702 | case 8000: | ||
703 | case 16000: | ||
704 | case 32000: | ||
705 | case 48000: | ||
706 | case 64000: | ||
707 | case 96000: | ||
708 | mclk = 12288000; | ||
709 | break; | ||
710 | default: | ||
711 | return -EINVAL; | ||
712 | } | ||
713 | min_mclk = 64 * srate; | ||
714 | |||
715 | err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk); | ||
716 | if (err < 0) { | ||
717 | if (!(machine->util_data.set_mclk % min_mclk)) | ||
718 | mclk = machine->util_data.set_mclk; | ||
719 | else { | ||
720 | dev_err(card->dev, "Can't configure clocks\n"); | ||
721 | return err; | ||
722 | } | ||
723 | } | ||
724 | |||
725 | tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1); | ||
726 | |||
727 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
728 | /* codec configuration */ | ||
729 | machine->codec_info[BT_SCO].rate = params_rate(params); | ||
730 | machine->codec_info[BT_SCO].channels = params_channels(params); | ||
731 | machine->codec_info[BT_SCO].bitsize = 16; | ||
732 | machine->codec_info[BT_SCO].is_i2smaster = 1; | ||
733 | machine->codec_info[BT_SCO].is_format_dsp = 1; | ||
734 | |||
735 | /* baseband configuration */ | ||
736 | machine->codec_info[BASEBAND].bitsize = 16; | ||
737 | machine->codec_info[BASEBAND].is_i2smaster = 1; | ||
738 | machine->codec_info[BASEBAND].is_format_dsp = 1; | ||
739 | #endif | ||
740 | |||
741 | machine->is_device_bt = 1; | ||
742 | |||
743 | return 0; | ||
744 | } | ||
745 | |||
746 | static void tegra_bt_voice_call_shutdown(struct snd_pcm_substream *substream) | ||
747 | { | ||
748 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
749 | struct tegra_max98088 *machine = | ||
750 | snd_soc_card_get_drvdata(rtd->codec->card); | ||
751 | |||
752 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
753 | machine->codec_info[BT_SCO].rate = 0; | ||
754 | machine->codec_info[BT_SCO].channels = 0; | ||
755 | #endif | ||
756 | |||
757 | return; | ||
758 | } | ||
759 | |||
760 | static struct snd_soc_ops tegra_max98088_ops = { | ||
761 | .hw_params = tegra_max98088_hw_params, | ||
762 | .hw_free = tegra_hw_free, | ||
763 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
764 | .startup = tegra_max98088_startup, | ||
765 | .shutdown = tegra_max98088_shutdown, | ||
766 | #endif | ||
767 | }; | ||
768 | |||
769 | static struct snd_soc_ops tegra_spdif_ops = { | ||
770 | .hw_params = tegra_spdif_hw_params, | ||
771 | .hw_free = tegra_hw_free, | ||
772 | }; | ||
773 | |||
774 | static struct snd_soc_ops tegra_voice_call_ops = { | ||
775 | .hw_params = tegra_voice_call_hw_params, | ||
776 | .shutdown = tegra_voice_call_shutdown, | ||
777 | .hw_free = tegra_hw_free, | ||
778 | }; | ||
779 | |||
780 | static struct snd_soc_ops tegra_bt_voice_call_ops = { | ||
781 | .hw_params = tegra_bt_voice_call_hw_params, | ||
782 | .shutdown = tegra_bt_voice_call_shutdown, | ||
783 | .hw_free = tegra_hw_free, | ||
784 | }; | ||
785 | |||
786 | static struct snd_soc_ops tegra_bt_ops = { | ||
787 | .hw_params = tegra_bt_hw_params, | ||
788 | .hw_free = tegra_hw_free, | ||
789 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
790 | .startup = tegra_max98088_startup, | ||
791 | .shutdown = tegra_max98088_shutdown, | ||
792 | #endif | ||
793 | }; | ||
794 | |||
795 | static struct snd_soc_jack tegra_max98088_hp_jack; | ||
796 | |||
797 | #ifdef CONFIG_SWITCH | ||
798 | static struct switch_dev wired_switch_dev = { | ||
799 | .name = "h2w", | ||
800 | }; | ||
801 | |||
802 | /* These values are copied from WiredAccessoryObserver */ | ||
803 | enum headset_state { | ||
804 | BIT_NO_HEADSET = 0, | ||
805 | BIT_HEADSET = (1 << 0), | ||
806 | BIT_HEADSET_NO_MIC = (1 << 1), | ||
807 | }; | ||
808 | |||
809 | static int headset_switch_notify(struct notifier_block *self, | ||
810 | unsigned long action, void *dev) | ||
811 | { | ||
812 | int state = 0; | ||
813 | |||
814 | switch (action) { | ||
815 | case SND_JACK_HEADPHONE: | ||
816 | state |= BIT_HEADSET_NO_MIC; | ||
817 | break; | ||
818 | case SND_JACK_HEADSET: | ||
819 | state |= BIT_HEADSET; | ||
820 | break; | ||
821 | default: | ||
822 | state |= BIT_NO_HEADSET; | ||
823 | } | ||
824 | |||
825 | switch_set_state(&wired_switch_dev, state); | ||
826 | |||
827 | return NOTIFY_OK; | ||
828 | } | ||
829 | |||
830 | static struct notifier_block headset_switch_nb = { | ||
831 | .notifier_call = headset_switch_notify, | ||
832 | }; | ||
833 | #else | ||
834 | static struct snd_soc_jack_pin tegra_max98088_hp_jack_pins[] = { | ||
835 | { | ||
836 | .pin = "Headphone Jack", | ||
837 | .mask = SND_JACK_HEADPHONE, | ||
838 | }, | ||
839 | }; | ||
840 | #endif | ||
841 | |||
842 | static int tegra_max98088_event_int_spk(struct snd_soc_dapm_widget *w, | ||
843 | struct snd_kcontrol *k, int event) | ||
844 | { | ||
845 | struct snd_soc_dapm_context *dapm = w->dapm; | ||
846 | struct snd_soc_card *card = dapm->card; | ||
847 | struct tegra_max98088 *machine = snd_soc_card_get_drvdata(card); | ||
848 | struct tegra_asoc_platform_data *pdata = machine->pdata; | ||
849 | |||
850 | if (!(machine->gpio_requested & GPIO_SPKR_EN)) | ||
851 | return 0; | ||
852 | |||
853 | gpio_set_value_cansleep(pdata->gpio_spkr_en, | ||
854 | SND_SOC_DAPM_EVENT_ON(event)); | ||
855 | |||
856 | return 0; | ||
857 | } | ||
858 | |||
859 | static int tegra_max98088_event_hp(struct snd_soc_dapm_widget *w, | ||
860 | struct snd_kcontrol *k, int event) | ||
861 | { | ||
862 | struct snd_soc_dapm_context *dapm = w->dapm; | ||
863 | struct snd_soc_card *card = dapm->card; | ||
864 | struct tegra_max98088 *machine = snd_soc_card_get_drvdata(card); | ||
865 | struct tegra_asoc_platform_data *pdata = machine->pdata; | ||
866 | |||
867 | if (!(machine->gpio_requested & GPIO_HP_MUTE)) | ||
868 | return 0; | ||
869 | |||
870 | gpio_set_value_cansleep(pdata->gpio_hp_mute, | ||
871 | !SND_SOC_DAPM_EVENT_ON(event)); | ||
872 | |||
873 | return 0; | ||
874 | } | ||
875 | |||
876 | static const struct snd_soc_dapm_widget tegra_max98088_dapm_widgets[] = { | ||
877 | SND_SOC_DAPM_SPK("Int Spk", tegra_max98088_event_int_spk), | ||
878 | SND_SOC_DAPM_OUTPUT("Earpiece"), | ||
879 | SND_SOC_DAPM_HP("Headphone Jack", tegra_max98088_event_hp), | ||
880 | SND_SOC_DAPM_MIC("Mic Jack", NULL), | ||
881 | SND_SOC_DAPM_INPUT("Int Mic"), | ||
882 | }; | ||
883 | |||
884 | static const struct snd_soc_dapm_route enterprise_audio_map[] = { | ||
885 | {"Int Spk", NULL, "SPKL"}, | ||
886 | {"Int Spk", NULL, "SPKR"}, | ||
887 | {"Earpiece", NULL, "RECL"}, | ||
888 | {"Earpiece", NULL, "RECR"}, | ||
889 | {"Headphone Jack", NULL, "HPL"}, | ||
890 | {"Headphone Jack", NULL, "HPR"}, | ||
891 | {"MICBIAS", NULL, "Mic Jack"}, | ||
892 | {"MIC2", NULL, "MICBIAS"}, | ||
893 | {"MICBIAS", NULL, "Int Mic"}, | ||
894 | {"MIC1", NULL, "MICBIAS"}, | ||
895 | }; | ||
896 | |||
897 | static const struct snd_kcontrol_new tegra_max98088_controls[] = { | ||
898 | SOC_DAPM_PIN_SWITCH("Int Spk"), | ||
899 | SOC_DAPM_PIN_SWITCH("Earpiece"), | ||
900 | SOC_DAPM_PIN_SWITCH("Headphone Jack"), | ||
901 | SOC_DAPM_PIN_SWITCH("Mic Jack"), | ||
902 | SOC_DAPM_PIN_SWITCH("Int Mic"), | ||
903 | }; | ||
904 | |||
905 | static int tegra_max98088_init(struct snd_soc_pcm_runtime *rtd) | ||
906 | { | ||
907 | struct snd_soc_codec *codec = rtd->codec; | ||
908 | struct snd_soc_dapm_context *dapm = &codec->dapm; | ||
909 | struct snd_soc_card *card = codec->card; | ||
910 | struct tegra_max98088 *machine = snd_soc_card_get_drvdata(card); | ||
911 | struct tegra_asoc_platform_data *pdata = machine->pdata; | ||
912 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
913 | struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(rtd->cpu_dai); | ||
914 | #endif | ||
915 | int ret; | ||
916 | |||
917 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
918 | if (machine->codec_info[BASEBAND].i2s_id != -1) | ||
919 | i2s->is_dam_used = true; | ||
920 | #endif | ||
921 | |||
922 | if (machine->init_done) | ||
923 | return 0; | ||
924 | |||
925 | machine->init_done = true; | ||
926 | |||
927 | machine->pcard = card; | ||
928 | machine->bias_level = SND_SOC_BIAS_STANDBY; | ||
929 | |||
930 | if (gpio_is_valid(pdata->gpio_spkr_en)) { | ||
931 | ret = gpio_request(pdata->gpio_spkr_en, "spkr_en"); | ||
932 | if (ret) { | ||
933 | dev_err(card->dev, "cannot get spkr_en gpio\n"); | ||
934 | return ret; | ||
935 | } | ||
936 | machine->gpio_requested |= GPIO_SPKR_EN; | ||
937 | |||
938 | gpio_direction_output(pdata->gpio_spkr_en, 0); | ||
939 | } | ||
940 | |||
941 | if (gpio_is_valid(pdata->gpio_hp_mute)) { | ||
942 | ret = gpio_request(pdata->gpio_hp_mute, "hp_mute"); | ||
943 | if (ret) { | ||
944 | dev_err(card->dev, "cannot get hp_mute gpio\n"); | ||
945 | return ret; | ||
946 | } | ||
947 | machine->gpio_requested |= GPIO_HP_MUTE; | ||
948 | |||
949 | gpio_direction_output(pdata->gpio_hp_mute, 0); | ||
950 | } | ||
951 | |||
952 | if (gpio_is_valid(pdata->gpio_int_mic_en)) { | ||
953 | ret = gpio_request(pdata->gpio_int_mic_en, "int_mic_en"); | ||
954 | if (ret) { | ||
955 | dev_err(card->dev, "cannot get int_mic_en gpio\n"); | ||
956 | return ret; | ||
957 | } | ||
958 | machine->gpio_requested |= GPIO_INT_MIC_EN; | ||
959 | |||
960 | /* Disable int mic; enable signal is active-high */ | ||
961 | gpio_direction_output(pdata->gpio_int_mic_en, 0); | ||
962 | } | ||
963 | |||
964 | if (gpio_is_valid(pdata->gpio_ext_mic_en)) { | ||
965 | ret = gpio_request(pdata->gpio_ext_mic_en, "ext_mic_en"); | ||
966 | if (ret) { | ||
967 | dev_err(card->dev, "cannot get ext_mic_en gpio\n"); | ||
968 | return ret; | ||
969 | } | ||
970 | machine->gpio_requested |= GPIO_EXT_MIC_EN; | ||
971 | |||
972 | /* Enable ext mic; enable signal is active-low */ | ||
973 | gpio_direction_output(pdata->gpio_ext_mic_en, 0); | ||
974 | } | ||
975 | |||
976 | ret = snd_soc_add_controls(codec, tegra_max98088_controls, | ||
977 | ARRAY_SIZE(tegra_max98088_controls)); | ||
978 | if (ret < 0) | ||
979 | return ret; | ||
980 | |||
981 | snd_soc_dapm_new_controls(dapm, tegra_max98088_dapm_widgets, | ||
982 | ARRAY_SIZE(tegra_max98088_dapm_widgets)); | ||
983 | |||
984 | snd_soc_dapm_add_routes(dapm, enterprise_audio_map, | ||
985 | ARRAY_SIZE(enterprise_audio_map)); | ||
986 | |||
987 | ret = snd_soc_jack_new(codec, "Headset Jack", SND_JACK_HEADSET, | ||
988 | &tegra_max98088_hp_jack); | ||
989 | if (ret < 0) | ||
990 | return ret; | ||
991 | |||
992 | #ifdef CONFIG_SWITCH | ||
993 | snd_soc_jack_notifier_register(&tegra_max98088_hp_jack, | ||
994 | &headset_switch_nb); | ||
995 | #else /*gpio based headset detection*/ | ||
996 | snd_soc_jack_add_pins(&tegra_max98088_hp_jack, | ||
997 | ARRAY_SIZE(tegra_max98088_hp_jack_pins), | ||
998 | tegra_max98088_hp_jack_pins); | ||
999 | #endif | ||
1000 | |||
1001 | max98088_headset_detect(codec, &tegra_max98088_hp_jack, | ||
1002 | SND_JACK_HEADSET); | ||
1003 | |||
1004 | /* Add call mode switch control */ | ||
1005 | ret = snd_ctl_add(codec->card->snd_card, | ||
1006 | snd_ctl_new1(&tegra_call_mode_control, machine)); | ||
1007 | if (ret < 0) | ||
1008 | return ret; | ||
1009 | |||
1010 | snd_soc_dapm_nc_pin(dapm, "INA1"); | ||
1011 | snd_soc_dapm_nc_pin(dapm, "INA2"); | ||
1012 | snd_soc_dapm_nc_pin(dapm, "INB1"); | ||
1013 | snd_soc_dapm_nc_pin(dapm, "INB2"); | ||
1014 | snd_soc_dapm_sync(dapm); | ||
1015 | |||
1016 | return 0; | ||
1017 | } | ||
1018 | |||
1019 | static struct snd_soc_dai_link tegra_max98088_dai[NUM_DAI_LINKS] = { | ||
1020 | [DAI_LINK_HIFI] = { | ||
1021 | .name = "MAX98088", | ||
1022 | .stream_name = "MAX98088 HIFI", | ||
1023 | .codec_name = "max98088.0-0010", | ||
1024 | .platform_name = "tegra-pcm-audio", | ||
1025 | .codec_dai_name = "HiFi", | ||
1026 | .init = tegra_max98088_init, | ||
1027 | .ops = &tegra_max98088_ops, | ||
1028 | }, | ||
1029 | [DAI_LINK_SPDIF] = { | ||
1030 | .name = "SPDIF", | ||
1031 | .stream_name = "SPDIF PCM", | ||
1032 | .codec_name = "spdif-dit.0", | ||
1033 | .platform_name = "tegra-pcm-audio", | ||
1034 | .cpu_dai_name = "tegra30-spdif", | ||
1035 | .codec_dai_name = "dit-hifi", | ||
1036 | .ops = &tegra_spdif_ops, | ||
1037 | }, | ||
1038 | [DAI_LINK_BTSCO] = { | ||
1039 | .name = "BT SCO", | ||
1040 | .stream_name = "BT SCO PCM", | ||
1041 | .codec_name = "spdif-dit.1", | ||
1042 | .platform_name = "tegra-pcm-audio", | ||
1043 | .codec_dai_name = "dit-hifi", | ||
1044 | .init = tegra_max98088_init, | ||
1045 | .ops = &tegra_bt_ops, | ||
1046 | }, | ||
1047 | [DAI_LINK_VOICE_CALL] = { | ||
1048 | .name = "VOICE CALL", | ||
1049 | .stream_name = "VOICE CALL PCM", | ||
1050 | .codec_name = "max98088.0-0010", | ||
1051 | .platform_name = "tegra-pcm-audio", | ||
1052 | .cpu_dai_name = "dit-hifi", | ||
1053 | .codec_dai_name = "HiFi", | ||
1054 | .ops = &tegra_voice_call_ops, | ||
1055 | }, | ||
1056 | [DAI_LINK_BT_VOICE_CALL] = { | ||
1057 | .name = "BT VOICE CALL", | ||
1058 | .stream_name = "BT VOICE CALL PCM", | ||
1059 | .codec_name = "spdif-dit.2", | ||
1060 | .platform_name = "tegra-pcm-audio", | ||
1061 | .cpu_dai_name = "dit-hifi", | ||
1062 | .codec_dai_name = "dit-hifi", | ||
1063 | .ops = &tegra_bt_voice_call_ops, | ||
1064 | }, | ||
1065 | }; | ||
1066 | |||
1067 | static int tegra30_soc_set_bias_level(struct snd_soc_card *card, | ||
1068 | enum snd_soc_bias_level level) | ||
1069 | { | ||
1070 | struct tegra_max98088 *machine = snd_soc_card_get_drvdata(card); | ||
1071 | |||
1072 | if (machine->bias_level == SND_SOC_BIAS_OFF && | ||
1073 | level != SND_SOC_BIAS_OFF) | ||
1074 | tegra_asoc_utils_clk_enable(&machine->util_data); | ||
1075 | |||
1076 | return 0; | ||
1077 | } | ||
1078 | |||
1079 | static int tegra30_soc_set_bias_level_post(struct snd_soc_card *card, | ||
1080 | enum snd_soc_bias_level level) | ||
1081 | { | ||
1082 | struct tegra_max98088 *machine = snd_soc_card_get_drvdata(card); | ||
1083 | |||
1084 | if (machine->bias_level != SND_SOC_BIAS_OFF && | ||
1085 | level == SND_SOC_BIAS_OFF) | ||
1086 | tegra_asoc_utils_clk_disable(&machine->util_data); | ||
1087 | |||
1088 | machine->bias_level = level; | ||
1089 | |||
1090 | return 0 ; | ||
1091 | } | ||
1092 | |||
1093 | static struct snd_soc_card snd_soc_tegra_max98088 = { | ||
1094 | .name = "tegra-max98088", | ||
1095 | .dai_link = tegra_max98088_dai, | ||
1096 | .num_links = ARRAY_SIZE(tegra_max98088_dai), | ||
1097 | .set_bias_level = tegra30_soc_set_bias_level, | ||
1098 | .set_bias_level_post = tegra30_soc_set_bias_level_post, | ||
1099 | }; | ||
1100 | |||
1101 | static __devinit int tegra_max98088_driver_probe(struct platform_device *pdev) | ||
1102 | { | ||
1103 | struct snd_soc_card *card = &snd_soc_tegra_max98088; | ||
1104 | struct tegra_max98088 *machine; | ||
1105 | struct tegra_asoc_platform_data *pdata; | ||
1106 | int ret, i; | ||
1107 | |||
1108 | pdata = pdev->dev.platform_data; | ||
1109 | if (!pdata) { | ||
1110 | dev_err(&pdev->dev, "No platform data supplied\n"); | ||
1111 | return -EINVAL; | ||
1112 | } | ||
1113 | |||
1114 | machine = kzalloc(sizeof(struct tegra_max98088), GFP_KERNEL); | ||
1115 | if (!machine) { | ||
1116 | dev_err(&pdev->dev, "Can't allocate tegra_max98088 struct\n"); | ||
1117 | return -ENOMEM; | ||
1118 | } | ||
1119 | |||
1120 | machine->pdata = pdata; | ||
1121 | |||
1122 | ret = tegra_asoc_utils_init(&machine->util_data, &pdev->dev); | ||
1123 | if (ret) | ||
1124 | goto err_free_machine; | ||
1125 | |||
1126 | card->dev = &pdev->dev; | ||
1127 | platform_set_drvdata(pdev, card); | ||
1128 | snd_soc_card_set_drvdata(card, machine); | ||
1129 | |||
1130 | #ifdef CONFIG_SWITCH | ||
1131 | /* Add h2w switch class support */ | ||
1132 | ret = switch_dev_register(&wired_switch_dev); | ||
1133 | if (ret < 0) { | ||
1134 | dev_err(&pdev->dev, "not able to register switch device\n"); | ||
1135 | goto err_fini_utils; | ||
1136 | } | ||
1137 | #endif | ||
1138 | |||
1139 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
1140 | for (i = 0; i < NUM_I2S_DEVICES ; i++) | ||
1141 | machine->codec_info[i].i2s_id = pdata->audio_port_id[i]; | ||
1142 | |||
1143 | machine->codec_info[BASEBAND].rate = pdata->baseband_param.rate; | ||
1144 | machine->codec_info[BASEBAND].channels = pdata->baseband_param.channels; | ||
1145 | |||
1146 | tegra_max98088_dai[DAI_LINK_HIFI].cpu_dai_name = | ||
1147 | tegra_max98088_i2s_dai_name[machine->codec_info[HIFI_CODEC].i2s_id]; | ||
1148 | |||
1149 | tegra_max98088_dai[DAI_LINK_BTSCO].cpu_dai_name = | ||
1150 | tegra_max98088_i2s_dai_name[machine->codec_info[BT_SCO].i2s_id]; | ||
1151 | #endif | ||
1152 | |||
1153 | ret = snd_soc_register_card(card); | ||
1154 | if (ret) { | ||
1155 | dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", | ||
1156 | ret); | ||
1157 | goto err_switch_unregister; | ||
1158 | } | ||
1159 | |||
1160 | if (!card->instantiated) { | ||
1161 | dev_err(&pdev->dev, "No MAX98088 codec\n"); | ||
1162 | goto err_unregister_card; | ||
1163 | } | ||
1164 | |||
1165 | return 0; | ||
1166 | |||
1167 | err_unregister_card: | ||
1168 | snd_soc_unregister_card(card); | ||
1169 | err_switch_unregister: | ||
1170 | #ifdef CONFIG_SWITCH | ||
1171 | switch_dev_unregister(&wired_switch_dev); | ||
1172 | #endif | ||
1173 | err_fini_utils: | ||
1174 | tegra_asoc_utils_fini(&machine->util_data); | ||
1175 | err_free_machine: | ||
1176 | kfree(machine); | ||
1177 | return ret; | ||
1178 | } | ||
1179 | |||
1180 | static int __devexit tegra_max98088_driver_remove(struct platform_device *pdev) | ||
1181 | { | ||
1182 | struct snd_soc_card *card = platform_get_drvdata(pdev); | ||
1183 | struct tegra_max98088 *machine = snd_soc_card_get_drvdata(card); | ||
1184 | struct tegra_asoc_platform_data *pdata = machine->pdata; | ||
1185 | |||
1186 | snd_soc_unregister_card(card); | ||
1187 | |||
1188 | #ifdef CONFIG_SWITCH | ||
1189 | switch_dev_unregister(&wired_switch_dev); | ||
1190 | #endif | ||
1191 | |||
1192 | tegra_asoc_utils_fini(&machine->util_data); | ||
1193 | |||
1194 | if (machine->gpio_requested & GPIO_EXT_MIC_EN) | ||
1195 | gpio_free(pdata->gpio_ext_mic_en); | ||
1196 | if (machine->gpio_requested & GPIO_INT_MIC_EN) | ||
1197 | gpio_free(pdata->gpio_int_mic_en); | ||
1198 | if (machine->gpio_requested & GPIO_HP_MUTE) | ||
1199 | gpio_free(pdata->gpio_hp_mute); | ||
1200 | if (machine->gpio_requested & GPIO_SPKR_EN) | ||
1201 | gpio_free(pdata->gpio_spkr_en); | ||
1202 | |||
1203 | kfree(machine); | ||
1204 | |||
1205 | return 0; | ||
1206 | } | ||
1207 | |||
1208 | static struct platform_driver tegra_max98088_driver = { | ||
1209 | .driver = { | ||
1210 | .name = DRV_NAME, | ||
1211 | .owner = THIS_MODULE, | ||
1212 | .pm = &snd_soc_pm_ops, | ||
1213 | }, | ||
1214 | .probe = tegra_max98088_driver_probe, | ||
1215 | .remove = __devexit_p(tegra_max98088_driver_remove), | ||
1216 | }; | ||
1217 | |||
1218 | static int __init tegra_max98088_modinit(void) | ||
1219 | { | ||
1220 | return platform_driver_register(&tegra_max98088_driver); | ||
1221 | } | ||
1222 | module_init(tegra_max98088_modinit); | ||
1223 | |||
1224 | static void __exit tegra_max98088_modexit(void) | ||
1225 | { | ||
1226 | platform_driver_unregister(&tegra_max98088_driver); | ||
1227 | } | ||
1228 | module_exit(tegra_max98088_modexit); | ||
1229 | |||
1230 | MODULE_AUTHOR("Sumit Bhattacharya <sumitb@nvidia.com>"); | ||
1231 | MODULE_DESCRIPTION("Tegra+MAX98088 machine ASoC driver"); | ||
1232 | MODULE_LICENSE("GPL"); | ||
1233 | MODULE_ALIAS("platform:" DRV_NAME); | ||