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authorShawn Guo <shawn.guo@linaro.org>2012-03-16 04:56:38 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-04-01 06:28:26 -0400
commita23dc694828e3de96bf18e20459ba885ba91cb29 (patch)
tree26863bf2c6bdac975a369a20fcf6f47176c5cd55 /sound/soc/imx
parentd61e11260016f3589d60f94286c89ef823a26605 (diff)
ASoC: imx: merge sound/soc/imx into sound/soc/fsl
Freescale PowerPC and ARM/IMX families share the same SSI IP block. The patch merges sound/soc/imx into sound/soc/fsl, so that the possible code sharing and consolidation can happen. This is a plain merge, except that menuconfig SND_POWERPC_SOC is added in Kconfig for PowerPC platform as a correspondence to SND_IMX_SOC for IMX platform. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/imx')
-rw-r--r--sound/soc/imx/Kconfig79
-rw-r--r--sound/soc/imx/Makefile22
-rw-r--r--sound/soc/imx/eukrea-tlv320.c164
-rw-r--r--sound/soc/imx/imx-audmux.c314
-rw-r--r--sound/soc/imx/imx-audmux.h60
-rw-r--r--sound/soc/imx/imx-pcm-dma-mx2.c175
-rw-r--r--sound/soc/imx/imx-pcm-fiq.c336
-rw-r--r--sound/soc/imx/imx-pcm.c105
-rw-r--r--sound/soc/imx/imx-pcm.h32
-rw-r--r--sound/soc/imx/imx-ssi.c690
-rw-r--r--sound/soc/imx/imx-ssi.h216
-rw-r--r--sound/soc/imx/mx27vis-aic32x4.c245
-rw-r--r--sound/soc/imx/phycore-ac97.c125
-rw-r--r--sound/soc/imx/wm1133-ev1.c304
14 files changed, 0 insertions, 2867 deletions
diff --git a/sound/soc/imx/Kconfig b/sound/soc/imx/Kconfig
deleted file mode 100644
index 810acaa0900..00000000000
--- a/sound/soc/imx/Kconfig
+++ /dev/null
@@ -1,79 +0,0 @@
1menuconfig SND_IMX_SOC
2 tristate "SoC Audio for Freescale i.MX CPUs"
3 depends on ARCH_MXC
4 help
5 Say Y or M if you want to add support for codecs attached to
6 the i.MX SSI interface.
7
8
9if SND_IMX_SOC
10
11config SND_SOC_IMX_SSI
12 tristate
13
14config SND_SOC_IMX_PCM
15 tristate
16
17config SND_MXC_SOC_FIQ
18 tristate
19 select FIQ
20 select SND_SOC_IMX_PCM
21
22config SND_MXC_SOC_MX2
23 select SND_SOC_DMAENGINE_PCM
24 tristate
25 select SND_SOC_IMX_PCM
26
27config SND_SOC_IMX_AUDMUX
28 tristate
29
30config SND_MXC_SOC_WM1133_EV1
31 tristate "Audio on the the i.MX31ADS with WM1133-EV1 fitted"
32 depends on MACH_MX31ADS_WM1133_EV1 && EXPERIMENTAL
33 select SND_SOC_WM8350
34 select SND_MXC_SOC_FIQ
35 select SND_SOC_IMX_AUDMUX
36 select SND_SOC_IMX_SSI
37 help
38 Enable support for audio on the i.MX31ADS with the WM1133-EV1
39 PMIC board with WM8835x fitted.
40
41config SND_SOC_MX27VIS_AIC32X4
42 tristate "SoC audio support for Visstrim M10 boards"
43 depends on MACH_IMX27_VISSTRIM_M10 && I2C
44 select SND_SOC_TLV320AIC32X4
45 select SND_MXC_SOC_MX2
46 select SND_SOC_IMX_AUDMUX
47 select SND_SOC_IMX_SSI
48 help
49 Say Y if you want to add support for SoC audio on Visstrim SM10
50 board with TLV320AIC32X4 codec.
51
52config SND_SOC_PHYCORE_AC97
53 tristate "SoC Audio support for Phytec phyCORE (and phyCARD) boards"
54 depends on MACH_PCM043 || MACH_PCA100
55 select SND_SOC_AC97_BUS
56 select SND_SOC_WM9712
57 select SND_MXC_SOC_FIQ
58 select SND_SOC_IMX_AUDMUX
59 select SND_SOC_IMX_SSI
60 help
61 Say Y if you want to add support for SoC audio on Phytec phyCORE
62 and phyCARD boards in AC97 mode
63
64config SND_SOC_EUKREA_TLV320
65 tristate "Eukrea TLV320"
66 depends on MACH_EUKREA_MBIMX27_BASEBOARD \
67 || MACH_EUKREA_MBIMXSD25_BASEBOARD \
68 || MACH_EUKREA_MBIMXSD35_BASEBOARD \
69 || MACH_EUKREA_MBIMXSD51_BASEBOARD
70 depends on I2C
71 select SND_SOC_TLV320AIC23
72 select SND_MXC_SOC_FIQ
73 select SND_SOC_IMX_AUDMUX
74 select SND_SOC_IMX_SSI
75 help
76 Enable I2S based access to the TLV320AIC23B codec attached
77 to the SSI interface
78
79endif # SND_IMX_SOC
diff --git a/sound/soc/imx/Makefile b/sound/soc/imx/Makefile
deleted file mode 100644
index f5db3e92d0d..00000000000
--- a/sound/soc/imx/Makefile
+++ /dev/null
@@ -1,22 +0,0 @@
1# i.MX Platform Support
2snd-soc-imx-ssi-objs := imx-ssi.o
3snd-soc-imx-audmux-objs := imx-audmux.o
4
5obj-$(CONFIG_SND_SOC_IMX_SSI) += snd-soc-imx-ssi.o
6obj-$(CONFIG_SND_SOC_IMX_AUDMUX) += snd-soc-imx-audmux.o
7
8obj-$(CONFIG_SND_SOC_IMX_PCM) += snd-soc-imx-pcm.o
9snd-soc-imx-pcm-y := imx-pcm.o
10snd-soc-imx-pcm-$(CONFIG_SND_MXC_SOC_FIQ) += imx-pcm-fiq.o
11snd-soc-imx-pcm-$(CONFIG_SND_MXC_SOC_MX2) += imx-pcm-dma-mx2.o
12
13# i.MX Machine Support
14snd-soc-eukrea-tlv320-objs := eukrea-tlv320.o
15snd-soc-phycore-ac97-objs := phycore-ac97.o
16snd-soc-mx27vis-aic32x4-objs := mx27vis-aic32x4.o
17snd-soc-wm1133-ev1-objs := wm1133-ev1.o
18
19obj-$(CONFIG_SND_SOC_EUKREA_TLV320) += snd-soc-eukrea-tlv320.o
20obj-$(CONFIG_SND_SOC_PHYCORE_AC97) += snd-soc-phycore-ac97.o
21obj-$(CONFIG_SND_SOC_MX27VIS_AIC32X4) += snd-soc-mx27vis-aic32x4.o
22obj-$(CONFIG_SND_MXC_SOC_WM1133_EV1) += snd-soc-wm1133-ev1.o
diff --git a/sound/soc/imx/eukrea-tlv320.c b/sound/soc/imx/eukrea-tlv320.c
deleted file mode 100644
index 7d4475cfdb2..00000000000
--- a/sound/soc/imx/eukrea-tlv320.c
+++ /dev/null
@@ -1,164 +0,0 @@
1/*
2 * eukrea-tlv320.c -- SoC audio for eukrea_cpuimxXX in I2S mode
3 *
4 * Copyright 2010 Eric Bénard, Eukréa Electromatique <eric@eukrea.com>
5 *
6 * based on sound/soc/s3c24xx/s3c24xx_simtec_tlv320aic23.c
7 * which is Copyright 2009 Simtec Electronics
8 * and on sound/soc/imx/phycore-ac97.c which is
9 * Copyright 2009 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 *
16 */
17
18#include <linux/module.h>
19#include <linux/moduleparam.h>
20#include <linux/device.h>
21#include <linux/i2c.h>
22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/soc.h>
25#include <asm/mach-types.h>
26
27#include "../codecs/tlv320aic23.h"
28#include "imx-ssi.h"
29#include "imx-audmux.h"
30
31#define CODEC_CLOCK 12000000
32
33static int eukrea_tlv320_hw_params(struct snd_pcm_substream *substream,
34 struct snd_pcm_hw_params *params)
35{
36 struct snd_soc_pcm_runtime *rtd = substream->private_data;
37 struct snd_soc_dai *codec_dai = rtd->codec_dai;
38 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
39 int ret;
40
41 ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
42 SND_SOC_DAIFMT_NB_NF |
43 SND_SOC_DAIFMT_CBM_CFM);
44 if (ret) {
45 pr_err("%s: failed set cpu dai format\n", __func__);
46 return ret;
47 }
48
49 ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
50 SND_SOC_DAIFMT_NB_NF |
51 SND_SOC_DAIFMT_CBM_CFM);
52 if (ret) {
53 pr_err("%s: failed set codec dai format\n", __func__);
54 return ret;
55 }
56
57 ret = snd_soc_dai_set_sysclk(codec_dai, 0,
58 CODEC_CLOCK, SND_SOC_CLOCK_OUT);
59 if (ret) {
60 pr_err("%s: failed setting codec sysclk\n", __func__);
61 return ret;
62 }
63 snd_soc_dai_set_tdm_slot(cpu_dai, 0xffffffc, 0xffffffc, 2, 0);
64
65 ret = snd_soc_dai_set_sysclk(cpu_dai, IMX_SSP_SYS_CLK, 0,
66 SND_SOC_CLOCK_IN);
67 if (ret) {
68 pr_err("can't set CPU system clock IMX_SSP_SYS_CLK\n");
69 return ret;
70 }
71
72 return 0;
73}
74
75static struct snd_soc_ops eukrea_tlv320_snd_ops = {
76 .hw_params = eukrea_tlv320_hw_params,
77};
78
79static struct snd_soc_dai_link eukrea_tlv320_dai = {
80 .name = "tlv320aic23",
81 .stream_name = "TLV320AIC23",
82 .codec_dai_name = "tlv320aic23-hifi",
83 .platform_name = "imx-fiq-pcm-audio.0",
84 .codec_name = "tlv320aic23-codec.0-001a",
85 .cpu_dai_name = "imx-ssi.0",
86 .ops = &eukrea_tlv320_snd_ops,
87};
88
89static struct snd_soc_card eukrea_tlv320 = {
90 .name = "cpuimx-audio",
91 .owner = THIS_MODULE,
92 .dai_link = &eukrea_tlv320_dai,
93 .num_links = 1,
94};
95
96static struct platform_device *eukrea_tlv320_snd_device;
97
98static int __init eukrea_tlv320_init(void)
99{
100 int ret;
101 int int_port = 0, ext_port;
102
103 if (machine_is_eukrea_cpuimx27()) {
104 imx_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
105 IMX_AUDMUX_V1_PCR_SYN |
106 IMX_AUDMUX_V1_PCR_TFSDIR |
107 IMX_AUDMUX_V1_PCR_TCLKDIR |
108 IMX_AUDMUX_V1_PCR_RFSDIR |
109 IMX_AUDMUX_V1_PCR_RCLKDIR |
110 IMX_AUDMUX_V1_PCR_TFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |
111 IMX_AUDMUX_V1_PCR_RFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |
112 IMX_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4)
113 );
114 imx_audmux_v1_configure_port(MX27_AUDMUX_HPCR3_SSI_PINS_4,
115 IMX_AUDMUX_V1_PCR_SYN |
116 IMX_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0)
117 );
118 } else if (machine_is_eukrea_cpuimx25sd() ||
119 machine_is_eukrea_cpuimx35sd() ||
120 machine_is_eukrea_cpuimx51sd()) {
121 ext_port = machine_is_eukrea_cpuimx25sd() ? 4 : 3;
122 imx_audmux_v2_configure_port(int_port,
123 IMX_AUDMUX_V2_PTCR_SYN |
124 IMX_AUDMUX_V2_PTCR_TFSDIR |
125 IMX_AUDMUX_V2_PTCR_TFSEL(ext_port) |
126 IMX_AUDMUX_V2_PTCR_TCLKDIR |
127 IMX_AUDMUX_V2_PTCR_TCSEL(ext_port),
128 IMX_AUDMUX_V2_PDCR_RXDSEL(ext_port)
129 );
130 imx_audmux_v2_configure_port(ext_port,
131 IMX_AUDMUX_V2_PTCR_SYN,
132 IMX_AUDMUX_V2_PDCR_RXDSEL(int_port)
133 );
134 } else {
135 /* return happy. We might run on a totally different machine */
136 return 0;
137 }
138
139 eukrea_tlv320_snd_device = platform_device_alloc("soc-audio", -1);
140 if (!eukrea_tlv320_snd_device)
141 return -ENOMEM;
142
143 platform_set_drvdata(eukrea_tlv320_snd_device, &eukrea_tlv320);
144 ret = platform_device_add(eukrea_tlv320_snd_device);
145
146 if (ret) {
147 printk(KERN_ERR "ASoC: Platform device allocation failed\n");
148 platform_device_put(eukrea_tlv320_snd_device);
149 }
150
151 return ret;
152}
153
154static void __exit eukrea_tlv320_exit(void)
155{
156 platform_device_unregister(eukrea_tlv320_snd_device);
157}
158
159module_init(eukrea_tlv320_init);
160module_exit(eukrea_tlv320_exit);
161
162MODULE_AUTHOR("Eric Bénard <eric@eukrea.com>");
163MODULE_DESCRIPTION("CPUIMX ALSA SoC driver");
164MODULE_LICENSE("GPL");
diff --git a/sound/soc/imx/imx-audmux.c b/sound/soc/imx/imx-audmux.c
deleted file mode 100644
index 601df809a26..00000000000
--- a/sound/soc/imx/imx-audmux.c
+++ /dev/null
@@ -1,314 +0,0 @@
1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 * Copyright 2012 Linaro Ltd.
4 * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
5 *
6 * Initial development of this code was funded by
7 * Phytec Messtechnik GmbH, http://www.phytec.de
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
19
20#include <linux/clk.h>
21#include <linux/debugfs.h>
22#include <linux/err.h>
23#include <linux/io.h>
24#include <linux/module.h>
25#include <linux/of.h>
26#include <linux/of_device.h>
27#include <linux/platform_device.h>
28#include <linux/slab.h>
29
30#include "imx-audmux.h"
31
32#define DRIVER_NAME "imx-audmux"
33
34static struct clk *audmux_clk;
35static void __iomem *audmux_base;
36
37#define IMX_AUDMUX_V2_PTCR(x) ((x) * 8)
38#define IMX_AUDMUX_V2_PDCR(x) ((x) * 8 + 4)
39
40#ifdef CONFIG_DEBUG_FS
41static struct dentry *audmux_debugfs_root;
42
43static int audmux_open_file(struct inode *inode, struct file *file)
44{
45 file->private_data = inode->i_private;
46 return 0;
47}
48
49/* There is an annoying discontinuity in the SSI numbering with regard
50 * to the Linux number of the devices */
51static const char *audmux_port_string(int port)
52{
53 switch (port) {
54 case MX31_AUDMUX_PORT1_SSI0:
55 return "imx-ssi.0";
56 case MX31_AUDMUX_PORT2_SSI1:
57 return "imx-ssi.1";
58 case MX31_AUDMUX_PORT3_SSI_PINS_3:
59 return "SSI3";
60 case MX31_AUDMUX_PORT4_SSI_PINS_4:
61 return "SSI4";
62 case MX31_AUDMUX_PORT5_SSI_PINS_5:
63 return "SSI5";
64 case MX31_AUDMUX_PORT6_SSI_PINS_6:
65 return "SSI6";
66 default:
67 return "UNKNOWN";
68 }
69}
70
71static ssize_t audmux_read_file(struct file *file, char __user *user_buf,
72 size_t count, loff_t *ppos)
73{
74 ssize_t ret;
75 char *buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
76 int port = (int)file->private_data;
77 u32 pdcr, ptcr;
78
79 if (!buf)
80 return -ENOMEM;
81
82 if (audmux_clk)
83 clk_prepare_enable(audmux_clk);
84
85 ptcr = readl(audmux_base + IMX_AUDMUX_V2_PTCR(port));
86 pdcr = readl(audmux_base + IMX_AUDMUX_V2_PDCR(port));
87
88 if (audmux_clk)
89 clk_disable_unprepare(audmux_clk);
90
91 ret = snprintf(buf, PAGE_SIZE, "PDCR: %08x\nPTCR: %08x\n",
92 pdcr, ptcr);
93
94 if (ptcr & IMX_AUDMUX_V2_PTCR_TFSDIR)
95 ret += snprintf(buf + ret, PAGE_SIZE - ret,
96 "TxFS output from %s, ",
97 audmux_port_string((ptcr >> 27) & 0x7));
98 else
99 ret += snprintf(buf + ret, PAGE_SIZE - ret,
100 "TxFS input, ");
101
102 if (ptcr & IMX_AUDMUX_V2_PTCR_TCLKDIR)
103 ret += snprintf(buf + ret, PAGE_SIZE - ret,
104 "TxClk output from %s",
105 audmux_port_string((ptcr >> 22) & 0x7));
106 else
107 ret += snprintf(buf + ret, PAGE_SIZE - ret,
108 "TxClk input");
109
110 ret += snprintf(buf + ret, PAGE_SIZE - ret, "\n");
111
112 if (ptcr & IMX_AUDMUX_V2_PTCR_SYN) {
113 ret += snprintf(buf + ret, PAGE_SIZE - ret,
114 "Port is symmetric");
115 } else {
116 if (ptcr & IMX_AUDMUX_V2_PTCR_RFSDIR)
117 ret += snprintf(buf + ret, PAGE_SIZE - ret,
118 "RxFS output from %s, ",
119 audmux_port_string((ptcr >> 17) & 0x7));
120 else
121 ret += snprintf(buf + ret, PAGE_SIZE - ret,
122 "RxFS input, ");
123
124 if (ptcr & IMX_AUDMUX_V2_PTCR_RCLKDIR)
125 ret += snprintf(buf + ret, PAGE_SIZE - ret,
126 "RxClk output from %s",
127 audmux_port_string((ptcr >> 12) & 0x7));
128 else
129 ret += snprintf(buf + ret, PAGE_SIZE - ret,
130 "RxClk input");
131 }
132
133 ret += snprintf(buf + ret, PAGE_SIZE - ret,
134 "\nData received from %s\n",
135 audmux_port_string((pdcr >> 13) & 0x7));
136
137 ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret);
138
139 kfree(buf);
140
141 return ret;
142}
143
144static const struct file_operations audmux_debugfs_fops = {
145 .open = audmux_open_file,
146 .read = audmux_read_file,
147 .llseek = default_llseek,
148};
149
150static void __init audmux_debugfs_init(void)
151{
152 int i;
153 char buf[20];
154
155 audmux_debugfs_root = debugfs_create_dir("audmux", NULL);
156 if (!audmux_debugfs_root) {
157 pr_warning("Failed to create AUDMUX debugfs root\n");
158 return;
159 }
160
161 for (i = 1; i < 8; i++) {
162 snprintf(buf, sizeof(buf), "ssi%d", i);
163 if (!debugfs_create_file(buf, 0444, audmux_debugfs_root,
164 (void *)i, &audmux_debugfs_fops))
165 pr_warning("Failed to create AUDMUX port %d debugfs file\n",
166 i);
167 }
168}
169
170static void __devexit audmux_debugfs_remove(void)
171{
172 debugfs_remove_recursive(audmux_debugfs_root);
173}
174#else
175static inline void audmux_debugfs_init(void)
176{
177}
178
179static inline void audmux_debugfs_remove(void)
180{
181}
182#endif
183
184enum imx_audmux_type {
185 IMX21_AUDMUX,
186 IMX31_AUDMUX,
187} audmux_type;
188
189static struct platform_device_id imx_audmux_ids[] = {
190 {
191 .name = "imx21-audmux",
192 .driver_data = IMX21_AUDMUX,
193 }, {
194 .name = "imx31-audmux",
195 .driver_data = IMX31_AUDMUX,
196 }, {
197 /* sentinel */
198 }
199};
200MODULE_DEVICE_TABLE(platform, imx_audmux_ids);
201
202static const struct of_device_id imx_audmux_dt_ids[] = {
203 { .compatible = "fsl,imx21-audmux", .data = &imx_audmux_ids[0], },
204 { .compatible = "fsl,imx31-audmux", .data = &imx_audmux_ids[1], },
205 { /* sentinel */ }
206};
207MODULE_DEVICE_TABLE(of, imx_audmux_dt_ids);
208
209static const uint8_t port_mapping[] = {
210 0x0, 0x4, 0x8, 0x10, 0x14, 0x1c,
211};
212
213int imx_audmux_v1_configure_port(unsigned int port, unsigned int pcr)
214{
215 if (audmux_type != IMX21_AUDMUX)
216 return -EINVAL;
217
218 if (!audmux_base)
219 return -ENOSYS;
220
221 if (port >= ARRAY_SIZE(port_mapping))
222 return -EINVAL;
223
224 writel(pcr, audmux_base + port_mapping[port]);
225
226 return 0;
227}
228EXPORT_SYMBOL_GPL(imx_audmux_v1_configure_port);
229
230int imx_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
231 unsigned int pdcr)
232{
233 if (audmux_type != IMX31_AUDMUX)
234 return -EINVAL;
235
236 if (!audmux_base)
237 return -ENOSYS;
238
239 if (audmux_clk)
240 clk_prepare_enable(audmux_clk);
241
242 writel(ptcr, audmux_base + IMX_AUDMUX_V2_PTCR(port));
243 writel(pdcr, audmux_base + IMX_AUDMUX_V2_PDCR(port));
244
245 if (audmux_clk)
246 clk_disable_unprepare(audmux_clk);
247
248 return 0;
249}
250EXPORT_SYMBOL_GPL(imx_audmux_v2_configure_port);
251
252static int __devinit imx_audmux_probe(struct platform_device *pdev)
253{
254 struct resource *res;
255 const struct of_device_id *of_id =
256 of_match_device(imx_audmux_dt_ids, &pdev->dev);
257
258 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
259 audmux_base = devm_request_and_ioremap(&pdev->dev, res);
260 if (!audmux_base)
261 return -EADDRNOTAVAIL;
262
263 audmux_clk = clk_get(&pdev->dev, "audmux");
264 if (IS_ERR(audmux_clk)) {
265 dev_dbg(&pdev->dev, "cannot get clock: %ld\n",
266 PTR_ERR(audmux_clk));
267 audmux_clk = NULL;
268 }
269
270 if (of_id)
271 pdev->id_entry = of_id->data;
272 audmux_type = pdev->id_entry->driver_data;
273 if (audmux_type == IMX31_AUDMUX)
274 audmux_debugfs_init();
275
276 return 0;
277}
278
279static int __devexit imx_audmux_remove(struct platform_device *pdev)
280{
281 if (audmux_type == IMX31_AUDMUX)
282 audmux_debugfs_remove();
283 clk_put(audmux_clk);
284
285 return 0;
286}
287
288static struct platform_driver imx_audmux_driver = {
289 .probe = imx_audmux_probe,
290 .remove = __devexit_p(imx_audmux_remove),
291 .id_table = imx_audmux_ids,
292 .driver = {
293 .name = DRIVER_NAME,
294 .owner = THIS_MODULE,
295 .of_match_table = imx_audmux_dt_ids,
296 }
297};
298
299static int __init imx_audmux_init(void)
300{
301 return platform_driver_register(&imx_audmux_driver);
302}
303subsys_initcall(imx_audmux_init);
304
305static void __exit imx_audmux_exit(void)
306{
307 platform_driver_unregister(&imx_audmux_driver);
308}
309module_exit(imx_audmux_exit);
310
311MODULE_DESCRIPTION("Freescale i.MX AUDMUX driver");
312MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
313MODULE_LICENSE("GPL v2");
314MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/sound/soc/imx/imx-audmux.h b/sound/soc/imx/imx-audmux.h
deleted file mode 100644
index 04ebbab8d7b..00000000000
--- a/sound/soc/imx/imx-audmux.h
+++ /dev/null
@@ -1,60 +0,0 @@
1#ifndef __IMX_AUDMUX_H
2#define __IMX_AUDMUX_H
3
4#define MX27_AUDMUX_HPCR1_SSI0 0
5#define MX27_AUDMUX_HPCR2_SSI1 1
6#define MX27_AUDMUX_HPCR3_SSI_PINS_4 2
7#define MX27_AUDMUX_PPCR1_SSI_PINS_1 3
8#define MX27_AUDMUX_PPCR2_SSI_PINS_2 4
9#define MX27_AUDMUX_PPCR3_SSI_PINS_3 5
10
11#define MX31_AUDMUX_PORT1_SSI0 0
12#define MX31_AUDMUX_PORT2_SSI1 1
13#define MX31_AUDMUX_PORT3_SSI_PINS_3 2
14#define MX31_AUDMUX_PORT4_SSI_PINS_4 3
15#define MX31_AUDMUX_PORT5_SSI_PINS_5 4
16#define MX31_AUDMUX_PORT6_SSI_PINS_6 5
17
18#define MX51_AUDMUX_PORT1_SSI0 0
19#define MX51_AUDMUX_PORT2_SSI1 1
20#define MX51_AUDMUX_PORT3 2
21#define MX51_AUDMUX_PORT4 3
22#define MX51_AUDMUX_PORT5 4
23#define MX51_AUDMUX_PORT6 5
24#define MX51_AUDMUX_PORT7 6
25
26/* Register definitions for the i.MX21/27 Digital Audio Multiplexer */
27#define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff)
28#define IMX_AUDMUX_V1_PCR_INMEN (1 << 8)
29#define IMX_AUDMUX_V1_PCR_TXRXEN (1 << 10)
30#define IMX_AUDMUX_V1_PCR_SYN (1 << 12)
31#define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13)
32#define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20)
33#define IMX_AUDMUX_V1_PCR_RCLKDIR (1 << 24)
34#define IMX_AUDMUX_V1_PCR_RFSDIR (1 << 25)
35#define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26)
36#define IMX_AUDMUX_V1_PCR_TCLKDIR (1 << 30)
37#define IMX_AUDMUX_V1_PCR_TFSDIR (1 << 31)
38
39/* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */
40#define IMX_AUDMUX_V2_PTCR_TFSDIR (1 << 31)
41#define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27)
42#define IMX_AUDMUX_V2_PTCR_TCLKDIR (1 << 26)
43#define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22)
44#define IMX_AUDMUX_V2_PTCR_RFSDIR (1 << 21)
45#define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17)
46#define IMX_AUDMUX_V2_PTCR_RCLKDIR (1 << 16)
47#define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12)
48#define IMX_AUDMUX_V2_PTCR_SYN (1 << 11)
49
50#define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13)
51#define IMX_AUDMUX_V2_PDCR_TXRXEN (1 << 12)
52#define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8)
53#define IMX_AUDMUX_V2_PDCR_INMMASK(x) ((x) & 0xff)
54
55int imx_audmux_v1_configure_port(unsigned int port, unsigned int pcr);
56
57int imx_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
58 unsigned int pdcr);
59
60#endif /* __IMX_AUDMUX_H */
diff --git a/sound/soc/imx/imx-pcm-dma-mx2.c b/sound/soc/imx/imx-pcm-dma-mx2.c
deleted file mode 100644
index 6b818de2fc0..00000000000
--- a/sound/soc/imx/imx-pcm-dma-mx2.c
+++ /dev/null
@@ -1,175 +0,0 @@
1/*
2 * imx-pcm-dma-mx2.c -- ALSA Soc Audio Layer
3 *
4 * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
5 *
6 * This code is based on code copyrighted by Freescale,
7 * Liam Girdwood, Javier Martin and probably others.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/device.h>
17#include <linux/dma-mapping.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/module.h>
21#include <linux/platform_device.h>
22#include <linux/slab.h>
23#include <linux/dmaengine.h>
24#include <linux/types.h>
25
26#include <sound/core.h>
27#include <sound/initval.h>
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/soc.h>
31#include <sound/dmaengine_pcm.h>
32
33#include <mach/dma.h>
34
35#include "imx-pcm.h"
36
37static bool filter(struct dma_chan *chan, void *param)
38{
39 if (!imx_dma_is_general_purpose(chan))
40 return false;
41
42 chan->private = param;
43
44 return true;
45}
46
47static int snd_imx_pcm_hw_params(struct snd_pcm_substream *substream,
48 struct snd_pcm_hw_params *params)
49{
50 struct snd_soc_pcm_runtime *rtd = substream->private_data;
51 struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
52 struct imx_pcm_dma_params *dma_params;
53 struct dma_slave_config slave_config;
54 int ret;
55
56 dma_params = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
57
58 ret = snd_hwparams_to_dma_slave_config(substream, params, &slave_config);
59 if (ret)
60 return ret;
61
62 slave_config.device_fc = false;
63
64 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
65 slave_config.dst_addr = dma_params->dma_addr;
66 slave_config.dst_maxburst = dma_params->burstsize;
67 } else {
68 slave_config.src_addr = dma_params->dma_addr;
69 slave_config.src_maxburst = dma_params->burstsize;
70 }
71
72 ret = dmaengine_slave_config(chan, &slave_config);
73 if (ret)
74 return ret;
75
76 snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
77
78 return 0;
79}
80
81static struct snd_pcm_hardware snd_imx_hardware = {
82 .info = SNDRV_PCM_INFO_INTERLEAVED |
83 SNDRV_PCM_INFO_BLOCK_TRANSFER |
84 SNDRV_PCM_INFO_MMAP |
85 SNDRV_PCM_INFO_MMAP_VALID |
86 SNDRV_PCM_INFO_PAUSE |
87 SNDRV_PCM_INFO_RESUME,
88 .formats = SNDRV_PCM_FMTBIT_S16_LE,
89 .rate_min = 8000,
90 .channels_min = 2,
91 .channels_max = 2,
92 .buffer_bytes_max = IMX_SSI_DMABUF_SIZE,
93 .period_bytes_min = 128,
94 .period_bytes_max = 65535, /* Limited by SDMA engine */
95 .periods_min = 2,
96 .periods_max = 255,
97 .fifo_size = 0,
98};
99
100static int snd_imx_open(struct snd_pcm_substream *substream)
101{
102 struct snd_soc_pcm_runtime *rtd = substream->private_data;
103 struct imx_pcm_dma_params *dma_params;
104 struct imx_dma_data *dma_data;
105 int ret;
106
107 snd_soc_set_runtime_hwparams(substream, &snd_imx_hardware);
108
109 dma_params = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
110
111 dma_data = kzalloc(sizeof(*dma_data), GFP_KERNEL);
112 dma_data->peripheral_type = IMX_DMATYPE_SSI;
113 dma_data->priority = DMA_PRIO_HIGH;
114 dma_data->dma_request = dma_params->dma;
115
116 ret = snd_dmaengine_pcm_open(substream, filter, dma_data);
117 if (ret) {
118 kfree(dma_data);
119 return 0;
120 }
121
122 snd_dmaengine_pcm_set_data(substream, dma_data);
123
124 return 0;
125}
126
127static int snd_imx_close(struct snd_pcm_substream *substream)
128{
129 struct imx_dma_data *dma_data = snd_dmaengine_pcm_get_data(substream);
130
131 snd_dmaengine_pcm_close(substream);
132 kfree(dma_data);
133
134 return 0;
135}
136
137static struct snd_pcm_ops imx_pcm_ops = {
138 .open = snd_imx_open,
139 .close = snd_imx_close,
140 .ioctl = snd_pcm_lib_ioctl,
141 .hw_params = snd_imx_pcm_hw_params,
142 .trigger = snd_dmaengine_pcm_trigger,
143 .pointer = snd_dmaengine_pcm_pointer,
144 .mmap = snd_imx_pcm_mmap,
145};
146
147static struct snd_soc_platform_driver imx_soc_platform_mx2 = {
148 .ops = &imx_pcm_ops,
149 .pcm_new = imx_pcm_new,
150 .pcm_free = imx_pcm_free,
151};
152
153static int __devinit imx_soc_platform_probe(struct platform_device *pdev)
154{
155 return snd_soc_register_platform(&pdev->dev, &imx_soc_platform_mx2);
156}
157
158static int __devexit imx_soc_platform_remove(struct platform_device *pdev)
159{
160 snd_soc_unregister_platform(&pdev->dev);
161 return 0;
162}
163
164static struct platform_driver imx_pcm_driver = {
165 .driver = {
166 .name = "imx-pcm-audio",
167 .owner = THIS_MODULE,
168 },
169 .probe = imx_soc_platform_probe,
170 .remove = __devexit_p(imx_soc_platform_remove),
171};
172
173module_platform_driver(imx_pcm_driver);
174MODULE_LICENSE("GPL");
175MODULE_ALIAS("platform:imx-pcm-audio");
diff --git a/sound/soc/imx/imx-pcm-fiq.c b/sound/soc/imx/imx-pcm-fiq.c
deleted file mode 100644
index 456b7d723d6..00000000000
--- a/sound/soc/imx/imx-pcm-fiq.c
+++ /dev/null
@@ -1,336 +0,0 @@
1/*
2 * imx-pcm-fiq.c -- ALSA Soc Audio Layer
3 *
4 * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
5 *
6 * This code is based on code copyrighted by Freescale,
7 * Liam Girdwood, Javier Martin and probably others.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/device.h>
17#include <linux/dma-mapping.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/module.h>
21#include <linux/platform_device.h>
22#include <linux/slab.h>
23
24#include <sound/core.h>
25#include <sound/initval.h>
26#include <sound/pcm.h>
27#include <sound/pcm_params.h>
28#include <sound/soc.h>
29
30#include <asm/fiq.h>
31
32#include <mach/ssi.h>
33
34#include "imx-ssi.h"
35
36struct imx_pcm_runtime_data {
37 int period;
38 int periods;
39 unsigned long offset;
40 unsigned long last_offset;
41 unsigned long size;
42 struct hrtimer hrt;
43 int poll_time_ns;
44 struct snd_pcm_substream *substream;
45 atomic_t running;
46};
47
48static enum hrtimer_restart snd_hrtimer_callback(struct hrtimer *hrt)
49{
50 struct imx_pcm_runtime_data *iprtd =
51 container_of(hrt, struct imx_pcm_runtime_data, hrt);
52 struct snd_pcm_substream *substream = iprtd->substream;
53 struct snd_pcm_runtime *runtime = substream->runtime;
54 struct pt_regs regs;
55 unsigned long delta;
56
57 if (!atomic_read(&iprtd->running))
58 return HRTIMER_NORESTART;
59
60 get_fiq_regs(&regs);
61
62 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
63 iprtd->offset = regs.ARM_r8 & 0xffff;
64 else
65 iprtd->offset = regs.ARM_r9 & 0xffff;
66
67 /* How much data have we transferred since the last period report? */
68 if (iprtd->offset >= iprtd->last_offset)
69 delta = iprtd->offset - iprtd->last_offset;
70 else
71 delta = runtime->buffer_size + iprtd->offset
72 - iprtd->last_offset;
73
74 /* If we've transferred at least a period then report it and
75 * reset our poll time */
76 if (delta >= iprtd->period) {
77 snd_pcm_period_elapsed(substream);
78 iprtd->last_offset = iprtd->offset;
79 }
80
81 hrtimer_forward_now(hrt, ns_to_ktime(iprtd->poll_time_ns));
82
83 return HRTIMER_RESTART;
84}
85
86static struct fiq_handler fh = {
87 .name = DRV_NAME,
88};
89
90static int snd_imx_pcm_hw_params(struct snd_pcm_substream *substream,
91 struct snd_pcm_hw_params *params)
92{
93 struct snd_pcm_runtime *runtime = substream->runtime;
94 struct imx_pcm_runtime_data *iprtd = runtime->private_data;
95
96 iprtd->size = params_buffer_bytes(params);
97 iprtd->periods = params_periods(params);
98 iprtd->period = params_period_bytes(params) ;
99 iprtd->offset = 0;
100 iprtd->last_offset = 0;
101 iprtd->poll_time_ns = 1000000000 / params_rate(params) *
102 params_period_size(params);
103 snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
104
105 return 0;
106}
107
108static int snd_imx_pcm_prepare(struct snd_pcm_substream *substream)
109{
110 struct snd_pcm_runtime *runtime = substream->runtime;
111 struct imx_pcm_runtime_data *iprtd = runtime->private_data;
112 struct pt_regs regs;
113
114 get_fiq_regs(&regs);
115 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
116 regs.ARM_r8 = (iprtd->period * iprtd->periods - 1) << 16;
117 else
118 regs.ARM_r9 = (iprtd->period * iprtd->periods - 1) << 16;
119
120 set_fiq_regs(&regs);
121
122 return 0;
123}
124
125static int fiq_enable;
126static int imx_pcm_fiq;
127
128static int snd_imx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
129{
130 struct snd_pcm_runtime *runtime = substream->runtime;
131 struct imx_pcm_runtime_data *iprtd = runtime->private_data;
132
133 switch (cmd) {
134 case SNDRV_PCM_TRIGGER_START:
135 case SNDRV_PCM_TRIGGER_RESUME:
136 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
137 atomic_set(&iprtd->running, 1);
138 hrtimer_start(&iprtd->hrt, ns_to_ktime(iprtd->poll_time_ns),
139 HRTIMER_MODE_REL);
140 if (++fiq_enable == 1)
141 enable_fiq(imx_pcm_fiq);
142
143 break;
144
145 case SNDRV_PCM_TRIGGER_STOP:
146 case SNDRV_PCM_TRIGGER_SUSPEND:
147 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
148 atomic_set(&iprtd->running, 0);
149
150 if (--fiq_enable == 0)
151 disable_fiq(imx_pcm_fiq);
152
153 break;
154 default:
155 return -EINVAL;
156 }
157
158 return 0;
159}
160
161static snd_pcm_uframes_t snd_imx_pcm_pointer(struct snd_pcm_substream *substream)
162{
163 struct snd_pcm_runtime *runtime = substream->runtime;
164 struct imx_pcm_runtime_data *iprtd = runtime->private_data;
165
166 return bytes_to_frames(substream->runtime, iprtd->offset);
167}
168
169static struct snd_pcm_hardware snd_imx_hardware = {
170 .info = SNDRV_PCM_INFO_INTERLEAVED |
171 SNDRV_PCM_INFO_BLOCK_TRANSFER |
172 SNDRV_PCM_INFO_MMAP |
173 SNDRV_PCM_INFO_MMAP_VALID |
174 SNDRV_PCM_INFO_PAUSE |
175 SNDRV_PCM_INFO_RESUME,
176 .formats = SNDRV_PCM_FMTBIT_S16_LE,
177 .rate_min = 8000,
178 .channels_min = 2,
179 .channels_max = 2,
180 .buffer_bytes_max = IMX_SSI_DMABUF_SIZE,
181 .period_bytes_min = 128,
182 .period_bytes_max = 16 * 1024,
183 .periods_min = 4,
184 .periods_max = 255,
185 .fifo_size = 0,
186};
187
188static int snd_imx_open(struct snd_pcm_substream *substream)
189{
190 struct snd_pcm_runtime *runtime = substream->runtime;
191 struct imx_pcm_runtime_data *iprtd;
192 int ret;
193
194 iprtd = kzalloc(sizeof(*iprtd), GFP_KERNEL);
195 if (iprtd == NULL)
196 return -ENOMEM;
197 runtime->private_data = iprtd;
198
199 iprtd->substream = substream;
200
201 atomic_set(&iprtd->running, 0);
202 hrtimer_init(&iprtd->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
203 iprtd->hrt.function = snd_hrtimer_callback;
204
205 ret = snd_pcm_hw_constraint_integer(substream->runtime,
206 SNDRV_PCM_HW_PARAM_PERIODS);
207 if (ret < 0) {
208 kfree(iprtd);
209 return ret;
210 }
211
212 snd_soc_set_runtime_hwparams(substream, &snd_imx_hardware);
213 return 0;
214}
215
216static int snd_imx_close(struct snd_pcm_substream *substream)
217{
218 struct snd_pcm_runtime *runtime = substream->runtime;
219 struct imx_pcm_runtime_data *iprtd = runtime->private_data;
220
221 hrtimer_cancel(&iprtd->hrt);
222
223 kfree(iprtd);
224
225 return 0;
226}
227
228static struct snd_pcm_ops imx_pcm_ops = {
229 .open = snd_imx_open,
230 .close = snd_imx_close,
231 .ioctl = snd_pcm_lib_ioctl,
232 .hw_params = snd_imx_pcm_hw_params,
233 .prepare = snd_imx_pcm_prepare,
234 .trigger = snd_imx_pcm_trigger,
235 .pointer = snd_imx_pcm_pointer,
236 .mmap = snd_imx_pcm_mmap,
237};
238
239static int ssi_irq = 0;
240
241static int imx_pcm_fiq_new(struct snd_soc_pcm_runtime *rtd)
242{
243 struct snd_pcm *pcm = rtd->pcm;
244 struct snd_pcm_substream *substream;
245 int ret;
246
247 ret = imx_pcm_new(rtd);
248 if (ret)
249 return ret;
250
251 substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
252 if (substream) {
253 struct snd_dma_buffer *buf = &substream->dma_buffer;
254
255 imx_ssi_fiq_tx_buffer = (unsigned long)buf->area;
256 }
257
258 substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
259 if (substream) {
260 struct snd_dma_buffer *buf = &substream->dma_buffer;
261
262 imx_ssi_fiq_rx_buffer = (unsigned long)buf->area;
263 }
264
265 set_fiq_handler(&imx_ssi_fiq_start,
266 &imx_ssi_fiq_end - &imx_ssi_fiq_start);
267
268 return 0;
269}
270
271static void imx_pcm_fiq_free(struct snd_pcm *pcm)
272{
273 mxc_set_irq_fiq(ssi_irq, 0);
274 release_fiq(&fh);
275 imx_pcm_free(pcm);
276}
277
278static struct snd_soc_platform_driver imx_soc_platform_fiq = {
279 .ops = &imx_pcm_ops,
280 .pcm_new = imx_pcm_fiq_new,
281 .pcm_free = imx_pcm_fiq_free,
282};
283
284static int __devinit imx_soc_platform_probe(struct platform_device *pdev)
285{
286 struct imx_ssi *ssi = platform_get_drvdata(pdev);
287 int ret;
288
289 ret = claim_fiq(&fh);
290 if (ret) {
291 dev_err(&pdev->dev, "failed to claim fiq: %d", ret);
292 return ret;
293 }
294
295 mxc_set_irq_fiq(ssi->irq, 1);
296 ssi_irq = ssi->irq;
297
298 imx_pcm_fiq = ssi->irq;
299
300 imx_ssi_fiq_base = (unsigned long)ssi->base;
301
302 ssi->dma_params_tx.burstsize = 4;
303 ssi->dma_params_rx.burstsize = 6;
304
305 ret = snd_soc_register_platform(&pdev->dev, &imx_soc_platform_fiq);
306 if (ret)
307 goto failed_register;
308
309 return 0;
310
311failed_register:
312 mxc_set_irq_fiq(ssi_irq, 0);
313 release_fiq(&fh);
314
315 return ret;
316}
317
318static int __devexit imx_soc_platform_remove(struct platform_device *pdev)
319{
320 snd_soc_unregister_platform(&pdev->dev);
321 return 0;
322}
323
324static struct platform_driver imx_pcm_driver = {
325 .driver = {
326 .name = "imx-fiq-pcm-audio",
327 .owner = THIS_MODULE,
328 },
329
330 .probe = imx_soc_platform_probe,
331 .remove = __devexit_p(imx_soc_platform_remove),
332};
333
334module_platform_driver(imx_pcm_driver);
335
336MODULE_LICENSE("GPL");
diff --git a/sound/soc/imx/imx-pcm.c b/sound/soc/imx/imx-pcm.c
deleted file mode 100644
index 93dc360b177..00000000000
--- a/sound/soc/imx/imx-pcm.c
+++ /dev/null
@@ -1,105 +0,0 @@
1/*
2 * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
3 *
4 * This code is based on code copyrighted by Freescale,
5 * Liam Girdwood, Javier Martin and probably others.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#include <linux/dma-mapping.h>
14#include <linux/module.h>
15#include <sound/pcm.h>
16#include <sound/soc.h>
17#include "imx-pcm.h"
18
19int snd_imx_pcm_mmap(struct snd_pcm_substream *substream,
20 struct vm_area_struct *vma)
21{
22 struct snd_pcm_runtime *runtime = substream->runtime;
23 int ret;
24
25 ret = dma_mmap_writecombine(substream->pcm->card->dev, vma,
26 runtime->dma_area, runtime->dma_addr, runtime->dma_bytes);
27
28 pr_debug("%s: ret: %d %p 0x%08x 0x%08x\n", __func__, ret,
29 runtime->dma_area,
30 runtime->dma_addr,
31 runtime->dma_bytes);
32 return ret;
33}
34EXPORT_SYMBOL_GPL(snd_imx_pcm_mmap);
35
36static int imx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
37{
38 struct snd_pcm_substream *substream = pcm->streams[stream].substream;
39 struct snd_dma_buffer *buf = &substream->dma_buffer;
40 size_t size = IMX_SSI_DMABUF_SIZE;
41
42 buf->dev.type = SNDRV_DMA_TYPE_DEV;
43 buf->dev.dev = pcm->card->dev;
44 buf->private_data = NULL;
45 buf->area = dma_alloc_writecombine(pcm->card->dev, size,
46 &buf->addr, GFP_KERNEL);
47 if (!buf->area)
48 return -ENOMEM;
49 buf->bytes = size;
50
51 return 0;
52}
53
54static u64 imx_pcm_dmamask = DMA_BIT_MASK(32);
55
56int imx_pcm_new(struct snd_soc_pcm_runtime *rtd)
57{
58 struct snd_card *card = rtd->card->snd_card;
59 struct snd_pcm *pcm = rtd->pcm;
60 int ret = 0;
61
62 if (!card->dev->dma_mask)
63 card->dev->dma_mask = &imx_pcm_dmamask;
64 if (!card->dev->coherent_dma_mask)
65 card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
66 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
67 ret = imx_pcm_preallocate_dma_buffer(pcm,
68 SNDRV_PCM_STREAM_PLAYBACK);
69 if (ret)
70 goto out;
71 }
72
73 if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
74 ret = imx_pcm_preallocate_dma_buffer(pcm,
75 SNDRV_PCM_STREAM_CAPTURE);
76 if (ret)
77 goto out;
78 }
79
80out:
81 return ret;
82}
83EXPORT_SYMBOL_GPL(imx_pcm_new);
84
85void imx_pcm_free(struct snd_pcm *pcm)
86{
87 struct snd_pcm_substream *substream;
88 struct snd_dma_buffer *buf;
89 int stream;
90
91 for (stream = 0; stream < 2; stream++) {
92 substream = pcm->streams[stream].substream;
93 if (!substream)
94 continue;
95
96 buf = &substream->dma_buffer;
97 if (!buf->area)
98 continue;
99
100 dma_free_writecombine(pcm->card->dev, buf->bytes,
101 buf->area, buf->addr);
102 buf->area = NULL;
103 }
104}
105EXPORT_SYMBOL_GPL(imx_pcm_free);
diff --git a/sound/soc/imx/imx-pcm.h b/sound/soc/imx/imx-pcm.h
deleted file mode 100644
index b5f5c3acf34..00000000000
--- a/sound/soc/imx/imx-pcm.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
3 *
4 * This code is based on code copyrighted by Freescale,
5 * Liam Girdwood, Javier Martin and probably others.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#ifndef _IMX_PCM_H
14#define _IMX_PCM_H
15
16/*
17 * Do not change this as the FIQ handler depends on this size
18 */
19#define IMX_SSI_DMABUF_SIZE (64 * 1024)
20
21struct imx_pcm_dma_params {
22 int dma;
23 unsigned long dma_addr;
24 int burstsize;
25};
26
27int snd_imx_pcm_mmap(struct snd_pcm_substream *substream,
28 struct vm_area_struct *vma);
29int imx_pcm_new(struct snd_soc_pcm_runtime *rtd);
30void imx_pcm_free(struct snd_pcm *pcm);
31
32#endif /* _IMX_PCM_H */
diff --git a/sound/soc/imx/imx-ssi.c b/sound/soc/imx/imx-ssi.c
deleted file mode 100644
index 4f81ed45632..00000000000
--- a/sound/soc/imx/imx-ssi.c
+++ /dev/null
@@ -1,690 +0,0 @@
1/*
2 * imx-ssi.c -- ALSA Soc Audio Layer
3 *
4 * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
5 *
6 * This code is based on code copyrighted by Freescale,
7 * Liam Girdwood, Javier Martin and probably others.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 *
15 * The i.MX SSI core has some nasty limitations in AC97 mode. While most
16 * sane processor vendors have a FIFO per AC97 slot, the i.MX has only
17 * one FIFO which combines all valid receive slots. We cannot even select
18 * which slots we want to receive. The WM9712 with which this driver
19 * was developed with always sends GPIO status data in slot 12 which
20 * we receive in our (PCM-) data stream. The only chance we have is to
21 * manually skip this data in the FIQ handler. With sampling rates different
22 * from 48000Hz not every frame has valid receive data, so the ratio
23 * between pcm data and GPIO status data changes. Our FIQ handler is not
24 * able to handle this, hence this driver only works with 48000Hz sampling
25 * rate.
26 * Reading and writing AC97 registers is another challenge. The core
27 * provides us status bits when the read register is updated with *another*
28 * value. When we read the same register two times (and the register still
29 * contains the same value) these status bits are not set. We work
30 * around this by not polling these bits but only wait a fixed delay.
31 *
32 */
33
34#include <linux/clk.h>
35#include <linux/delay.h>
36#include <linux/device.h>
37#include <linux/dma-mapping.h>
38#include <linux/init.h>
39#include <linux/interrupt.h>
40#include <linux/module.h>
41#include <linux/platform_device.h>
42#include <linux/slab.h>
43
44#include <sound/core.h>
45#include <sound/initval.h>
46#include <sound/pcm.h>
47#include <sound/pcm_params.h>
48#include <sound/soc.h>
49
50#include <mach/ssi.h>
51#include <mach/hardware.h>
52
53#include "imx-ssi.h"
54
55#define SSI_SACNT_DEFAULT (SSI_SACNT_AC97EN | SSI_SACNT_FV)
56
57/*
58 * SSI Network Mode or TDM slots configuration.
59 * Should only be called when port is inactive (i.e. SSIEN = 0).
60 */
61static int imx_ssi_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
62 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
63{
64 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
65 u32 sccr;
66
67 sccr = readl(ssi->base + SSI_STCCR);
68 sccr &= ~SSI_STCCR_DC_MASK;
69 sccr |= SSI_STCCR_DC(slots - 1);
70 writel(sccr, ssi->base + SSI_STCCR);
71
72 sccr = readl(ssi->base + SSI_SRCCR);
73 sccr &= ~SSI_STCCR_DC_MASK;
74 sccr |= SSI_STCCR_DC(slots - 1);
75 writel(sccr, ssi->base + SSI_SRCCR);
76
77 writel(tx_mask, ssi->base + SSI_STMSK);
78 writel(rx_mask, ssi->base + SSI_SRMSK);
79
80 return 0;
81}
82
83/*
84 * SSI DAI format configuration.
85 * Should only be called when port is inactive (i.e. SSIEN = 0).
86 */
87static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
88{
89 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
90 u32 strcr = 0, scr;
91
92 scr = readl(ssi->base + SSI_SCR) & ~(SSI_SCR_SYN | SSI_SCR_NET);
93
94 /* DAI mode */
95 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
96 case SND_SOC_DAIFMT_I2S:
97 /* data on rising edge of bclk, frame low 1clk before data */
98 strcr |= SSI_STCR_TFSI | SSI_STCR_TEFS | SSI_STCR_TXBIT0;
99 scr |= SSI_SCR_NET;
100 if (ssi->flags & IMX_SSI_USE_I2S_SLAVE) {
101 scr &= ~SSI_I2S_MODE_MASK;
102 scr |= SSI_SCR_I2S_MODE_SLAVE;
103 }
104 break;
105 case SND_SOC_DAIFMT_LEFT_J:
106 /* data on rising edge of bclk, frame high with data */
107 strcr |= SSI_STCR_TXBIT0;
108 break;
109 case SND_SOC_DAIFMT_DSP_B:
110 /* data on rising edge of bclk, frame high with data */
111 strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0;
112 break;
113 case SND_SOC_DAIFMT_DSP_A:
114 /* data on rising edge of bclk, frame high 1clk before data */
115 strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0 | SSI_STCR_TEFS;
116 break;
117 }
118
119 /* DAI clock inversion */
120 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
121 case SND_SOC_DAIFMT_IB_IF:
122 strcr |= SSI_STCR_TFSI;
123 strcr &= ~SSI_STCR_TSCKP;
124 break;
125 case SND_SOC_DAIFMT_IB_NF:
126 strcr &= ~(SSI_STCR_TSCKP | SSI_STCR_TFSI);
127 break;
128 case SND_SOC_DAIFMT_NB_IF:
129 strcr |= SSI_STCR_TFSI | SSI_STCR_TSCKP;
130 break;
131 case SND_SOC_DAIFMT_NB_NF:
132 strcr &= ~SSI_STCR_TFSI;
133 strcr |= SSI_STCR_TSCKP;
134 break;
135 }
136
137 /* DAI clock master masks */
138 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
139 case SND_SOC_DAIFMT_CBM_CFM:
140 break;
141 default:
142 /* Master mode not implemented, needs handling of clocks. */
143 return -EINVAL;
144 }
145
146 strcr |= SSI_STCR_TFEN0;
147
148 if (ssi->flags & IMX_SSI_NET)
149 scr |= SSI_SCR_NET;
150 if (ssi->flags & IMX_SSI_SYN)
151 scr |= SSI_SCR_SYN;
152
153 writel(strcr, ssi->base + SSI_STCR);
154 writel(strcr, ssi->base + SSI_SRCR);
155 writel(scr, ssi->base + SSI_SCR);
156
157 return 0;
158}
159
160/*
161 * SSI system clock configuration.
162 * Should only be called when port is inactive (i.e. SSIEN = 0).
163 */
164static int imx_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
165 int clk_id, unsigned int freq, int dir)
166{
167 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
168 u32 scr;
169
170 scr = readl(ssi->base + SSI_SCR);
171
172 switch (clk_id) {
173 case IMX_SSP_SYS_CLK:
174 if (dir == SND_SOC_CLOCK_OUT)
175 scr |= SSI_SCR_SYS_CLK_EN;
176 else
177 scr &= ~SSI_SCR_SYS_CLK_EN;
178 break;
179 default:
180 return -EINVAL;
181 }
182
183 writel(scr, ssi->base + SSI_SCR);
184
185 return 0;
186}
187
188/*
189 * SSI Clock dividers
190 * Should only be called when port is inactive (i.e. SSIEN = 0).
191 */
192static int imx_ssi_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
193 int div_id, int div)
194{
195 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
196 u32 stccr, srccr;
197
198 stccr = readl(ssi->base + SSI_STCCR);
199 srccr = readl(ssi->base + SSI_SRCCR);
200
201 switch (div_id) {
202 case IMX_SSI_TX_DIV_2:
203 stccr &= ~SSI_STCCR_DIV2;
204 stccr |= div;
205 break;
206 case IMX_SSI_TX_DIV_PSR:
207 stccr &= ~SSI_STCCR_PSR;
208 stccr |= div;
209 break;
210 case IMX_SSI_TX_DIV_PM:
211 stccr &= ~0xff;
212 stccr |= SSI_STCCR_PM(div);
213 break;
214 case IMX_SSI_RX_DIV_2:
215 stccr &= ~SSI_STCCR_DIV2;
216 stccr |= div;
217 break;
218 case IMX_SSI_RX_DIV_PSR:
219 stccr &= ~SSI_STCCR_PSR;
220 stccr |= div;
221 break;
222 case IMX_SSI_RX_DIV_PM:
223 stccr &= ~0xff;
224 stccr |= SSI_STCCR_PM(div);
225 break;
226 default:
227 return -EINVAL;
228 }
229
230 writel(stccr, ssi->base + SSI_STCCR);
231 writel(srccr, ssi->base + SSI_SRCCR);
232
233 return 0;
234}
235
236static int imx_ssi_startup(struct snd_pcm_substream *substream,
237 struct snd_soc_dai *cpu_dai)
238{
239 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
240 struct imx_pcm_dma_params *dma_data;
241
242 /* Tx/Rx config */
243 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
244 dma_data = &ssi->dma_params_tx;
245 else
246 dma_data = &ssi->dma_params_rx;
247
248 snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data);
249
250 return 0;
251}
252
253/*
254 * Should only be called when port is inactive (i.e. SSIEN = 0),
255 * although can be called multiple times by upper layers.
256 */
257static int imx_ssi_hw_params(struct snd_pcm_substream *substream,
258 struct snd_pcm_hw_params *params,
259 struct snd_soc_dai *cpu_dai)
260{
261 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
262 u32 reg, sccr;
263
264 /* Tx/Rx config */
265 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
266 reg = SSI_STCCR;
267 else
268 reg = SSI_SRCCR;
269
270 if (ssi->flags & IMX_SSI_SYN)
271 reg = SSI_STCCR;
272
273 sccr = readl(ssi->base + reg) & ~SSI_STCCR_WL_MASK;
274
275 /* DAI data (word) size */
276 switch (params_format(params)) {
277 case SNDRV_PCM_FORMAT_S16_LE:
278 sccr |= SSI_SRCCR_WL(16);
279 break;
280 case SNDRV_PCM_FORMAT_S20_3LE:
281 sccr |= SSI_SRCCR_WL(20);
282 break;
283 case SNDRV_PCM_FORMAT_S24_LE:
284 sccr |= SSI_SRCCR_WL(24);
285 break;
286 }
287
288 writel(sccr, ssi->base + reg);
289
290 return 0;
291}
292
293static int imx_ssi_trigger(struct snd_pcm_substream *substream, int cmd,
294 struct snd_soc_dai *dai)
295{
296 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(dai);
297 unsigned int sier_bits, sier;
298 unsigned int scr;
299
300 scr = readl(ssi->base + SSI_SCR);
301 sier = readl(ssi->base + SSI_SIER);
302
303 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
304 if (ssi->flags & IMX_SSI_DMA)
305 sier_bits = SSI_SIER_TDMAE;
306 else
307 sier_bits = SSI_SIER_TIE | SSI_SIER_TFE0_EN;
308 } else {
309 if (ssi->flags & IMX_SSI_DMA)
310 sier_bits = SSI_SIER_RDMAE;
311 else
312 sier_bits = SSI_SIER_RIE | SSI_SIER_RFF0_EN;
313 }
314
315 switch (cmd) {
316 case SNDRV_PCM_TRIGGER_START:
317 case SNDRV_PCM_TRIGGER_RESUME:
318 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
319 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
320 scr |= SSI_SCR_TE;
321 else
322 scr |= SSI_SCR_RE;
323 sier |= sier_bits;
324
325 if (++ssi->enabled == 1)
326 scr |= SSI_SCR_SSIEN;
327
328 break;
329
330 case SNDRV_PCM_TRIGGER_STOP:
331 case SNDRV_PCM_TRIGGER_SUSPEND:
332 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
333 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
334 scr &= ~SSI_SCR_TE;
335 else
336 scr &= ~SSI_SCR_RE;
337 sier &= ~sier_bits;
338
339 if (--ssi->enabled == 0)
340 scr &= ~SSI_SCR_SSIEN;
341
342 break;
343 default:
344 return -EINVAL;
345 }
346
347 if (!(ssi->flags & IMX_SSI_USE_AC97))
348 /* rx/tx are always enabled to access ac97 registers */
349 writel(scr, ssi->base + SSI_SCR);
350
351 writel(sier, ssi->base + SSI_SIER);
352
353 return 0;
354}
355
356static const struct snd_soc_dai_ops imx_ssi_pcm_dai_ops = {
357 .startup = imx_ssi_startup,
358 .hw_params = imx_ssi_hw_params,
359 .set_fmt = imx_ssi_set_dai_fmt,
360 .set_clkdiv = imx_ssi_set_dai_clkdiv,
361 .set_sysclk = imx_ssi_set_dai_sysclk,
362 .set_tdm_slot = imx_ssi_set_dai_tdm_slot,
363 .trigger = imx_ssi_trigger,
364};
365
366static int imx_ssi_dai_probe(struct snd_soc_dai *dai)
367{
368 struct imx_ssi *ssi = dev_get_drvdata(dai->dev);
369 uint32_t val;
370
371 snd_soc_dai_set_drvdata(dai, ssi);
372
373 val = SSI_SFCSR_TFWM0(ssi->dma_params_tx.burstsize) |
374 SSI_SFCSR_RFWM0(ssi->dma_params_rx.burstsize);
375 writel(val, ssi->base + SSI_SFCSR);
376
377 return 0;
378}
379
380static struct snd_soc_dai_driver imx_ssi_dai = {
381 .probe = imx_ssi_dai_probe,
382 .playback = {
383 .channels_min = 1,
384 .channels_max = 2,
385 .rates = SNDRV_PCM_RATE_8000_96000,
386 .formats = SNDRV_PCM_FMTBIT_S16_LE,
387 },
388 .capture = {
389 .channels_min = 1,
390 .channels_max = 2,
391 .rates = SNDRV_PCM_RATE_8000_96000,
392 .formats = SNDRV_PCM_FMTBIT_S16_LE,
393 },
394 .ops = &imx_ssi_pcm_dai_ops,
395};
396
397static struct snd_soc_dai_driver imx_ac97_dai = {
398 .probe = imx_ssi_dai_probe,
399 .ac97_control = 1,
400 .playback = {
401 .stream_name = "AC97 Playback",
402 .channels_min = 2,
403 .channels_max = 2,
404 .rates = SNDRV_PCM_RATE_48000,
405 .formats = SNDRV_PCM_FMTBIT_S16_LE,
406 },
407 .capture = {
408 .stream_name = "AC97 Capture",
409 .channels_min = 2,
410 .channels_max = 2,
411 .rates = SNDRV_PCM_RATE_48000,
412 .formats = SNDRV_PCM_FMTBIT_S16_LE,
413 },
414 .ops = &imx_ssi_pcm_dai_ops,
415};
416
417static void setup_channel_to_ac97(struct imx_ssi *imx_ssi)
418{
419 void __iomem *base = imx_ssi->base;
420
421 writel(0x0, base + SSI_SCR);
422 writel(0x0, base + SSI_STCR);
423 writel(0x0, base + SSI_SRCR);
424
425 writel(SSI_SCR_SYN | SSI_SCR_NET, base + SSI_SCR);
426
427 writel(SSI_SFCSR_RFWM0(8) |
428 SSI_SFCSR_TFWM0(8) |
429 SSI_SFCSR_RFWM1(8) |
430 SSI_SFCSR_TFWM1(8), base + SSI_SFCSR);
431
432 writel(SSI_STCCR_WL(16) | SSI_STCCR_DC(12), base + SSI_STCCR);
433 writel(SSI_STCCR_WL(16) | SSI_STCCR_DC(12), base + SSI_SRCCR);
434
435 writel(SSI_SCR_SYN | SSI_SCR_NET | SSI_SCR_SSIEN, base + SSI_SCR);
436 writel(SSI_SOR_WAIT(3), base + SSI_SOR);
437
438 writel(SSI_SCR_SYN | SSI_SCR_NET | SSI_SCR_SSIEN |
439 SSI_SCR_TE | SSI_SCR_RE,
440 base + SSI_SCR);
441
442 writel(SSI_SACNT_DEFAULT, base + SSI_SACNT);
443 writel(0xff, base + SSI_SACCDIS);
444 writel(0x300, base + SSI_SACCEN);
445}
446
447static struct imx_ssi *ac97_ssi;
448
449static void imx_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
450 unsigned short val)
451{
452 struct imx_ssi *imx_ssi = ac97_ssi;
453 void __iomem *base = imx_ssi->base;
454 unsigned int lreg;
455 unsigned int lval;
456
457 if (reg > 0x7f)
458 return;
459
460 pr_debug("%s: 0x%02x 0x%04x\n", __func__, reg, val);
461
462 lreg = reg << 12;
463 writel(lreg, base + SSI_SACADD);
464
465 lval = val << 4;
466 writel(lval , base + SSI_SACDAT);
467
468 writel(SSI_SACNT_DEFAULT | SSI_SACNT_WR, base + SSI_SACNT);
469 udelay(100);
470}
471
472static unsigned short imx_ssi_ac97_read(struct snd_ac97 *ac97,
473 unsigned short reg)
474{
475 struct imx_ssi *imx_ssi = ac97_ssi;
476 void __iomem *base = imx_ssi->base;
477
478 unsigned short val = -1;
479 unsigned int lreg;
480
481 lreg = (reg & 0x7f) << 12 ;
482 writel(lreg, base + SSI_SACADD);
483 writel(SSI_SACNT_DEFAULT | SSI_SACNT_RD, base + SSI_SACNT);
484
485 udelay(100);
486
487 val = (readl(base + SSI_SACDAT) >> 4) & 0xffff;
488
489 pr_debug("%s: 0x%02x 0x%04x\n", __func__, reg, val);
490
491 return val;
492}
493
494static void imx_ssi_ac97_reset(struct snd_ac97 *ac97)
495{
496 struct imx_ssi *imx_ssi = ac97_ssi;
497
498 if (imx_ssi->ac97_reset)
499 imx_ssi->ac97_reset(ac97);
500}
501
502static void imx_ssi_ac97_warm_reset(struct snd_ac97 *ac97)
503{
504 struct imx_ssi *imx_ssi = ac97_ssi;
505
506 if (imx_ssi->ac97_warm_reset)
507 imx_ssi->ac97_warm_reset(ac97);
508}
509
510struct snd_ac97_bus_ops soc_ac97_ops = {
511 .read = imx_ssi_ac97_read,
512 .write = imx_ssi_ac97_write,
513 .reset = imx_ssi_ac97_reset,
514 .warm_reset = imx_ssi_ac97_warm_reset
515};
516EXPORT_SYMBOL_GPL(soc_ac97_ops);
517
518static int imx_ssi_probe(struct platform_device *pdev)
519{
520 struct resource *res;
521 struct imx_ssi *ssi;
522 struct imx_ssi_platform_data *pdata = pdev->dev.platform_data;
523 int ret = 0;
524 struct snd_soc_dai_driver *dai;
525
526 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
527 if (!ssi)
528 return -ENOMEM;
529 dev_set_drvdata(&pdev->dev, ssi);
530
531 if (pdata) {
532 ssi->ac97_reset = pdata->ac97_reset;
533 ssi->ac97_warm_reset = pdata->ac97_warm_reset;
534 ssi->flags = pdata->flags;
535 }
536
537 ssi->irq = platform_get_irq(pdev, 0);
538
539 ssi->clk = clk_get(&pdev->dev, NULL);
540 if (IS_ERR(ssi->clk)) {
541 ret = PTR_ERR(ssi->clk);
542 dev_err(&pdev->dev, "Cannot get the clock: %d\n",
543 ret);
544 goto failed_clk;
545 }
546 clk_enable(ssi->clk);
547
548 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
549 if (!res) {
550 ret = -ENODEV;
551 goto failed_get_resource;
552 }
553
554 if (!request_mem_region(res->start, resource_size(res), DRV_NAME)) {
555 dev_err(&pdev->dev, "request_mem_region failed\n");
556 ret = -EBUSY;
557 goto failed_get_resource;
558 }
559
560 ssi->base = ioremap(res->start, resource_size(res));
561 if (!ssi->base) {
562 dev_err(&pdev->dev, "ioremap failed\n");
563 ret = -ENODEV;
564 goto failed_ioremap;
565 }
566
567 if (ssi->flags & IMX_SSI_USE_AC97) {
568 if (ac97_ssi) {
569 ret = -EBUSY;
570 goto failed_ac97;
571 }
572 ac97_ssi = ssi;
573 setup_channel_to_ac97(ssi);
574 dai = &imx_ac97_dai;
575 } else
576 dai = &imx_ssi_dai;
577
578 writel(0x0, ssi->base + SSI_SIER);
579
580 ssi->dma_params_rx.dma_addr = res->start + SSI_SRX0;
581 ssi->dma_params_tx.dma_addr = res->start + SSI_STX0;
582
583 ssi->dma_params_tx.burstsize = 6;
584 ssi->dma_params_rx.burstsize = 4;
585
586 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx0");
587 if (res)
588 ssi->dma_params_tx.dma = res->start;
589
590 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx0");
591 if (res)
592 ssi->dma_params_rx.dma = res->start;
593
594 platform_set_drvdata(pdev, ssi);
595
596 ret = snd_soc_register_dai(&pdev->dev, dai);
597 if (ret) {
598 dev_err(&pdev->dev, "register DAI failed\n");
599 goto failed_register;
600 }
601
602 ssi->soc_platform_pdev_fiq = platform_device_alloc("imx-fiq-pcm-audio", pdev->id);
603 if (!ssi->soc_platform_pdev_fiq) {
604 ret = -ENOMEM;
605 goto failed_pdev_fiq_alloc;
606 }
607
608 platform_set_drvdata(ssi->soc_platform_pdev_fiq, ssi);
609 ret = platform_device_add(ssi->soc_platform_pdev_fiq);
610 if (ret) {
611 dev_err(&pdev->dev, "failed to add platform device\n");
612 goto failed_pdev_fiq_add;
613 }
614
615 ssi->soc_platform_pdev = platform_device_alloc("imx-pcm-audio", pdev->id);
616 if (!ssi->soc_platform_pdev) {
617 ret = -ENOMEM;
618 goto failed_pdev_alloc;
619 }
620
621 platform_set_drvdata(ssi->soc_platform_pdev, ssi);
622 ret = platform_device_add(ssi->soc_platform_pdev);
623 if (ret) {
624 dev_err(&pdev->dev, "failed to add platform device\n");
625 goto failed_pdev_add;
626 }
627
628 return 0;
629
630failed_pdev_add:
631 platform_device_put(ssi->soc_platform_pdev);
632failed_pdev_alloc:
633 platform_device_del(ssi->soc_platform_pdev_fiq);
634failed_pdev_fiq_add:
635 platform_device_put(ssi->soc_platform_pdev_fiq);
636failed_pdev_fiq_alloc:
637 snd_soc_unregister_dai(&pdev->dev);
638failed_register:
639failed_ac97:
640 iounmap(ssi->base);
641failed_ioremap:
642 release_mem_region(res->start, resource_size(res));
643failed_get_resource:
644 clk_disable(ssi->clk);
645 clk_put(ssi->clk);
646failed_clk:
647 kfree(ssi);
648
649 return ret;
650}
651
652static int __devexit imx_ssi_remove(struct platform_device *pdev)
653{
654 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
655 struct imx_ssi *ssi = platform_get_drvdata(pdev);
656
657 platform_device_unregister(ssi->soc_platform_pdev);
658 platform_device_unregister(ssi->soc_platform_pdev_fiq);
659
660 snd_soc_unregister_dai(&pdev->dev);
661
662 if (ssi->flags & IMX_SSI_USE_AC97)
663 ac97_ssi = NULL;
664
665 iounmap(ssi->base);
666 release_mem_region(res->start, resource_size(res));
667 clk_disable(ssi->clk);
668 clk_put(ssi->clk);
669 kfree(ssi);
670
671 return 0;
672}
673
674static struct platform_driver imx_ssi_driver = {
675 .probe = imx_ssi_probe,
676 .remove = __devexit_p(imx_ssi_remove),
677
678 .driver = {
679 .name = "imx-ssi",
680 .owner = THIS_MODULE,
681 },
682};
683
684module_platform_driver(imx_ssi_driver);
685
686/* Module information */
687MODULE_AUTHOR("Sascha Hauer, <s.hauer@pengutronix.de>");
688MODULE_DESCRIPTION("i.MX I2S/ac97 SoC Interface");
689MODULE_LICENSE("GPL");
690MODULE_ALIAS("platform:imx-ssi");
diff --git a/sound/soc/imx/imx-ssi.h b/sound/soc/imx/imx-ssi.h
deleted file mode 100644
index 5744e86ca87..00000000000
--- a/sound/soc/imx/imx-ssi.h
+++ /dev/null
@@ -1,216 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License version 2 as
4 * published by the Free Software Foundation.
5 */
6
7#ifndef _IMX_SSI_H
8#define _IMX_SSI_H
9
10#define SSI_STX0 0x00
11#define SSI_STX1 0x04
12#define SSI_SRX0 0x08
13#define SSI_SRX1 0x0c
14
15#define SSI_SCR 0x10
16#define SSI_SCR_CLK_IST (1 << 9)
17#define SSI_SCR_CLK_IST_SHIFT 9
18#define SSI_SCR_TCH_EN (1 << 8)
19#define SSI_SCR_SYS_CLK_EN (1 << 7)
20#define SSI_SCR_I2S_MODE_NORM (0 << 5)
21#define SSI_SCR_I2S_MODE_MSTR (1 << 5)
22#define SSI_SCR_I2S_MODE_SLAVE (2 << 5)
23#define SSI_I2S_MODE_MASK (3 << 5)
24#define SSI_SCR_SYN (1 << 4)
25#define SSI_SCR_NET (1 << 3)
26#define SSI_SCR_RE (1 << 2)
27#define SSI_SCR_TE (1 << 1)
28#define SSI_SCR_SSIEN (1 << 0)
29
30#define SSI_SISR 0x14
31#define SSI_SISR_MASK ((1 << 19) - 1)
32#define SSI_SISR_CMDAU (1 << 18)
33#define SSI_SISR_CMDDU (1 << 17)
34#define SSI_SISR_RXT (1 << 16)
35#define SSI_SISR_RDR1 (1 << 15)
36#define SSI_SISR_RDR0 (1 << 14)
37#define SSI_SISR_TDE1 (1 << 13)
38#define SSI_SISR_TDE0 (1 << 12)
39#define SSI_SISR_ROE1 (1 << 11)
40#define SSI_SISR_ROE0 (1 << 10)
41#define SSI_SISR_TUE1 (1 << 9)
42#define SSI_SISR_TUE0 (1 << 8)
43#define SSI_SISR_TFS (1 << 7)
44#define SSI_SISR_RFS (1 << 6)
45#define SSI_SISR_TLS (1 << 5)
46#define SSI_SISR_RLS (1 << 4)
47#define SSI_SISR_RFF1 (1 << 3)
48#define SSI_SISR_RFF0 (1 << 2)
49#define SSI_SISR_TFE1 (1 << 1)
50#define SSI_SISR_TFE0 (1 << 0)
51
52#define SSI_SIER 0x18
53#define SSI_SIER_RDMAE (1 << 22)
54#define SSI_SIER_RIE (1 << 21)
55#define SSI_SIER_TDMAE (1 << 20)
56#define SSI_SIER_TIE (1 << 19)
57#define SSI_SIER_CMDAU_EN (1 << 18)
58#define SSI_SIER_CMDDU_EN (1 << 17)
59#define SSI_SIER_RXT_EN (1 << 16)
60#define SSI_SIER_RDR1_EN (1 << 15)
61#define SSI_SIER_RDR0_EN (1 << 14)
62#define SSI_SIER_TDE1_EN (1 << 13)
63#define SSI_SIER_TDE0_EN (1 << 12)
64#define SSI_SIER_ROE1_EN (1 << 11)
65#define SSI_SIER_ROE0_EN (1 << 10)
66#define SSI_SIER_TUE1_EN (1 << 9)
67#define SSI_SIER_TUE0_EN (1 << 8)
68#define SSI_SIER_TFS_EN (1 << 7)
69#define SSI_SIER_RFS_EN (1 << 6)
70#define SSI_SIER_TLS_EN (1 << 5)
71#define SSI_SIER_RLS_EN (1 << 4)
72#define SSI_SIER_RFF1_EN (1 << 3)
73#define SSI_SIER_RFF0_EN (1 << 2)
74#define SSI_SIER_TFE1_EN (1 << 1)
75#define SSI_SIER_TFE0_EN (1 << 0)
76
77#define SSI_STCR 0x1c
78#define SSI_STCR_TXBIT0 (1 << 9)
79#define SSI_STCR_TFEN1 (1 << 8)
80#define SSI_STCR_TFEN0 (1 << 7)
81#define SSI_FIFO_ENABLE_0_SHIFT 7
82#define SSI_STCR_TFDIR (1 << 6)
83#define SSI_STCR_TXDIR (1 << 5)
84#define SSI_STCR_TSHFD (1 << 4)
85#define SSI_STCR_TSCKP (1 << 3)
86#define SSI_STCR_TFSI (1 << 2)
87#define SSI_STCR_TFSL (1 << 1)
88#define SSI_STCR_TEFS (1 << 0)
89
90#define SSI_SRCR 0x20
91#define SSI_SRCR_RXBIT0 (1 << 9)
92#define SSI_SRCR_RFEN1 (1 << 8)
93#define SSI_SRCR_RFEN0 (1 << 7)
94#define SSI_FIFO_ENABLE_0_SHIFT 7
95#define SSI_SRCR_RFDIR (1 << 6)
96#define SSI_SRCR_RXDIR (1 << 5)
97#define SSI_SRCR_RSHFD (1 << 4)
98#define SSI_SRCR_RSCKP (1 << 3)
99#define SSI_SRCR_RFSI (1 << 2)
100#define SSI_SRCR_RFSL (1 << 1)
101#define SSI_SRCR_REFS (1 << 0)
102
103#define SSI_SRCCR 0x28
104#define SSI_SRCCR_DIV2 (1 << 18)
105#define SSI_SRCCR_PSR (1 << 17)
106#define SSI_SRCCR_WL(x) ((((x) - 2) >> 1) << 13)
107#define SSI_SRCCR_DC(x) (((x) & 0x1f) << 8)
108#define SSI_SRCCR_PM(x) (((x) & 0xff) << 0)
109#define SSI_SRCCR_WL_MASK (0xf << 13)
110#define SSI_SRCCR_DC_MASK (0x1f << 8)
111#define SSI_SRCCR_PM_MASK (0xff << 0)
112
113#define SSI_STCCR 0x24
114#define SSI_STCCR_DIV2 (1 << 18)
115#define SSI_STCCR_PSR (1 << 17)
116#define SSI_STCCR_WL(x) ((((x) - 2) >> 1) << 13)
117#define SSI_STCCR_DC(x) (((x) & 0x1f) << 8)
118#define SSI_STCCR_PM(x) (((x) & 0xff) << 0)
119#define SSI_STCCR_WL_MASK (0xf << 13)
120#define SSI_STCCR_DC_MASK (0x1f << 8)
121#define SSI_STCCR_PM_MASK (0xff << 0)
122
123#define SSI_SFCSR 0x2c
124#define SSI_SFCSR_RFCNT1(x) (((x) & 0xf) << 28)
125#define SSI_RX_FIFO_1_COUNT_SHIFT 28
126#define SSI_SFCSR_TFCNT1(x) (((x) & 0xf) << 24)
127#define SSI_TX_FIFO_1_COUNT_SHIFT 24
128#define SSI_SFCSR_RFWM1(x) (((x) & 0xf) << 20)
129#define SSI_SFCSR_TFWM1(x) (((x) & 0xf) << 16)
130#define SSI_SFCSR_RFCNT0(x) (((x) & 0xf) << 12)
131#define SSI_RX_FIFO_0_COUNT_SHIFT 12
132#define SSI_SFCSR_TFCNT0(x) (((x) & 0xf) << 8)
133#define SSI_TX_FIFO_0_COUNT_SHIFT 8
134#define SSI_SFCSR_RFWM0(x) (((x) & 0xf) << 4)
135#define SSI_SFCSR_TFWM0(x) (((x) & 0xf) << 0)
136#define SSI_SFCSR_RFWM0_MASK (0xf << 4)
137#define SSI_SFCSR_TFWM0_MASK (0xf << 0)
138
139#define SSI_STR 0x30
140#define SSI_STR_TEST (1 << 15)
141#define SSI_STR_RCK2TCK (1 << 14)
142#define SSI_STR_RFS2TFS (1 << 13)
143#define SSI_STR_RXSTATE(x) (((x) & 0xf) << 8)
144#define SSI_STR_TXD2RXD (1 << 7)
145#define SSI_STR_TCK2RCK (1 << 6)
146#define SSI_STR_TFS2RFS (1 << 5)
147#define SSI_STR_TXSTATE(x) (((x) & 0xf) << 0)
148
149#define SSI_SOR 0x34
150#define SSI_SOR_CLKOFF (1 << 6)
151#define SSI_SOR_RX_CLR (1 << 5)
152#define SSI_SOR_TX_CLR (1 << 4)
153#define SSI_SOR_INIT (1 << 3)
154#define SSI_SOR_WAIT(x) (((x) & 0x3) << 1)
155#define SSI_SOR_WAIT_MASK (0x3 << 1)
156#define SSI_SOR_SYNRST (1 << 0)
157
158#define SSI_SACNT 0x38
159#define SSI_SACNT_FRDIV(x) (((x) & 0x3f) << 5)
160#define SSI_SACNT_WR (1 << 4)
161#define SSI_SACNT_RD (1 << 3)
162#define SSI_SACNT_TIF (1 << 2)
163#define SSI_SACNT_FV (1 << 1)
164#define SSI_SACNT_AC97EN (1 << 0)
165
166#define SSI_SACADD 0x3c
167#define SSI_SACDAT 0x40
168#define SSI_SATAG 0x44
169#define SSI_STMSK 0x48
170#define SSI_SRMSK 0x4c
171#define SSI_SACCST 0x50
172#define SSI_SACCEN 0x54
173#define SSI_SACCDIS 0x58
174
175/* SSI clock sources */
176#define IMX_SSP_SYS_CLK 0
177
178/* SSI audio dividers */
179#define IMX_SSI_TX_DIV_2 0
180#define IMX_SSI_TX_DIV_PSR 1
181#define IMX_SSI_TX_DIV_PM 2
182#define IMX_SSI_RX_DIV_2 3
183#define IMX_SSI_RX_DIV_PSR 4
184#define IMX_SSI_RX_DIV_PM 5
185
186#define DRV_NAME "imx-ssi"
187
188#include <linux/dmaengine.h>
189#include <mach/dma.h>
190#include "imx-pcm.h"
191
192struct imx_ssi {
193 struct platform_device *ac97_dev;
194
195 struct snd_soc_dai *imx_ac97;
196 struct clk *clk;
197 void __iomem *base;
198 int irq;
199 int fiq_enable;
200 unsigned int offset;
201
202 unsigned int flags;
203
204 void (*ac97_reset) (struct snd_ac97 *ac97);
205 void (*ac97_warm_reset)(struct snd_ac97 *ac97);
206
207 struct imx_pcm_dma_params dma_params_rx;
208 struct imx_pcm_dma_params dma_params_tx;
209
210 int enabled;
211
212 struct platform_device *soc_platform_pdev;
213 struct platform_device *soc_platform_pdev_fiq;
214};
215
216#endif /* _IMX_SSI_H */
diff --git a/sound/soc/imx/mx27vis-aic32x4.c b/sound/soc/imx/mx27vis-aic32x4.c
deleted file mode 100644
index f6d04ad4bb3..00000000000
--- a/sound/soc/imx/mx27vis-aic32x4.c
+++ /dev/null
@@ -1,245 +0,0 @@
1/*
2 * mx27vis-aic32x4.c
3 *
4 * Copyright 2011 Vista Silicon S.L.
5 *
6 * Author: Javier Martin <javier.martin@vista-silicon.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 * MA 02110-1301, USA.
22 */
23
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/device.h>
27#include <linux/i2c.h>
28#include <linux/gpio.h>
29#include <sound/core.h>
30#include <sound/pcm.h>
31#include <sound/soc.h>
32#include <sound/soc-dapm.h>
33#include <sound/tlv.h>
34#include <asm/mach-types.h>
35#include <mach/iomux-mx27.h>
36
37#include "../codecs/tlv320aic32x4.h"
38#include "imx-ssi.h"
39#include "imx-audmux.h"
40
41#define MX27VIS_AMP_GAIN 0
42#define MX27VIS_AMP_MUTE 1
43
44#define MX27VIS_PIN_G0 (GPIO_PORTF + 9)
45#define MX27VIS_PIN_G1 (GPIO_PORTF + 8)
46#define MX27VIS_PIN_SDL (GPIO_PORTE + 5)
47#define MX27VIS_PIN_SDR (GPIO_PORTF + 7)
48
49static int mx27vis_amp_gain;
50static int mx27vis_amp_mute;
51
52static const int mx27vis_amp_pins[] = {
53 MX27VIS_PIN_G0 | GPIO_GPIO | GPIO_OUT,
54 MX27VIS_PIN_G1 | GPIO_GPIO | GPIO_OUT,
55 MX27VIS_PIN_SDL | GPIO_GPIO | GPIO_OUT,
56 MX27VIS_PIN_SDR | GPIO_GPIO | GPIO_OUT,
57};
58
59static int mx27vis_aic32x4_hw_params(struct snd_pcm_substream *substream,
60 struct snd_pcm_hw_params *params)
61{
62 struct snd_soc_pcm_runtime *rtd = substream->private_data;
63 struct snd_soc_dai *codec_dai = rtd->codec_dai;
64 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
65 int ret;
66 u32 dai_format;
67
68 dai_format = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_NB_NF |
69 SND_SOC_DAIFMT_CBM_CFM;
70
71 /* set codec DAI configuration */
72 snd_soc_dai_set_fmt(codec_dai, dai_format);
73
74 /* set cpu DAI configuration */
75 snd_soc_dai_set_fmt(cpu_dai, dai_format);
76
77 ret = snd_soc_dai_set_sysclk(codec_dai, 0,
78 25000000, SND_SOC_CLOCK_OUT);
79 if (ret) {
80 pr_err("%s: failed setting codec sysclk\n", __func__);
81 return ret;
82 }
83
84 ret = snd_soc_dai_set_sysclk(cpu_dai, IMX_SSP_SYS_CLK, 0,
85 SND_SOC_CLOCK_IN);
86 if (ret) {
87 pr_err("can't set CPU system clock IMX_SSP_SYS_CLK\n");
88 return ret;
89 }
90
91 return 0;
92}
93
94static struct snd_soc_ops mx27vis_aic32x4_snd_ops = {
95 .hw_params = mx27vis_aic32x4_hw_params,
96};
97
98static int mx27vis_amp_set(struct snd_kcontrol *kcontrol,
99 struct snd_ctl_elem_value *ucontrol)
100{
101 struct soc_mixer_control *mc =
102 (struct soc_mixer_control *)kcontrol->private_value;
103 int value = ucontrol->value.integer.value[0];
104 unsigned int reg = mc->reg;
105 int max = mc->max;
106
107 if (value > max)
108 return -EINVAL;
109
110 switch (reg) {
111 case MX27VIS_AMP_GAIN:
112 gpio_set_value(MX27VIS_PIN_G0, value & 1);
113 gpio_set_value(MX27VIS_PIN_G1, value >> 1);
114 mx27vis_amp_gain = value;
115 break;
116 case MX27VIS_AMP_MUTE:
117 gpio_set_value(MX27VIS_PIN_SDL, value & 1);
118 gpio_set_value(MX27VIS_PIN_SDR, value >> 1);
119 mx27vis_amp_mute = value;
120 break;
121 }
122 return 0;
123}
124
125static int mx27vis_amp_get(struct snd_kcontrol *kcontrol,
126 struct snd_ctl_elem_value *ucontrol)
127{
128 struct soc_mixer_control *mc =
129 (struct soc_mixer_control *)kcontrol->private_value;
130 unsigned int reg = mc->reg;
131
132 switch (reg) {
133 case MX27VIS_AMP_GAIN:
134 ucontrol->value.integer.value[0] = mx27vis_amp_gain;
135 break;
136 case MX27VIS_AMP_MUTE:
137 ucontrol->value.integer.value[0] = mx27vis_amp_mute;
138 break;
139 }
140 return 0;
141}
142
143/* From 6dB to 24dB in steps of 6dB */
144static const DECLARE_TLV_DB_SCALE(mx27vis_amp_tlv, 600, 600, 0);
145
146static const struct snd_kcontrol_new mx27vis_aic32x4_controls[] = {
147 SOC_DAPM_PIN_SWITCH("External Mic"),
148 SOC_SINGLE_EXT_TLV("LO Ext Boost", MX27VIS_AMP_GAIN, 0, 3, 0,
149 mx27vis_amp_get, mx27vis_amp_set, mx27vis_amp_tlv),
150 SOC_DOUBLE_EXT("LO Ext Mute Switch", MX27VIS_AMP_MUTE, 0, 1, 1, 0,
151 mx27vis_amp_get, mx27vis_amp_set),
152};
153
154static const struct snd_soc_dapm_widget aic32x4_dapm_widgets[] = {
155 SND_SOC_DAPM_MIC("External Mic", NULL),
156};
157
158static const struct snd_soc_dapm_route aic32x4_dapm_routes[] = {
159 {"Mic Bias", NULL, "External Mic"},
160 {"IN1_R", NULL, "Mic Bias"},
161 {"IN2_R", NULL, "Mic Bias"},
162 {"IN3_R", NULL, "Mic Bias"},
163 {"IN1_L", NULL, "Mic Bias"},
164 {"IN2_L", NULL, "Mic Bias"},
165 {"IN3_L", NULL, "Mic Bias"},
166};
167
168static struct snd_soc_dai_link mx27vis_aic32x4_dai = {
169 .name = "tlv320aic32x4",
170 .stream_name = "TLV320AIC32X4",
171 .codec_dai_name = "tlv320aic32x4-hifi",
172 .platform_name = "imx-pcm-audio.0",
173 .codec_name = "tlv320aic32x4.0-0018",
174 .cpu_dai_name = "imx-ssi.0",
175 .ops = &mx27vis_aic32x4_snd_ops,
176};
177
178static struct snd_soc_card mx27vis_aic32x4 = {
179 .name = "visstrim_m10-audio",
180 .owner = THIS_MODULE,
181 .dai_link = &mx27vis_aic32x4_dai,
182 .num_links = 1,
183 .controls = mx27vis_aic32x4_controls,
184 .num_controls = ARRAY_SIZE(mx27vis_aic32x4_controls),
185 .dapm_widgets = aic32x4_dapm_widgets,
186 .num_dapm_widgets = ARRAY_SIZE(aic32x4_dapm_widgets),
187 .dapm_routes = aic32x4_dapm_routes,
188 .num_dapm_routes = ARRAY_SIZE(aic32x4_dapm_routes),
189};
190
191static int __devinit mx27vis_aic32x4_probe(struct platform_device *pdev)
192{
193 int ret;
194
195 mx27vis_aic32x4.dev = &pdev->dev;
196 ret = snd_soc_register_card(&mx27vis_aic32x4);
197 if (ret) {
198 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
199 ret);
200 return ret;
201 }
202
203 /* Connect SSI0 as clock slave to SSI1 external pins */
204 imx_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
205 IMX_AUDMUX_V1_PCR_SYN |
206 IMX_AUDMUX_V1_PCR_TFSDIR |
207 IMX_AUDMUX_V1_PCR_TCLKDIR |
208 IMX_AUDMUX_V1_PCR_TFCSEL(MX27_AUDMUX_PPCR1_SSI_PINS_1) |
209 IMX_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_PPCR1_SSI_PINS_1)
210 );
211 imx_audmux_v1_configure_port(MX27_AUDMUX_PPCR1_SSI_PINS_1,
212 IMX_AUDMUX_V1_PCR_SYN |
213 IMX_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0)
214 );
215
216 ret = mxc_gpio_setup_multiple_pins(mx27vis_amp_pins,
217 ARRAY_SIZE(mx27vis_amp_pins), "MX27VIS_AMP");
218 if (ret)
219 printk(KERN_ERR "ASoC: unable to setup gpios\n");
220
221 return ret;
222}
223
224static int __devexit mx27vis_aic32x4_remove(struct platform_device *pdev)
225{
226 snd_soc_unregister_card(&mx27vis_aic32x4);
227
228 return 0;
229}
230
231static struct platform_driver mx27vis_aic32x4_audio_driver = {
232 .driver = {
233 .name = "mx27vis",
234 .owner = THIS_MODULE,
235 },
236 .probe = mx27vis_aic32x4_probe,
237 .remove = __devexit_p(mx27vis_aic32x4_remove),
238};
239
240module_platform_driver(mx27vis_aic32x4_audio_driver);
241
242MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
243MODULE_DESCRIPTION("ALSA SoC AIC32X4 mx27 visstrim");
244MODULE_LICENSE("GPL");
245MODULE_ALIAS("platform:mx27vis");
diff --git a/sound/soc/imx/phycore-ac97.c b/sound/soc/imx/phycore-ac97.c
deleted file mode 100644
index f8da6dd115e..00000000000
--- a/sound/soc/imx/phycore-ac97.c
+++ /dev/null
@@ -1,125 +0,0 @@
1/*
2 * phycore-ac97.c -- SoC audio for imx_phycore in AC97 mode
3 *
4 * Copyright 2009 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/device.h>
16#include <linux/i2c.h>
17#include <sound/core.h>
18#include <sound/pcm.h>
19#include <sound/soc.h>
20#include <asm/mach-types.h>
21
22#include "imx-audmux.h"
23
24static struct snd_soc_card imx_phycore;
25
26static struct snd_soc_ops imx_phycore_hifi_ops = {
27};
28
29static struct snd_soc_dai_link imx_phycore_dai_ac97[] = {
30 {
31 .name = "HiFi",
32 .stream_name = "HiFi",
33 .codec_dai_name = "wm9712-hifi",
34 .codec_name = "wm9712-codec",
35 .cpu_dai_name = "imx-ssi.0",
36 .platform_name = "imx-fiq-pcm-audio.0",
37 .ops = &imx_phycore_hifi_ops,
38 },
39};
40
41static struct snd_soc_card imx_phycore = {
42 .name = "PhyCORE-ac97-audio",
43 .owner = THIS_MODULE,
44 .dai_link = imx_phycore_dai_ac97,
45 .num_links = ARRAY_SIZE(imx_phycore_dai_ac97),
46};
47
48static struct platform_device *imx_phycore_snd_ac97_device;
49static struct platform_device *imx_phycore_snd_device;
50
51static int __init imx_phycore_init(void)
52{
53 int ret;
54
55 if (machine_is_pca100()) {
56 imx_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
57 IMX_AUDMUX_V1_PCR_SYN | /* 4wire mode */
58 IMX_AUDMUX_V1_PCR_TFCSEL(3) |
59 IMX_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */
60 IMX_AUDMUX_V1_PCR_RXDSEL(3));
61 imx_audmux_v1_configure_port(3,
62 IMX_AUDMUX_V1_PCR_SYN | /* 4wire mode */
63 IMX_AUDMUX_V1_PCR_TFCSEL(0) |
64 IMX_AUDMUX_V1_PCR_TFSDIR |
65 IMX_AUDMUX_V1_PCR_RXDSEL(0));
66 } else if (machine_is_pcm043()) {
67 imx_audmux_v2_configure_port(3,
68 IMX_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
69 IMX_AUDMUX_V2_PTCR_TFSEL(0) |
70 IMX_AUDMUX_V2_PTCR_TFSDIR,
71 IMX_AUDMUX_V2_PDCR_RXDSEL(0));
72 imx_audmux_v2_configure_port(0,
73 IMX_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
74 IMX_AUDMUX_V2_PTCR_TCSEL(3) |
75 IMX_AUDMUX_V2_PTCR_TCLKDIR, /* clock is output */
76 IMX_AUDMUX_V2_PDCR_RXDSEL(3));
77 } else {
78 /* return happy. We might run on a totally different machine */
79 return 0;
80 }
81
82 imx_phycore_snd_ac97_device = platform_device_alloc("soc-audio", -1);
83 if (!imx_phycore_snd_ac97_device)
84 return -ENOMEM;
85
86 platform_set_drvdata(imx_phycore_snd_ac97_device, &imx_phycore);
87 ret = platform_device_add(imx_phycore_snd_ac97_device);
88 if (ret)
89 goto fail1;
90
91 imx_phycore_snd_device = platform_device_alloc("wm9712-codec", -1);
92 if (!imx_phycore_snd_device) {
93 ret = -ENOMEM;
94 goto fail2;
95 }
96 ret = platform_device_add(imx_phycore_snd_device);
97
98 if (ret) {
99 printk(KERN_ERR "ASoC: Platform device allocation failed\n");
100 goto fail3;
101 }
102
103 return 0;
104
105fail3:
106 platform_device_put(imx_phycore_snd_device);
107fail2:
108 platform_device_del(imx_phycore_snd_ac97_device);
109fail1:
110 platform_device_put(imx_phycore_snd_ac97_device);
111 return ret;
112}
113
114static void __exit imx_phycore_exit(void)
115{
116 platform_device_unregister(imx_phycore_snd_device);
117 platform_device_unregister(imx_phycore_snd_ac97_device);
118}
119
120late_initcall(imx_phycore_init);
121module_exit(imx_phycore_exit);
122
123MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
124MODULE_DESCRIPTION("PhyCORE ALSA SoC driver");
125MODULE_LICENSE("GPL");
diff --git a/sound/soc/imx/wm1133-ev1.c b/sound/soc/imx/wm1133-ev1.c
deleted file mode 100644
index fe54a69073e..00000000000
--- a/sound/soc/imx/wm1133-ev1.c
+++ /dev/null
@@ -1,304 +0,0 @@
1/*
2 * wm1133-ev1.c - Audio for WM1133-EV1 on i.MX31ADS
3 *
4 * Copyright (c) 2010 Wolfson Microelectronics plc
5 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
6 *
7 * Based on an earlier driver for the same hardware by Liam Girdwood.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15#include <linux/platform_device.h>
16#include <linux/clk.h>
17#include <linux/module.h>
18#include <sound/core.h>
19#include <sound/jack.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/soc.h>
23
24#include "imx-ssi.h"
25#include "../codecs/wm8350.h"
26#include "imx-audmux.h"
27
28/* There is a silicon mic on the board optionally connected via a solder pad
29 * SP1. Define this to enable it.
30 */
31#undef USE_SIMIC
32
33struct _wm8350_audio {
34 unsigned int channels;
35 snd_pcm_format_t format;
36 unsigned int rate;
37 unsigned int sysclk;
38 unsigned int bclkdiv;
39 unsigned int clkdiv;
40 unsigned int lr_rate;
41};
42
43/* in order of power consumption per rate (lowest first) */
44static const struct _wm8350_audio wm8350_audio[] = {
45 /* 16bit mono modes */
46 {1, SNDRV_PCM_FORMAT_S16_LE, 8000, 12288000 >> 1,
47 WM8350_BCLK_DIV_48, WM8350_DACDIV_3, 16,},
48
49 /* 16 bit stereo modes */
50 {2, SNDRV_PCM_FORMAT_S16_LE, 8000, 12288000,
51 WM8350_BCLK_DIV_48, WM8350_DACDIV_6, 32,},
52 {2, SNDRV_PCM_FORMAT_S16_LE, 16000, 12288000,
53 WM8350_BCLK_DIV_24, WM8350_DACDIV_3, 32,},
54 {2, SNDRV_PCM_FORMAT_S16_LE, 32000, 12288000,
55 WM8350_BCLK_DIV_12, WM8350_DACDIV_1_5, 32,},
56 {2, SNDRV_PCM_FORMAT_S16_LE, 48000, 12288000,
57 WM8350_BCLK_DIV_8, WM8350_DACDIV_1, 32,},
58 {2, SNDRV_PCM_FORMAT_S16_LE, 96000, 24576000,
59 WM8350_BCLK_DIV_8, WM8350_DACDIV_1, 32,},
60 {2, SNDRV_PCM_FORMAT_S16_LE, 11025, 11289600,
61 WM8350_BCLK_DIV_32, WM8350_DACDIV_4, 32,},
62 {2, SNDRV_PCM_FORMAT_S16_LE, 22050, 11289600,
63 WM8350_BCLK_DIV_16, WM8350_DACDIV_2, 32,},
64 {2, SNDRV_PCM_FORMAT_S16_LE, 44100, 11289600,
65 WM8350_BCLK_DIV_8, WM8350_DACDIV_1, 32,},
66 {2, SNDRV_PCM_FORMAT_S16_LE, 88200, 22579200,
67 WM8350_BCLK_DIV_8, WM8350_DACDIV_1, 32,},
68
69 /* 24bit stereo modes */
70 {2, SNDRV_PCM_FORMAT_S24_LE, 48000, 12288000,
71 WM8350_BCLK_DIV_4, WM8350_DACDIV_1, 64,},
72 {2, SNDRV_PCM_FORMAT_S24_LE, 96000, 24576000,
73 WM8350_BCLK_DIV_4, WM8350_DACDIV_1, 64,},
74 {2, SNDRV_PCM_FORMAT_S24_LE, 44100, 11289600,
75 WM8350_BCLK_DIV_4, WM8350_DACDIV_1, 64,},
76 {2, SNDRV_PCM_FORMAT_S24_LE, 88200, 22579200,
77 WM8350_BCLK_DIV_4, WM8350_DACDIV_1, 64,},
78};
79
80static int wm1133_ev1_hw_params(struct snd_pcm_substream *substream,
81 struct snd_pcm_hw_params *params)
82{
83 struct snd_soc_pcm_runtime *rtd = substream->private_data;
84 struct snd_soc_dai *codec_dai = rtd->codec_dai;
85 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
86 int i, found = 0;
87 snd_pcm_format_t format = params_format(params);
88 unsigned int rate = params_rate(params);
89 unsigned int channels = params_channels(params);
90 u32 dai_format;
91
92 /* find the correct audio parameters */
93 for (i = 0; i < ARRAY_SIZE(wm8350_audio); i++) {
94 if (rate == wm8350_audio[i].rate &&
95 format == wm8350_audio[i].format &&
96 channels == wm8350_audio[i].channels) {
97 found = 1;
98 break;
99 }
100 }
101 if (!found)
102 return -EINVAL;
103
104 /* codec FLL input is 14.75 MHz from MCLK */
105 snd_soc_dai_set_pll(codec_dai, 0, 0, 14750000, wm8350_audio[i].sysclk);
106
107 dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
108 SND_SOC_DAIFMT_CBM_CFM;
109
110 /* set codec DAI configuration */
111 snd_soc_dai_set_fmt(codec_dai, dai_format);
112
113 /* set cpu DAI configuration */
114 snd_soc_dai_set_fmt(cpu_dai, dai_format);
115
116 /* TODO: The SSI driver should figure this out for us */
117 switch (channels) {
118 case 2:
119 snd_soc_dai_set_tdm_slot(cpu_dai, 0xffffffc, 0xffffffc, 2, 0);
120 break;
121 case 1:
122 snd_soc_dai_set_tdm_slot(cpu_dai, 0xffffffe, 0xffffffe, 1, 0);
123 break;
124 default:
125 return -EINVAL;
126 }
127
128 /* set MCLK as the codec system clock for DAC and ADC */
129 snd_soc_dai_set_sysclk(codec_dai, WM8350_MCLK_SEL_PLL_MCLK,
130 wm8350_audio[i].sysclk, SND_SOC_CLOCK_IN);
131
132 /* set codec BCLK division for sample rate */
133 snd_soc_dai_set_clkdiv(codec_dai, WM8350_BCLK_CLKDIV,
134 wm8350_audio[i].bclkdiv);
135
136 /* DAI is synchronous and clocked with DAC LRCLK & ADC LRC */
137 snd_soc_dai_set_clkdiv(codec_dai,
138 WM8350_DACLR_CLKDIV, wm8350_audio[i].lr_rate);
139 snd_soc_dai_set_clkdiv(codec_dai,
140 WM8350_ADCLR_CLKDIV, wm8350_audio[i].lr_rate);
141
142 /* now configure DAC and ADC clocks */
143 snd_soc_dai_set_clkdiv(codec_dai,
144 WM8350_DAC_CLKDIV, wm8350_audio[i].clkdiv);
145
146 snd_soc_dai_set_clkdiv(codec_dai,
147 WM8350_ADC_CLKDIV, wm8350_audio[i].clkdiv);
148
149 return 0;
150}
151
152static struct snd_soc_ops wm1133_ev1_ops = {
153 .hw_params = wm1133_ev1_hw_params,
154};
155
156static const struct snd_soc_dapm_widget wm1133_ev1_widgets[] = {
157#ifdef USE_SIMIC
158 SND_SOC_DAPM_MIC("SiMIC", NULL),
159#endif
160 SND_SOC_DAPM_MIC("Mic1 Jack", NULL),
161 SND_SOC_DAPM_MIC("Mic2 Jack", NULL),
162 SND_SOC_DAPM_LINE("Line In Jack", NULL),
163 SND_SOC_DAPM_LINE("Line Out Jack", NULL),
164 SND_SOC_DAPM_HP("Headphone Jack", NULL),
165};
166
167/* imx32ads soc_card audio map */
168static const struct snd_soc_dapm_route wm1133_ev1_map[] = {
169
170#ifdef USE_SIMIC
171 /* SiMIC --> IN1LN (with automatic bias) via SP1 */
172 { "IN1LN", NULL, "Mic Bias" },
173 { "Mic Bias", NULL, "SiMIC" },
174#endif
175
176 /* Mic 1 Jack --> IN1LN and IN1LP (with automatic bias) */
177 { "IN1LN", NULL, "Mic Bias" },
178 { "IN1LP", NULL, "Mic1 Jack" },
179 { "Mic Bias", NULL, "Mic1 Jack" },
180
181 /* Mic 2 Jack --> IN1RN and IN1RP (with automatic bias) */
182 { "IN1RN", NULL, "Mic Bias" },
183 { "IN1RP", NULL, "Mic2 Jack" },
184 { "Mic Bias", NULL, "Mic2 Jack" },
185
186 /* Line in Jack --> AUX (L+R) */
187 { "IN3R", NULL, "Line In Jack" },
188 { "IN3L", NULL, "Line In Jack" },
189
190 /* Out1 --> Headphone Jack */
191 { "Headphone Jack", NULL, "OUT1R" },
192 { "Headphone Jack", NULL, "OUT1L" },
193
194 /* Out1 --> Line Out Jack */
195 { "Line Out Jack", NULL, "OUT2R" },
196 { "Line Out Jack", NULL, "OUT2L" },
197};
198
199static struct snd_soc_jack hp_jack;
200
201static struct snd_soc_jack_pin hp_jack_pins[] = {
202 { .pin = "Headphone Jack", .mask = SND_JACK_HEADPHONE },
203};
204
205static struct snd_soc_jack mic_jack;
206
207static struct snd_soc_jack_pin mic_jack_pins[] = {
208 { .pin = "Mic1 Jack", .mask = SND_JACK_MICROPHONE },
209 { .pin = "Mic2 Jack", .mask = SND_JACK_MICROPHONE },
210};
211
212static int wm1133_ev1_init(struct snd_soc_pcm_runtime *rtd)
213{
214 struct snd_soc_codec *codec = rtd->codec;
215 struct snd_soc_dapm_context *dapm = &codec->dapm;
216
217 snd_soc_dapm_new_controls(dapm, wm1133_ev1_widgets,
218 ARRAY_SIZE(wm1133_ev1_widgets));
219
220 snd_soc_dapm_add_routes(dapm, wm1133_ev1_map,
221 ARRAY_SIZE(wm1133_ev1_map));
222
223 /* Headphone jack detection */
224 snd_soc_jack_new(codec, "Headphone", SND_JACK_HEADPHONE, &hp_jack);
225 snd_soc_jack_add_pins(&hp_jack, ARRAY_SIZE(hp_jack_pins),
226 hp_jack_pins);
227 wm8350_hp_jack_detect(codec, WM8350_JDR, &hp_jack, SND_JACK_HEADPHONE);
228
229 /* Microphone jack detection */
230 snd_soc_jack_new(codec, "Microphone",
231 SND_JACK_MICROPHONE | SND_JACK_BTN_0, &mic_jack);
232 snd_soc_jack_add_pins(&mic_jack, ARRAY_SIZE(mic_jack_pins),
233 mic_jack_pins);
234 wm8350_mic_jack_detect(codec, &mic_jack, SND_JACK_MICROPHONE,
235 SND_JACK_BTN_0);
236
237 snd_soc_dapm_force_enable_pin(dapm, "Mic Bias");
238
239 return 0;
240}
241
242
243static struct snd_soc_dai_link wm1133_ev1_dai = {
244 .name = "WM1133-EV1",
245 .stream_name = "Audio",
246 .cpu_dai_name = "imx-ssi.0",
247 .codec_dai_name = "wm8350-hifi",
248 .platform_name = "imx-fiq-pcm-audio.0",
249 .codec_name = "wm8350-codec.0-0x1a",
250 .init = wm1133_ev1_init,
251 .ops = &wm1133_ev1_ops,
252 .symmetric_rates = 1,
253};
254
255static struct snd_soc_card wm1133_ev1 = {
256 .name = "WM1133-EV1",
257 .owner = THIS_MODULE,
258 .dai_link = &wm1133_ev1_dai,
259 .num_links = 1,
260};
261
262static struct platform_device *wm1133_ev1_snd_device;
263
264static int __init wm1133_ev1_audio_init(void)
265{
266 int ret;
267 unsigned int ptcr, pdcr;
268
269 /* SSI0 mastered by port 5 */
270 ptcr = IMX_AUDMUX_V2_PTCR_SYN |
271 IMX_AUDMUX_V2_PTCR_TFSDIR |
272 IMX_AUDMUX_V2_PTCR_TFSEL(MX31_AUDMUX_PORT5_SSI_PINS_5) |
273 IMX_AUDMUX_V2_PTCR_TCLKDIR |
274 IMX_AUDMUX_V2_PTCR_TCSEL(MX31_AUDMUX_PORT5_SSI_PINS_5);
275 pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT5_SSI_PINS_5);
276 imx_audmux_v2_configure_port(MX31_AUDMUX_PORT1_SSI0, ptcr, pdcr);
277
278 ptcr = IMX_AUDMUX_V2_PTCR_SYN;
279 pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT1_SSI0);
280 imx_audmux_v2_configure_port(MX31_AUDMUX_PORT5_SSI_PINS_5, ptcr, pdcr);
281
282 wm1133_ev1_snd_device = platform_device_alloc("soc-audio", -1);
283 if (!wm1133_ev1_snd_device)
284 return -ENOMEM;
285
286 platform_set_drvdata(wm1133_ev1_snd_device, &wm1133_ev1);
287 ret = platform_device_add(wm1133_ev1_snd_device);
288
289 if (ret)
290 platform_device_put(wm1133_ev1_snd_device);
291
292 return ret;
293}
294module_init(wm1133_ev1_audio_init);
295
296static void __exit wm1133_ev1_audio_exit(void)
297{
298 platform_device_unregister(wm1133_ev1_snd_device);
299}
300module_exit(wm1133_ev1_audio_exit);
301
302MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
303MODULE_DESCRIPTION("Audio for WM1133-EV1 on i.MX31ADS");
304MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-19 01:33:47 -0400