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authorJarkko Nikula <jhnikula@gmail.com>2010-08-27 09:56:49 -0400
committerLiam Girdwood <lrg@slimlogic.co.uk>2010-08-28 05:57:58 -0400
commitc3b79e05b4d9ab2e7c3ba281261ea87ab5b71a92 (patch)
tree33e5e39f866365eb4cb90faee09ccd32ad35c72d /sound/soc/codecs
parentb2eaac203a04362e9ccae7ba36aef0a9f2486547 (diff)
ASoC: tlv320aic3x: Reimplement output mixers
It turned out that the output mixers and their routes were misdefined: They are not mixing output pins to internal signals but opposite. This has worked for direct left-to-left and right-to-right routes since for those there are complete routes. For swapped left-to-right and right-to-left routes this is not working since there are no routes defined between them. Another consequence is that those misdefined mixers are incorrectly routed to several output pins leading unnecessary pin powerings even if there is no route active to them. Fix these by reimplementing the output mixers and routes as they are in hardware. For completeness add also a few missing links between internal signals and outputs. Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat (limited to 'sound/soc/codecs')
-rw-r--r--sound/soc/codecs/tlv320aic3x.c394
-rw-r--r--sound/soc/codecs/tlv320aic3x.h8
2 files changed, 195 insertions, 207 deletions
diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c
index 6e4ed79d5eb..0a3b98c097b 100644
--- a/sound/soc/codecs/tlv320aic3x.c
+++ b/sound/soc/codecs/tlv320aic3x.c
@@ -389,22 +389,74 @@ SOC_DAPM_ENUM("Route", aic3x_enum[LHPCOM_ENUM]);
389static const struct snd_kcontrol_new aic3x_right_hpcom_mux_controls = 389static const struct snd_kcontrol_new aic3x_right_hpcom_mux_controls =
390SOC_DAPM_ENUM("Route", aic3x_enum[RHPCOM_ENUM]); 390SOC_DAPM_ENUM("Route", aic3x_enum[RHPCOM_ENUM]);
391 391
392/* Left DAC_L1 Mixer */ 392/* Left Line Mixer */
393static const struct snd_kcontrol_new aic3x_left_dac_mixer_controls[] = { 393static const struct snd_kcontrol_new aic3x_left_line_mixer_controls[] = {
394 SOC_DAPM_SINGLE("LineL Switch", DACL1_2_LLOPM_VOL, 7, 1, 0), 394 SOC_DAPM_SINGLE("Line2L Bypass Switch", LINE2L_2_LLOPM_VOL, 7, 1, 0),
395 SOC_DAPM_SINGLE("LineR Switch", DACL1_2_RLOPM_VOL, 7, 1, 0), 395 SOC_DAPM_SINGLE("PGAL Bypass Switch", PGAL_2_LLOPM_VOL, 7, 1, 0),
396 SOC_DAPM_SINGLE("Mono Switch", DACL1_2_MONOLOPM_VOL, 7, 1, 0), 396 SOC_DAPM_SINGLE("DACL1 Switch", DACL1_2_LLOPM_VOL, 7, 1, 0),
397 SOC_DAPM_SINGLE("HP Switch", DACL1_2_HPLOUT_VOL, 7, 1, 0), 397 SOC_DAPM_SINGLE("Line2R Bypass Switch", LINE2R_2_LLOPM_VOL, 7, 1, 0),
398 SOC_DAPM_SINGLE("HPCOM Switch", DACL1_2_HPLCOM_VOL, 7, 1, 0), 398 SOC_DAPM_SINGLE("PGAR Bypass Switch", PGAR_2_LLOPM_VOL, 7, 1, 0),
399 SOC_DAPM_SINGLE("DACR1 Switch", DACR1_2_LLOPM_VOL, 7, 1, 0),
399}; 400};
400 401
401/* Right DAC_R1 Mixer */ 402/* Right Line Mixer */
402static const struct snd_kcontrol_new aic3x_right_dac_mixer_controls[] = { 403static const struct snd_kcontrol_new aic3x_right_line_mixer_controls[] = {
403 SOC_DAPM_SINGLE("LineL Switch", DACR1_2_LLOPM_VOL, 7, 1, 0), 404 SOC_DAPM_SINGLE("Line2L Bypass Switch", LINE2L_2_RLOPM_VOL, 7, 1, 0),
404 SOC_DAPM_SINGLE("LineR Switch", DACR1_2_RLOPM_VOL, 7, 1, 0), 405 SOC_DAPM_SINGLE("PGAL Bypass Switch", PGAL_2_RLOPM_VOL, 7, 1, 0),
405 SOC_DAPM_SINGLE("Mono Switch", DACR1_2_MONOLOPM_VOL, 7, 1, 0), 406 SOC_DAPM_SINGLE("DACL1 Switch", DACL1_2_RLOPM_VOL, 7, 1, 0),
406 SOC_DAPM_SINGLE("HP Switch", DACR1_2_HPROUT_VOL, 7, 1, 0), 407 SOC_DAPM_SINGLE("Line2R Bypass Switch", LINE2R_2_RLOPM_VOL, 7, 1, 0),
407 SOC_DAPM_SINGLE("HPCOM Switch", DACR1_2_HPRCOM_VOL, 7, 1, 0), 408 SOC_DAPM_SINGLE("PGAR Bypass Switch", PGAR_2_RLOPM_VOL, 7, 1, 0),
409 SOC_DAPM_SINGLE("DACR1 Switch", DACR1_2_RLOPM_VOL, 7, 1, 0),
410};
411
412/* Mono Mixer */
413static const struct snd_kcontrol_new aic3x_mono_mixer_controls[] = {
414 SOC_DAPM_SINGLE("Line2L Bypass Switch", LINE2L_2_MONOLOPM_VOL, 7, 1, 0),
415 SOC_DAPM_SINGLE("PGAL Bypass Switch", PGAL_2_MONOLOPM_VOL, 7, 1, 0),
416 SOC_DAPM_SINGLE("DACL1 Switch", DACL1_2_MONOLOPM_VOL, 7, 1, 0),
417 SOC_DAPM_SINGLE("Line2R Bypass Switch", LINE2R_2_MONOLOPM_VOL, 7, 1, 0),
418 SOC_DAPM_SINGLE("PGAR Bypass Switch", PGAR_2_MONOLOPM_VOL, 7, 1, 0),
419 SOC_DAPM_SINGLE("DACR1 Switch", DACR1_2_MONOLOPM_VOL, 7, 1, 0),
420};
421
422/* Left HP Mixer */
423static const struct snd_kcontrol_new aic3x_left_hp_mixer_controls[] = {
424 SOC_DAPM_SINGLE("Line2L Bypass Switch", LINE2L_2_HPLOUT_VOL, 7, 1, 0),
425 SOC_DAPM_SINGLE("PGAL Bypass Switch", PGAL_2_HPLOUT_VOL, 7, 1, 0),
426 SOC_DAPM_SINGLE("DACL1 Switch", DACL1_2_HPLOUT_VOL, 7, 1, 0),
427 SOC_DAPM_SINGLE("Line2R Bypass Switch", LINE2R_2_HPLOUT_VOL, 7, 1, 0),
428 SOC_DAPM_SINGLE("PGAR Bypass Switch", PGAR_2_HPLOUT_VOL, 7, 1, 0),
429 SOC_DAPM_SINGLE("DACR1 Switch", DACR1_2_HPLOUT_VOL, 7, 1, 0),
430};
431
432/* Right HP Mixer */
433static const struct snd_kcontrol_new aic3x_right_hp_mixer_controls[] = {
434 SOC_DAPM_SINGLE("Line2L Bypass Switch", LINE2L_2_HPROUT_VOL, 7, 1, 0),
435 SOC_DAPM_SINGLE("PGAL Bypass Switch", PGAL_2_HPROUT_VOL, 7, 1, 0),
436 SOC_DAPM_SINGLE("DACL1 Switch", DACL1_2_HPROUT_VOL, 7, 1, 0),
437 SOC_DAPM_SINGLE("Line2R Bypass Switch", LINE2R_2_HPROUT_VOL, 7, 1, 0),
438 SOC_DAPM_SINGLE("PGAR Bypass Switch", PGAR_2_HPROUT_VOL, 7, 1, 0),
439 SOC_DAPM_SINGLE("DACR1 Switch", DACR1_2_HPROUT_VOL, 7, 1, 0),
440};
441
442/* Left HPCOM Mixer */
443static const struct snd_kcontrol_new aic3x_left_hpcom_mixer_controls[] = {
444 SOC_DAPM_SINGLE("Line2L Bypass Switch", LINE2L_2_HPLCOM_VOL, 7, 1, 0),
445 SOC_DAPM_SINGLE("PGAL Bypass Switch", PGAL_2_HPLCOM_VOL, 7, 1, 0),
446 SOC_DAPM_SINGLE("DACL1 Switch", DACL1_2_HPLCOM_VOL, 7, 1, 0),
447 SOC_DAPM_SINGLE("Line2R Bypass Switch", LINE2R_2_HPLCOM_VOL, 7, 1, 0),
448 SOC_DAPM_SINGLE("PGAR Bypass Switch", PGAR_2_HPLCOM_VOL, 7, 1, 0),
449 SOC_DAPM_SINGLE("DACR1 Switch", DACR1_2_HPLCOM_VOL, 7, 1, 0),
450};
451
452/* Right HPCOM Mixer */
453static const struct snd_kcontrol_new aic3x_right_hpcom_mixer_controls[] = {
454 SOC_DAPM_SINGLE("Line2L Bypass Switch", LINE2L_2_HPRCOM_VOL, 7, 1, 0),
455 SOC_DAPM_SINGLE("PGAL Bypass Switch", PGAL_2_HPRCOM_VOL, 7, 1, 0),
456 SOC_DAPM_SINGLE("DACL1 Switch", DACL1_2_HPRCOM_VOL, 7, 1, 0),
457 SOC_DAPM_SINGLE("Line2R Bypass Switch", LINE2R_2_HPRCOM_VOL, 7, 1, 0),
458 SOC_DAPM_SINGLE("PGAR Bypass Switch", PGAR_2_HPRCOM_VOL, 7, 1, 0),
459 SOC_DAPM_SINGLE("DACR1 Switch", DACR1_2_HPRCOM_VOL, 7, 1, 0),
408}; 460};
409 461
410/* Left PGA Mixer */ 462/* Left PGA Mixer */
@@ -441,54 +493,11 @@ SOC_DAPM_ENUM("Route", aic3x_enum[LINE2L_ENUM]);
441static const struct snd_kcontrol_new aic3x_right_line2_mux_controls = 493static const struct snd_kcontrol_new aic3x_right_line2_mux_controls =
442SOC_DAPM_ENUM("Route", aic3x_enum[LINE2R_ENUM]); 494SOC_DAPM_ENUM("Route", aic3x_enum[LINE2R_ENUM]);
443 495
444/* Left PGA Bypass Mixer */
445static const struct snd_kcontrol_new aic3x_left_pga_bp_mixer_controls[] = {
446 SOC_DAPM_SINGLE("LineL Switch", PGAL_2_LLOPM_VOL, 7, 1, 0),
447 SOC_DAPM_SINGLE("LineR Switch", PGAL_2_RLOPM_VOL, 7, 1, 0),
448 SOC_DAPM_SINGLE("Mono Switch", PGAL_2_MONOLOPM_VOL, 7, 1, 0),
449 SOC_DAPM_SINGLE("HPL Switch", PGAL_2_HPLOUT_VOL, 7, 1, 0),
450 SOC_DAPM_SINGLE("HPR Switch", PGAL_2_HPROUT_VOL, 7, 1, 0),
451 SOC_DAPM_SINGLE("HPLCOM Switch", PGAL_2_HPLCOM_VOL, 7, 1, 0),
452 SOC_DAPM_SINGLE("HPRCOM Switch", PGAL_2_HPRCOM_VOL, 7, 1, 0),
453};
454
455/* Right PGA Bypass Mixer */
456static const struct snd_kcontrol_new aic3x_right_pga_bp_mixer_controls[] = {
457 SOC_DAPM_SINGLE("LineL Switch", PGAR_2_LLOPM_VOL, 7, 1, 0),
458 SOC_DAPM_SINGLE("LineR Switch", PGAR_2_RLOPM_VOL, 7, 1, 0),
459 SOC_DAPM_SINGLE("Mono Switch", PGAR_2_MONOLOPM_VOL, 7, 1, 0),
460 SOC_DAPM_SINGLE("HPL Switch", PGAR_2_HPLOUT_VOL, 7, 1, 0),
461 SOC_DAPM_SINGLE("HPR Switch", PGAR_2_HPROUT_VOL, 7, 1, 0),
462 SOC_DAPM_SINGLE("HPLCOM Switch", PGAR_2_HPLCOM_VOL, 7, 1, 0),
463 SOC_DAPM_SINGLE("HPRCOM Switch", PGAR_2_HPRCOM_VOL, 7, 1, 0),
464};
465
466/* Left Line2 Bypass Mixer */
467static const struct snd_kcontrol_new aic3x_left_line2_bp_mixer_controls[] = {
468 SOC_DAPM_SINGLE("LineL Switch", LINE2L_2_LLOPM_VOL, 7, 1, 0),
469 SOC_DAPM_SINGLE("LineR Switch", LINE2L_2_RLOPM_VOL, 7, 1, 0),
470 SOC_DAPM_SINGLE("Mono Switch", LINE2L_2_MONOLOPM_VOL, 7, 1, 0),
471 SOC_DAPM_SINGLE("HP Switch", LINE2L_2_HPLOUT_VOL, 7, 1, 0),
472 SOC_DAPM_SINGLE("HPLCOM Switch", LINE2L_2_HPLCOM_VOL, 7, 1, 0),
473};
474
475/* Right Line2 Bypass Mixer */
476static const struct snd_kcontrol_new aic3x_right_line2_bp_mixer_controls[] = {
477 SOC_DAPM_SINGLE("LineL Switch", LINE2R_2_LLOPM_VOL, 7, 1, 0),
478 SOC_DAPM_SINGLE("LineR Switch", LINE2R_2_RLOPM_VOL, 7, 1, 0),
479 SOC_DAPM_SINGLE("Mono Switch", LINE2R_2_MONOLOPM_VOL, 7, 1, 0),
480 SOC_DAPM_SINGLE("HP Switch", LINE2R_2_HPROUT_VOL, 7, 1, 0),
481 SOC_DAPM_SINGLE("HPRCOM Switch", LINE2R_2_HPRCOM_VOL, 7, 1, 0),
482};
483
484static const struct snd_soc_dapm_widget aic3x_dapm_widgets[] = { 496static const struct snd_soc_dapm_widget aic3x_dapm_widgets[] = {
485 /* Left DAC to Left Outputs */ 497 /* Left DAC to Left Outputs */
486 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", DAC_PWR, 7, 0), 498 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", DAC_PWR, 7, 0),
487 SND_SOC_DAPM_MUX("Left DAC Mux", SND_SOC_NOPM, 0, 0, 499 SND_SOC_DAPM_MUX("Left DAC Mux", SND_SOC_NOPM, 0, 0,
488 &aic3x_left_dac_mux_controls), 500 &aic3x_left_dac_mux_controls),
489 SND_SOC_DAPM_MIXER("Left DAC_L1 Mixer", SND_SOC_NOPM, 0, 0,
490 &aic3x_left_dac_mixer_controls[0],
491 ARRAY_SIZE(aic3x_left_dac_mixer_controls)),
492 SND_SOC_DAPM_MUX("Left HPCOM Mux", SND_SOC_NOPM, 0, 0, 501 SND_SOC_DAPM_MUX("Left HPCOM Mux", SND_SOC_NOPM, 0, 0,
493 &aic3x_left_hpcom_mux_controls), 502 &aic3x_left_hpcom_mux_controls),
494 SND_SOC_DAPM_PGA("Left Line Out", LLOPM_CTRL, 0, 0, NULL, 0), 503 SND_SOC_DAPM_PGA("Left Line Out", LLOPM_CTRL, 0, 0, NULL, 0),
@@ -499,9 +508,6 @@ static const struct snd_soc_dapm_widget aic3x_dapm_widgets[] = {
499 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", DAC_PWR, 6, 0), 508 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", DAC_PWR, 6, 0),
500 SND_SOC_DAPM_MUX("Right DAC Mux", SND_SOC_NOPM, 0, 0, 509 SND_SOC_DAPM_MUX("Right DAC Mux", SND_SOC_NOPM, 0, 0,
501 &aic3x_right_dac_mux_controls), 510 &aic3x_right_dac_mux_controls),
502 SND_SOC_DAPM_MIXER("Right DAC_R1 Mixer", SND_SOC_NOPM, 0, 0,
503 &aic3x_right_dac_mixer_controls[0],
504 ARRAY_SIZE(aic3x_right_dac_mixer_controls)),
505 SND_SOC_DAPM_MUX("Right HPCOM Mux", SND_SOC_NOPM, 0, 0, 511 SND_SOC_DAPM_MUX("Right HPCOM Mux", SND_SOC_NOPM, 0, 0,
506 &aic3x_right_hpcom_mux_controls), 512 &aic3x_right_hpcom_mux_controls),
507 SND_SOC_DAPM_PGA("Right Line Out", RLOPM_CTRL, 0, 0, NULL, 0), 513 SND_SOC_DAPM_PGA("Right Line Out", RLOPM_CTRL, 0, 0, NULL, 0),
@@ -565,25 +571,28 @@ static const struct snd_soc_dapm_widget aic3x_dapm_widgets[] = {
565 SND_SOC_DAPM_REG(snd_soc_dapm_micbias, "Mic Bias AVDD", 571 SND_SOC_DAPM_REG(snd_soc_dapm_micbias, "Mic Bias AVDD",
566 MICBIAS_CTRL, 6, 3, 3, 0), 572 MICBIAS_CTRL, 6, 3, 3, 0),
567 573
568 /* Left PGA to Left Output bypass */ 574 /* Output mixers */
569 SND_SOC_DAPM_MIXER("Left PGA Bypass Mixer", SND_SOC_NOPM, 0, 0, 575 SND_SOC_DAPM_MIXER("Left Line Mixer", SND_SOC_NOPM, 0, 0,
570 &aic3x_left_pga_bp_mixer_controls[0], 576 &aic3x_left_line_mixer_controls[0],
571 ARRAY_SIZE(aic3x_left_pga_bp_mixer_controls)), 577 ARRAY_SIZE(aic3x_left_line_mixer_controls)),
572 578 SND_SOC_DAPM_MIXER("Right Line Mixer", SND_SOC_NOPM, 0, 0,
573 /* Right PGA to Right Output bypass */ 579 &aic3x_right_line_mixer_controls[0],
574 SND_SOC_DAPM_MIXER("Right PGA Bypass Mixer", SND_SOC_NOPM, 0, 0, 580 ARRAY_SIZE(aic3x_right_line_mixer_controls)),
575 &aic3x_right_pga_bp_mixer_controls[0], 581 SND_SOC_DAPM_MIXER("Mono Mixer", SND_SOC_NOPM, 0, 0,
576 ARRAY_SIZE(aic3x_right_pga_bp_mixer_controls)), 582 &aic3x_mono_mixer_controls[0],
577 583 ARRAY_SIZE(aic3x_mono_mixer_controls)),
578 /* Left Line2 to Left Output bypass */ 584 SND_SOC_DAPM_MIXER("Left HP Mixer", SND_SOC_NOPM, 0, 0,
579 SND_SOC_DAPM_MIXER("Left Line2 Bypass Mixer", SND_SOC_NOPM, 0, 0, 585 &aic3x_left_hp_mixer_controls[0],
580 &aic3x_left_line2_bp_mixer_controls[0], 586 ARRAY_SIZE(aic3x_left_hp_mixer_controls)),
581 ARRAY_SIZE(aic3x_left_line2_bp_mixer_controls)), 587 SND_SOC_DAPM_MIXER("Right HP Mixer", SND_SOC_NOPM, 0, 0,
582 588 &aic3x_right_hp_mixer_controls[0],
583 /* Right Line2 to Right Output bypass */ 589 ARRAY_SIZE(aic3x_right_hp_mixer_controls)),
584 SND_SOC_DAPM_MIXER("Right Line2 Bypass Mixer", SND_SOC_NOPM, 0, 0, 590 SND_SOC_DAPM_MIXER("Left HPCOM Mixer", SND_SOC_NOPM, 0, 0,
585 &aic3x_right_line2_bp_mixer_controls[0], 591 &aic3x_left_hpcom_mixer_controls[0],
586 ARRAY_SIZE(aic3x_right_line2_bp_mixer_controls)), 592 ARRAY_SIZE(aic3x_left_hpcom_mixer_controls)),
593 SND_SOC_DAPM_MIXER("Right HPCOM Mixer", SND_SOC_NOPM, 0, 0,
594 &aic3x_right_hpcom_mixer_controls[0],
595 ARRAY_SIZE(aic3x_right_hpcom_mixer_controls)),
587 596
588 SND_SOC_DAPM_OUTPUT("LLOUT"), 597 SND_SOC_DAPM_OUTPUT("LLOUT"),
589 SND_SOC_DAPM_OUTPUT("RLOUT"), 598 SND_SOC_DAPM_OUTPUT("RLOUT"),
@@ -611,66 +620,6 @@ static const struct snd_soc_dapm_widget aic3007_dapm_widgets[] = {
611}; 620};
612 621
613static const struct snd_soc_dapm_route intercon[] = { 622static const struct snd_soc_dapm_route intercon[] = {
614 /* Left Output */
615 {"Left DAC Mux", "DAC_L1", "Left DAC"},
616 {"Left DAC Mux", "DAC_L2", "Left DAC"},
617 {"Left DAC Mux", "DAC_L3", "Left DAC"},
618
619 {"Left DAC_L1 Mixer", "LineL Switch", "Left DAC Mux"},
620 {"Left DAC_L1 Mixer", "LineR Switch", "Left DAC Mux"},
621 {"Left DAC_L1 Mixer", "Mono Switch", "Left DAC Mux"},
622 {"Left DAC_L1 Mixer", "HP Switch", "Left DAC Mux"},
623 {"Left DAC_L1 Mixer", "HPCOM Switch", "Left DAC Mux"},
624 {"Left Line Out", NULL, "Left DAC Mux"},
625 {"Left HP Out", NULL, "Left DAC Mux"},
626
627 {"Left HPCOM Mux", "differential of HPLOUT", "Left DAC_L1 Mixer"},
628 {"Left HPCOM Mux", "constant VCM", "Left DAC_L1 Mixer"},
629 {"Left HPCOM Mux", "single-ended", "Left DAC_L1 Mixer"},
630
631 {"Left Line Out", NULL, "Left DAC_L1 Mixer"},
632 {"Mono Out", NULL, "Left DAC_L1 Mixer"},
633 {"Left HP Out", NULL, "Left DAC_L1 Mixer"},
634 {"Left HP Com", NULL, "Left HPCOM Mux"},
635
636 {"LLOUT", NULL, "Left Line Out"},
637 {"LLOUT", NULL, "Left Line Out"},
638 {"HPLOUT", NULL, "Left HP Out"},
639 {"HPLCOM", NULL, "Left HP Com"},
640
641 /* Right Output */
642 {"Right DAC Mux", "DAC_R1", "Right DAC"},
643 {"Right DAC Mux", "DAC_R2", "Right DAC"},
644 {"Right DAC Mux", "DAC_R3", "Right DAC"},
645
646 {"Right DAC_R1 Mixer", "LineL Switch", "Right DAC Mux"},
647 {"Right DAC_R1 Mixer", "LineR Switch", "Right DAC Mux"},
648 {"Right DAC_R1 Mixer", "Mono Switch", "Right DAC Mux"},
649 {"Right DAC_R1 Mixer", "HP Switch", "Right DAC Mux"},
650 {"Right DAC_R1 Mixer", "HPCOM Switch", "Right DAC Mux"},
651 {"Right Line Out", NULL, "Right DAC Mux"},
652 {"Right HP Out", NULL, "Right DAC Mux"},
653
654 {"Right HPCOM Mux", "differential of HPROUT", "Right DAC_R1 Mixer"},
655 {"Right HPCOM Mux", "constant VCM", "Right DAC_R1 Mixer"},
656 {"Right HPCOM Mux", "single-ended", "Right DAC_R1 Mixer"},
657 {"Right HPCOM Mux", "differential of HPLCOM", "Right DAC_R1 Mixer"},
658 {"Right HPCOM Mux", "external feedback", "Right DAC_R1 Mixer"},
659
660 {"Right Line Out", NULL, "Right DAC_R1 Mixer"},
661 {"Mono Out", NULL, "Right DAC_R1 Mixer"},
662 {"Right HP Out", NULL, "Right DAC_R1 Mixer"},
663 {"Right HP Com", NULL, "Right HPCOM Mux"},
664
665 {"RLOUT", NULL, "Right Line Out"},
666 {"RLOUT", NULL, "Right Line Out"},
667 {"HPROUT", NULL, "Right HP Out"},
668 {"HPRCOM", NULL, "Right HP Com"},
669
670 /* Mono Output */
671 {"MONO_LOUT", NULL, "Mono Out"},
672 {"MONO_LOUT", NULL, "Mono Out"},
673
674 /* Left Input */ 623 /* Left Input */
675 {"Left Line1L Mux", "single-ended", "LINE1L"}, 624 {"Left Line1L Mux", "single-ended", "LINE1L"},
676 {"Left Line1L Mux", "differential", "LINE1L"}, 625 {"Left Line1L Mux", "differential", "LINE1L"},
@@ -703,74 +652,6 @@ static const struct snd_soc_dapm_route intercon[] = {
703 {"Right ADC", NULL, "Right PGA Mixer"}, 652 {"Right ADC", NULL, "Right PGA Mixer"},
704 {"Right ADC", NULL, "GPIO1 dmic modclk"}, 653 {"Right ADC", NULL, "GPIO1 dmic modclk"},
705 654
706 /* Left PGA Bypass */
707 {"Left PGA Bypass Mixer", "LineL Switch", "Left PGA Mixer"},
708 {"Left PGA Bypass Mixer", "LineR Switch", "Left PGA Mixer"},
709 {"Left PGA Bypass Mixer", "Mono Switch", "Left PGA Mixer"},
710 {"Left PGA Bypass Mixer", "HPL Switch", "Left PGA Mixer"},
711 {"Left PGA Bypass Mixer", "HPR Switch", "Left PGA Mixer"},
712 {"Left PGA Bypass Mixer", "HPLCOM Switch", "Left PGA Mixer"},
713 {"Left PGA Bypass Mixer", "HPRCOM Switch", "Left PGA Mixer"},
714
715 {"Left HPCOM Mux", "differential of HPLOUT", "Left PGA Bypass Mixer"},
716 {"Left HPCOM Mux", "constant VCM", "Left PGA Bypass Mixer"},
717 {"Left HPCOM Mux", "single-ended", "Left PGA Bypass Mixer"},
718
719 {"Left Line Out", NULL, "Left PGA Bypass Mixer"},
720 {"Mono Out", NULL, "Left PGA Bypass Mixer"},
721 {"Left HP Out", NULL, "Left PGA Bypass Mixer"},
722
723 /* Right PGA Bypass */
724 {"Right PGA Bypass Mixer", "LineL Switch", "Right PGA Mixer"},
725 {"Right PGA Bypass Mixer", "LineR Switch", "Right PGA Mixer"},
726 {"Right PGA Bypass Mixer", "Mono Switch", "Right PGA Mixer"},
727 {"Right PGA Bypass Mixer", "HPL Switch", "Right PGA Mixer"},
728 {"Right PGA Bypass Mixer", "HPR Switch", "Right PGA Mixer"},
729 {"Right PGA Bypass Mixer", "HPLCOM Switch", "Right PGA Mixer"},
730 {"Right PGA Bypass Mixer", "HPRCOM Switch", "Right PGA Mixer"},
731
732 {"Right HPCOM Mux", "differential of HPROUT", "Right PGA Bypass Mixer"},
733 {"Right HPCOM Mux", "constant VCM", "Right PGA Bypass Mixer"},
734 {"Right HPCOM Mux", "single-ended", "Right PGA Bypass Mixer"},
735 {"Right HPCOM Mux", "differential of HPLCOM", "Right PGA Bypass Mixer"},
736 {"Right HPCOM Mux", "external feedback", "Right PGA Bypass Mixer"},
737
738 {"Right Line Out", NULL, "Right PGA Bypass Mixer"},
739 {"Mono Out", NULL, "Right PGA Bypass Mixer"},
740 {"Right HP Out", NULL, "Right PGA Bypass Mixer"},
741
742 /* Left Line2 Bypass */
743 {"Left Line2 Bypass Mixer", "LineL Switch", "Left Line2L Mux"},
744 {"Left Line2 Bypass Mixer", "LineR Switch", "Left Line2L Mux"},
745 {"Left Line2 Bypass Mixer", "Mono Switch", "Left Line2L Mux"},
746 {"Left Line2 Bypass Mixer", "HP Switch", "Left Line2L Mux"},
747 {"Left Line2 Bypass Mixer", "HPLCOM Switch", "Left Line2L Mux"},
748
749 {"Left HPCOM Mux", "differential of HPLOUT", "Left Line2 Bypass Mixer"},
750 {"Left HPCOM Mux", "constant VCM", "Left Line2 Bypass Mixer"},
751 {"Left HPCOM Mux", "single-ended", "Left Line2 Bypass Mixer"},
752
753 {"Left Line Out", NULL, "Left Line2 Bypass Mixer"},
754 {"Mono Out", NULL, "Left Line2 Bypass Mixer"},
755 {"Left HP Out", NULL, "Left Line2 Bypass Mixer"},
756
757 /* Right Line2 Bypass */
758 {"Right Line2 Bypass Mixer", "LineL Switch", "Right Line2R Mux"},
759 {"Right Line2 Bypass Mixer", "LineR Switch", "Right Line2R Mux"},
760 {"Right Line2 Bypass Mixer", "Mono Switch", "Right Line2R Mux"},
761 {"Right Line2 Bypass Mixer", "HP Switch", "Right Line2R Mux"},
762 {"Right Line2 Bypass Mixer", "HPRCOM Switch", "Right Line2R Mux"},
763
764 {"Right HPCOM Mux", "differential of HPROUT", "Right Line2 Bypass Mixer"},
765 {"Right HPCOM Mux", "constant VCM", "Right Line2 Bypass Mixer"},
766 {"Right HPCOM Mux", "single-ended", "Right Line2 Bypass Mixer"},
767 {"Right HPCOM Mux", "differential of HPLCOM", "Right Line2 Bypass Mixer"},
768 {"Right HPCOM Mux", "external feedback", "Right Line2 Bypass Mixer"},
769
770 {"Right Line Out", NULL, "Right Line2 Bypass Mixer"},
771 {"Mono Out", NULL, "Right Line2 Bypass Mixer"},
772 {"Right HP Out", NULL, "Right Line2 Bypass Mixer"},
773
774 /* 655 /*
775 * Logical path between digital mic enable and GPIO1 modulator clock 656 * Logical path between digital mic enable and GPIO1 modulator clock
776 * output function 657 * output function
@@ -778,6 +659,105 @@ static const struct snd_soc_dapm_route intercon[] = {
778 {"GPIO1 dmic modclk", NULL, "DMic Rate 128"}, 659 {"GPIO1 dmic modclk", NULL, "DMic Rate 128"},
779 {"GPIO1 dmic modclk", NULL, "DMic Rate 64"}, 660 {"GPIO1 dmic modclk", NULL, "DMic Rate 64"},
780 {"GPIO1 dmic modclk", NULL, "DMic Rate 32"}, 661 {"GPIO1 dmic modclk", NULL, "DMic Rate 32"},
662
663 /* Left DAC Output */
664 {"Left DAC Mux", "DAC_L1", "Left DAC"},
665 {"Left DAC Mux", "DAC_L2", "Left DAC"},
666 {"Left DAC Mux", "DAC_L3", "Left DAC"},
667
668 /* Right DAC Output */
669 {"Right DAC Mux", "DAC_R1", "Right DAC"},
670 {"Right DAC Mux", "DAC_R2", "Right DAC"},
671 {"Right DAC Mux", "DAC_R3", "Right DAC"},
672
673 /* Left Line Output */
674 {"Left Line Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
675 {"Left Line Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
676 {"Left Line Mixer", "DACL1 Switch", "Left DAC Mux"},
677 {"Left Line Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
678 {"Left Line Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
679 {"Left Line Mixer", "DACR1 Switch", "Right DAC Mux"},
680
681 {"Left Line Out", NULL, "Left Line Mixer"},
682 {"Left Line Out", NULL, "Left DAC Mux"},
683 {"LLOUT", NULL, "Left Line Out"},
684
685 /* Right Line Output */
686 {"Right Line Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
687 {"Right Line Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
688 {"Right Line Mixer", "DACL1 Switch", "Left DAC Mux"},
689 {"Right Line Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
690 {"Right Line Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
691 {"Right Line Mixer", "DACR1 Switch", "Right DAC Mux"},
692
693 {"Right Line Out", NULL, "Right Line Mixer"},
694 {"Right Line Out", NULL, "Right DAC Mux"},
695 {"RLOUT", NULL, "Right Line Out"},
696
697 /* Mono Output */
698 {"Mono Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
699 {"Mono Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
700 {"Mono Mixer", "DACL1 Switch", "Left DAC Mux"},
701 {"Mono Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
702 {"Mono Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
703 {"Mono Mixer", "DACR1 Switch", "Right DAC Mux"},
704
705 {"Mono Out", NULL, "Mono Mixer"},
706 {"MONO_LOUT", NULL, "Mono Out"},
707
708 /* Left HP Output */
709 {"Left HP Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
710 {"Left HP Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
711 {"Left HP Mixer", "DACL1 Switch", "Left DAC Mux"},
712 {"Left HP Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
713 {"Left HP Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
714 {"Left HP Mixer", "DACR1 Switch", "Right DAC Mux"},
715
716 {"Left HP Out", NULL, "Left HP Mixer"},
717 {"Left HP Out", NULL, "Left DAC Mux"},
718 {"HPLOUT", NULL, "Left HP Out"},
719
720 /* Right HP Output */
721 {"Right HP Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
722 {"Right HP Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
723 {"Right HP Mixer", "DACL1 Switch", "Left DAC Mux"},
724 {"Right HP Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
725 {"Right HP Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
726 {"Right HP Mixer", "DACR1 Switch", "Right DAC Mux"},
727
728 {"Right HP Out", NULL, "Right HP Mixer"},
729 {"Right HP Out", NULL, "Right DAC Mux"},
730 {"HPROUT", NULL, "Right HP Out"},
731
732 /* Left HPCOM Output */
733 {"Left HPCOM Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
734 {"Left HPCOM Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
735 {"Left HPCOM Mixer", "DACL1 Switch", "Left DAC Mux"},
736 {"Left HPCOM Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
737 {"Left HPCOM Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
738 {"Left HPCOM Mixer", "DACR1 Switch", "Right DAC Mux"},
739
740 {"Left HPCOM Mux", "differential of HPLOUT", "Left HP Mixer"},
741 {"Left HPCOM Mux", "constant VCM", "Left HPCOM Mixer"},
742 {"Left HPCOM Mux", "single-ended", "Left HPCOM Mixer"},
743 {"Left HP Com", NULL, "Left HPCOM Mux"},
744 {"HPLCOM", NULL, "Left HP Com"},
745
746 /* Right HPCOM Output */
747 {"Right HPCOM Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
748 {"Right HPCOM Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
749 {"Right HPCOM Mixer", "DACL1 Switch", "Left DAC Mux"},
750 {"Right HPCOM Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
751 {"Right HPCOM Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
752 {"Right HPCOM Mixer", "DACR1 Switch", "Right DAC Mux"},
753
754 {"Right HPCOM Mux", "differential of HPROUT", "Right HP Mixer"},
755 {"Right HPCOM Mux", "constant VCM", "Right HPCOM Mixer"},
756 {"Right HPCOM Mux", "single-ended", "Right HPCOM Mixer"},
757 {"Right HPCOM Mux", "differential of HPLCOM", "Left HPCOM Mixer"},
758 {"Right HPCOM Mux", "external feedback", "Right HPCOM Mixer"},
759 {"Right HP Com", NULL, "Right HPCOM Mux"},
760 {"HPRCOM", NULL, "Right HP Com"},
781}; 761};
782 762
783static const struct snd_soc_dapm_route intercon_3007[] = { 763static const struct snd_soc_dapm_route intercon_3007[] = {
diff --git a/sound/soc/codecs/tlv320aic3x.h b/sound/soc/codecs/tlv320aic3x.h
index 20d8cac2637..06a19784b16 100644
--- a/sound/soc/codecs/tlv320aic3x.h
+++ b/sound/soc/codecs/tlv320aic3x.h
@@ -85,22 +85,30 @@
85#define LINE2L_2_HPLOUT_VOL 45 85#define LINE2L_2_HPLOUT_VOL 45
86#define PGAL_2_HPLOUT_VOL 46 86#define PGAL_2_HPLOUT_VOL 46
87#define DACL1_2_HPLOUT_VOL 47 87#define DACL1_2_HPLOUT_VOL 47
88#define LINE2R_2_HPLOUT_VOL 48
88#define PGAR_2_HPLOUT_VOL 49 89#define PGAR_2_HPLOUT_VOL 49
90#define DACR1_2_HPLOUT_VOL 50
89#define HPLOUT_CTRL 51 91#define HPLOUT_CTRL 51
90/* Left High Power COM control registers */ 92/* Left High Power COM control registers */
91#define LINE2L_2_HPLCOM_VOL 52 93#define LINE2L_2_HPLCOM_VOL 52
92#define PGAL_2_HPLCOM_VOL 53 94#define PGAL_2_HPLCOM_VOL 53
93#define DACL1_2_HPLCOM_VOL 54 95#define DACL1_2_HPLCOM_VOL 54
96#define LINE2R_2_HPLCOM_VOL 55
94#define PGAR_2_HPLCOM_VOL 56 97#define PGAR_2_HPLCOM_VOL 56
98#define DACR1_2_HPLCOM_VOL 57
95#define HPLCOM_CTRL 58 99#define HPLCOM_CTRL 58
96/* Right High Power Output control registers */ 100/* Right High Power Output control registers */
101#define LINE2L_2_HPROUT_VOL 59
97#define PGAL_2_HPROUT_VOL 60 102#define PGAL_2_HPROUT_VOL 60
103#define DACL1_2_HPROUT_VOL 61
98#define LINE2R_2_HPROUT_VOL 62 104#define LINE2R_2_HPROUT_VOL 62
99#define PGAR_2_HPROUT_VOL 63 105#define PGAR_2_HPROUT_VOL 63
100#define DACR1_2_HPROUT_VOL 64 106#define DACR1_2_HPROUT_VOL 64
101#define HPROUT_CTRL 65 107#define HPROUT_CTRL 65
102/* Right High Power COM control registers */ 108/* Right High Power COM control registers */
109#define LINE2L_2_HPRCOM_VOL 66
103#define PGAL_2_HPRCOM_VOL 67 110#define PGAL_2_HPRCOM_VOL 67
111#define DACL1_2_HPRCOM_VOL 68
104#define LINE2R_2_HPRCOM_VOL 69 112#define LINE2R_2_HPRCOM_VOL 69
105#define PGAR_2_HPRCOM_VOL 70 113#define PGAR_2_HPRCOM_VOL 70
106#define DACR1_2_HPRCOM_VOL 71 114#define DACR1_2_HPRCOM_VOL 71