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authorLinus Torvalds <torvalds@linux-foundation.org>2012-07-23 22:10:54 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-07-23 22:10:54 -0400
commitf0a08fcb5972167e55faa330c4a24fbaa3328b1f (patch)
treee24c42230888bd0e6422b2f81d7991da4373bb5d /mm
parent474183b188b3c5af45831c71151f819fc70479b8 (diff)
parentf6d2ce00da145ae31ec22d21daca6ca5e22b3c84 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile
Pull arch/tile updates from Chris Metcalf: "These changes provide support for PCIe root complex and USB host mode for tilegx's on-chip I/Os. In addition, this pull provides the required underpinning for the on-chip networking support that was pulled into 3.5. The changes have all been through LKML (with several rounds for PCIe RC) and on linux-next." * git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: tile: updates to pci root complex from community feedback bounce: allow use of bounce pool via config option usb: add host support for the tilegx architecture arch/tile: provide kernel support for the tilegx USB shim tile pci: enable IOMMU to support DMA for legacy devices arch/tile: enable ZONE_DMA for tilegx tilegx pci: support I/O to arbitrarily-cached pages tile: remove unused header arch/tile: tilegx PCI root complex support arch/tile: provide kernel support for the tilegx TRIO shim arch/tile: break out the "csum a long" function to <asm/checksum.h> arch/tile: provide kernel support for the tilegx mPIPE shim arch/tile: common DMA code for the GXIO IORPC subsystem arch/tile: support MMIO-based readb/writeb etc. arch/tile: introduce GXIO IORPC framework for tilegx
Diffstat (limited to 'mm')
-rw-r--r--mm/bounce.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/mm/bounce.c b/mm/bounce.c
index d1be02ca188..04208677556 100644
--- a/mm/bounce.c
+++ b/mm/bounce.c
@@ -24,23 +24,25 @@
24 24
25static mempool_t *page_pool, *isa_page_pool; 25static mempool_t *page_pool, *isa_page_pool;
26 26
27#ifdef CONFIG_HIGHMEM 27#if defined(CONFIG_HIGHMEM) || defined(CONFIG_NEED_BOUNCE_POOL)
28static __init int init_emergency_pool(void) 28static __init int init_emergency_pool(void)
29{ 29{
30#ifndef CONFIG_MEMORY_HOTPLUG 30#if defined(CONFIG_HIGHMEM) && !defined(CONFIG_MEMORY_HOTPLUG)
31 if (max_pfn <= max_low_pfn) 31 if (max_pfn <= max_low_pfn)
32 return 0; 32 return 0;
33#endif 33#endif
34 34
35 page_pool = mempool_create_page_pool(POOL_SIZE, 0); 35 page_pool = mempool_create_page_pool(POOL_SIZE, 0);
36 BUG_ON(!page_pool); 36 BUG_ON(!page_pool);
37 printk("highmem bounce pool size: %d pages\n", POOL_SIZE); 37 printk("bounce pool size: %d pages\n", POOL_SIZE);
38 38
39 return 0; 39 return 0;
40} 40}
41 41
42__initcall(init_emergency_pool); 42__initcall(init_emergency_pool);
43#endif
43 44
45#ifdef CONFIG_HIGHMEM
44/* 46/*
45 * highmem version, map in to vec 47 * highmem version, map in to vec
46 */ 48 */