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authorLinus Torvalds <torvalds@g5.osdl.org>2005-11-17 13:56:34 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2005-11-17 13:56:34 -0500
commit7652aab77fbf6de8bcc69ee6a864270b0da6b3f6 (patch)
treecc380ac53a720a905232463cd8fed9cb27875723 /include
parentcd02e27b1514a27b2a8ab59755ae6d23d4d8a10f (diff)
parentaec8b7557cf0fc4dac059112328b5aa89271c77e (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips/atomic.h14
-rw-r--r--include/asm-mips/io.h6
-rw-r--r--include/asm-mips/ip32/crime.h2
-rw-r--r--include/asm-mips/ip32/mace.h44
-rw-r--r--include/asm-mips/mach-db1x00/db1200.h3
-rw-r--r--include/asm-mips/mach-db1x00/db1x00.h6
-rw-r--r--include/asm-mips/mach-ip32/mc146818rtc.h7
-rw-r--r--include/asm-mips/mach-jmr3927/ds1742.h (renamed from include/asm-mips/mach-jmr3927/asm/ds1742.h)6
-rw-r--r--include/asm-mips/mach-pb1x00/pb1200.h3
-rw-r--r--include/asm-mips/mach-pb1x00/pb1550.h7
-rw-r--r--include/asm-mips/mips-boards/seadint.h11
-rw-r--r--include/asm-mips/signal.h21
-rw-r--r--include/linux/ds17287rtc.h67
-rw-r--r--include/linux/ds1742rtc.h53
-rw-r--r--include/linux/pci_ids.h1
15 files changed, 194 insertions, 57 deletions
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 2c87b41e69b..55c37c106ef 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -231,11 +231,12 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
231} 231}
232 232
233/* 233/*
234 * atomic_sub_if_positive - add integer to atomic variable 234 * atomic_sub_if_positive - conditionally subtract integer from atomic variable
235 * @i: integer value to subtract
235 * @v: pointer of type atomic_t 236 * @v: pointer of type atomic_t
236 * 237 *
237 * Atomically test @v and decrement if it is greater than 0. 238 * Atomically test @v and subtract @i if @v is greater or equal than @i.
238 * The function returns the old value of @v minus 1. 239 * The function returns the old value of @v minus @i.
239 */ 240 */
240static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) 241static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
241{ 242{
@@ -577,11 +578,12 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
577} 578}
578 579
579/* 580/*
580 * atomic64_sub_if_positive - add integer to atomic variable 581 * atomic64_sub_if_positive - conditionally subtract integer from atomic variable
582 * @i: integer value to subtract
581 * @v: pointer of type atomic64_t 583 * @v: pointer of type atomic64_t
582 * 584 *
583 * Atomically test @v and decrement if it is greater than 0. 585 * Atomically test @v and subtract @i if @v is greater or equal than @i.
584 * The function returns the old value of @v minus 1. 586 * The function returns the old value of @v minus @i.
585 */ 587 */
586static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) 588static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
587{ 589{
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 3061870b7f6..d42685747e7 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -459,10 +459,10 @@ __BUILDIO(q, u64)
459 459
460#define __BUILD_MEMORY_STRING(bwlq, type) \ 460#define __BUILD_MEMORY_STRING(bwlq, type) \
461 \ 461 \
462static inline void writes##bwlq(volatile void __iomem *mem, void *addr, \ 462static inline void writes##bwlq(volatile void __iomem *mem, \
463 unsigned int count) \ 463 const void *addr, unsigned int count) \
464{ \ 464{ \
465 volatile type *__addr = addr; \ 465 const volatile type *__addr = addr; \
466 \ 466 \
467 while (count--) { \ 467 while (count--) { \
468 mem_write##bwlq(*__addr, mem); \ 468 mem_write##bwlq(*__addr, mem); \
diff --git a/include/asm-mips/ip32/crime.h b/include/asm-mips/ip32/crime.h
index 152879bae20..a13702fafa8 100644
--- a/include/asm-mips/ip32/crime.h
+++ b/include/asm-mips/ip32/crime.h
@@ -154,7 +154,7 @@ struct sgi_crime {
154#define CRIME_MEM_ERROR_ECC_REPL_MASK 0xffffffff 154#define CRIME_MEM_ERROR_ECC_REPL_MASK 0xffffffff
155}; 155};
156 156
157extern struct sgi_crime *crime; 157extern struct sgi_crime __iomem *crime;
158 158
159#define CRIME_HI_MEM_BASE 0x40000000 /* this is where whole 1G of RAM is mapped */ 159#define CRIME_HI_MEM_BASE 0x40000000 /* this is where whole 1G of RAM is mapped */
160 160
diff --git a/include/asm-mips/ip32/mace.h b/include/asm-mips/ip32/mace.h
index 5bdc51d85b6..990082c81f3 100644
--- a/include/asm-mips/ip32/mace.h
+++ b/include/asm-mips/ip32/mace.h
@@ -150,24 +150,34 @@ struct mace_audio {
150 150
151/* register definitions for parallel port DMA */ 151/* register definitions for parallel port DMA */
152struct mace_parport { 152struct mace_parport {
153/* 0 - do nothing, 1 - pulse terminal count to the device after buffer is drained */ 153 /* 0 - do nothing,
154#define MACEPAR_CONTEXT_LASTFLAG BIT(63) 154 * 1 - pulse terminal count to the device after buffer is drained */
155/* Should not cross 4K page boundary */ 155#define MACEPAR_CONTEXT_LASTFLAG BIT(63)
156#define MACEPAR_CONTEXT_DATALEN_MASK 0xfff00000000 156 /* Should not cross 4K page boundary */
157/* Can be arbitrarily aligned on any byte boundary on output, 64 byte aligned on input */ 157#define MACEPAR_CONTEXT_DATA_BOUND 0x0000000000001000UL
158#define MACEPAR_CONTEXT_BASEADDR_MASK 0xffffffff 158#define MACEPAR_CONTEXT_DATALEN_MASK 0x00000fff00000000UL
159#define MACEPAR_CONTEXT_DATALEN_SHIFT 32
160 /* Can be arbitrarily aligned on any byte boundary on output,
161 * 64 byte aligned on input */
162#define MACEPAR_CONTEXT_BASEADDR_MASK 0x00000000ffffffffUL
159 volatile u64 context_a; 163 volatile u64 context_a;
160 volatile u64 context_b; 164 volatile u64 context_b;
161#define MACEPAR_CTLSTAT_DIRECTION BIT(0) /* 0 - mem->device, 1 - device->mem */ 165 /* 0 - mem->device, 1 - device->mem */
162#define MACEPAR_CTLSTAT_ENABLE BIT(1) /* 0 - channel frozen, 1 - channel enabled */ 166#define MACEPAR_CTLSTAT_DIRECTION BIT(0)
163#define MACEPAR_CTLSTAT_RESET BIT(2) /* 0 - channel active, 1 - complete channel reset */ 167 /* 0 - channel frozen, 1 - channel enabled */
164#define MACEPAR_CTLSTAT_CTXB_VALID BIT(3) 168#define MACEPAR_CTLSTAT_ENABLE BIT(1)
165#define MACEPAR_CTLSTAT_CTXA_VALID BIT(4) 169 /* 0 - channel active, 1 - complete channel reset */
166 volatile u64 cntlstat; /* Control/Status register */ 170#define MACEPAR_CTLSTAT_RESET BIT(2)
167#define MACEPAR_DIAG_CTXINUSE BIT(1) 171#define MACEPAR_CTLSTAT_CTXB_VALID BIT(3)
168#define MACEPAR_DIAG_DMACTIVE BIT(2) /* 1 - Dma engine is enabled and processing something */ 172#define MACEPAR_CTLSTAT_CTXA_VALID BIT(4)
169#define MACEPAR_DIAG_CTRMASK 0x3ffc /* Counter of bytes left */ 173 volatile u64 cntlstat; /* Control/Status register */
170 volatile u64 diagnostic; /* RO: diagnostic register */ 174#define MACEPAR_DIAG_CTXINUSE BIT(0)
175 /* 1 - Dma engine is enabled and processing something */
176#define MACEPAR_DIAG_DMACTIVE BIT(1)
177 /* Counter of bytes left */
178#define MACEPAR_DIAG_CTRMASK 0x0000000000003ffcUL
179#define MACEPAR_DIAG_CTRSHIFT 2
180 volatile u64 diagnostic; /* RO: diagnostic register */
171}; 181};
172 182
173/* ISA Control and DMA registers */ 183/* ISA Control and DMA registers */
@@ -353,6 +363,6 @@ struct sgi_mace {
353 char _pad6[0x80000 - sizeof(struct mace_isa)]; 363 char _pad6[0x80000 - sizeof(struct mace_isa)];
354}; 364};
355 365
356extern struct sgi_mace *mace; 366extern struct sgi_mace __iomem *mace;
357 367
358#endif /* __ASM_MACE_H__ */ 368#endif /* __ASM_MACE_H__ */
diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h
index 5d894376fc1..647fdb54cc1 100644
--- a/include/asm-mips/mach-db1x00/db1200.h
+++ b/include/asm-mips/mach-db1x00/db1200.h
@@ -220,5 +220,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
220#define BOARD_PC1_INT DB1200_PC1_INT 220#define BOARD_PC1_INT DB1200_PC1_INT
221#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET))) 221#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
222 222
223/* Nand chip select */
224#define NAND_CS 1
225
223#endif /* __ASM_DB1200_H */ 226#endif /* __ASM_DB1200_H */
224 227
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index efafe65258b..7b28b23f91c 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -200,6 +200,12 @@ typedef volatile struct
200 ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ 200 ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
201 ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ 201 ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
202 ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT) 202 ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
203#define NAND_CS 1
204
205/* should be done by yamon */
206#define NAND_STCFG 0x00400005 /* 8-bit NAND */
207#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
208#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
203 209
204#endif /* __ASM_DB1X00_H */ 210#endif /* __ASM_DB1X00_H */
205 211
diff --git a/include/asm-mips/mach-ip32/mc146818rtc.h b/include/asm-mips/mach-ip32/mc146818rtc.h
index f5d780ff843..c28ba8d8407 100644
--- a/include/asm-mips/mach-ip32/mc146818rtc.h
+++ b/include/asm-mips/mach-ip32/mc146818rtc.h
@@ -11,7 +11,6 @@
11#ifndef __ASM_MACH_IP32_MC146818RTC_H 11#ifndef __ASM_MACH_IP32_MC146818RTC_H
12#define __ASM_MACH_IP32_MC146818RTC_H 12#define __ASM_MACH_IP32_MC146818RTC_H
13 13
14#include <asm/io.h>
15#include <asm/ip32/mace.h> 14#include <asm/ip32/mace.h>
16 15
17#define RTC_PORT(x) (0x70 + (x)) 16#define RTC_PORT(x) (0x70 + (x))
@@ -26,8 +25,10 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
26 mace->isa.rtc[addr << 8] = data; 25 mace->isa.rtc[addr << 8] = data;
27} 26}
28 27
29/* FIXME: Do it right. For now just assume that noone lives in 20th century 28/*
30 * and no O2 user in 22th century ;-) */ 29 * FIXME: Do it right. For now just assume that noone lives in 20th century
30 * and no O2 user in 22th century ;-)
31 */
31#define mc146818_decode_year(year) ((year) + 2000) 32#define mc146818_decode_year(year) ((year) + 2000)
32 33
33#define RTC_ALWAYS_BCD 0 34#define RTC_ALWAYS_BCD 0
diff --git a/include/asm-mips/mach-jmr3927/asm/ds1742.h b/include/asm-mips/mach-jmr3927/ds1742.h
index 134a4b6c334..cff6192d4bd 100644
--- a/include/asm-mips/mach-jmr3927/asm/ds1742.h
+++ b/include/asm-mips/mach-jmr3927/ds1742.h
@@ -5,12 +5,12 @@
5 * 5 *
6 * Copyright (C) 2003 by Ralf Baechle 6 * Copyright (C) 2003 by Ralf Baechle
7 */ 7 */
8#ifndef __ASM_MACH_JMR3927_ASM_DS1742_H 8#ifndef __ASM_MACH_JMR3927_DS1742_H
9#define __ASM_MACH_JMR3927_ASM_DS1742_H 9#define __ASM_MACH_JMR3927_DS1742_H
10 10
11#include <asm/jmr3927/jmr3927.h> 11#include <asm/jmr3927/jmr3927.h>
12 12
13#define rtc_read(reg) (jmr3927_nvram_in(addr)) 13#define rtc_read(reg) (jmr3927_nvram_in(addr))
14#define rtc_write(data, reg) (jmr3927_nvram_out((data),(reg))) 14#define rtc_write(data, reg) (jmr3927_nvram_out((data),(reg)))
15 15
16#endif /* __ASM_MACH_JMR3927_ASM_DS1742_H */ 16#endif /* __ASM_MACH_JMR3927_DS1742_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h
index 9a3088b19bf..409d443322c 100644
--- a/include/asm-mips/mach-pb1x00/pb1200.h
+++ b/include/asm-mips/mach-pb1x00/pb1200.h
@@ -248,5 +248,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
248#define BOARD_PC1_INT PB1200_PC1_INT 248#define BOARD_PC1_INT PB1200_PC1_INT
249#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET))) 249#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
250 250
251/* Nand chip select */
252#define NAND_CS 1
253
251#endif /* __ASM_PB1200_H */ 254#endif /* __ASM_PB1200_H */
252 255
diff --git a/include/asm-mips/mach-pb1x00/pb1550.h b/include/asm-mips/mach-pb1x00/pb1550.h
index 431d6088ea9..9578ead11e8 100644
--- a/include/asm-mips/mach-pb1x00/pb1550.h
+++ b/include/asm-mips/mach-pb1x00/pb1550.h
@@ -166,4 +166,11 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR;
166 ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ 166 ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
167 ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT) 167 ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
168 168
169#define NAND_CS 1
170
171/* should be done by yamon */
172#define NAND_STCFG 0x00400005 /* 8-bit NAND */
173#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
174#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
175
169#endif /* __ASM_PB1550_H */ 176#endif /* __ASM_PB1550_H */
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h
index c3dcfcb928b..365c2a3c64f 100644
--- a/include/asm-mips/mips-boards/seadint.h
+++ b/include/asm-mips/mips-boards/seadint.h
@@ -20,9 +20,14 @@
20#ifndef _MIPS_SEADINT_H 20#ifndef _MIPS_SEADINT_H
21#define _MIPS_SEADINT_H 21#define _MIPS_SEADINT_H
22 22
23#define SEADINT_UART0 2 23/*
24#define SEADINT_UART1 3 24 * Interrupts 0..7 are used for SEAD CPU interrupts
25 */
26#define MIPSCPU_INT_BASE 0
27
28#define MIPSCPU_INT_UART0 2
29#define MIPSCPU_INT_UART1 3
25 30
26extern void seadint_init(void); 31#define MIPSCPU_INT_CPUCTR 7
27 32
28#endif /* !(_MIPS_SEADINT_H) */ 33#endif /* !(_MIPS_SEADINT_H) */
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index 8ca539e80d8..6fe903e09c6 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -155,27 +155,6 @@ typedef struct sigaltstack {
155#ifdef __KERNEL__ 155#ifdef __KERNEL__
156#include <asm/sigcontext.h> 156#include <asm/sigcontext.h>
157 157
158/*
159 * The following break codes are or were in use for specific purposes in
160 * other MIPS operating systems. Linux/MIPS doesn't use all of them. The
161 * unused ones are here as placeholders; we might encounter them in
162 * non-Linux/MIPS object files or make use of them in the future.
163 */
164#define BRK_USERBP 0 /* User bp (used by debuggers) */
165#define BRK_KERNELBP 1 /* Break in the kernel */
166#define BRK_ABORT 2 /* Sometimes used by abort(3) to SIGIOT */
167#define BRK_BD_TAKEN 3 /* For bd slot emulation - not implemented */
168#define BRK_BD_NOTTAKEN 4 /* For bd slot emulation - not implemented */
169#define BRK_SSTEPBP 5 /* User bp (used by debuggers) */
170#define BRK_OVERFLOW 6 /* Overflow check */
171#define BRK_DIVZERO 7 /* Divide by zero check */
172#define BRK_RANGE 8 /* Range error check */
173#define BRK_STACKOVERFLOW 9 /* For Ada stackchecking */
174#define BRK_NORLD 10 /* No rld found - not used by Linux/MIPS */
175#define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */
176#define BRK_MULOVF 1023 /* Multiply overflow */
177#define BRK_BUG 512 /* Used by BUG() */
178
179#define ptrace_signal_deliver(regs, cookie) do { } while (0) 158#define ptrace_signal_deliver(regs, cookie) do { } while (0)
180 159
181#endif /* __KERNEL__ */ 160#endif /* __KERNEL__ */
diff --git a/include/linux/ds17287rtc.h b/include/linux/ds17287rtc.h
new file mode 100644
index 00000000000..c281ba42e28
--- /dev/null
+++ b/include/linux/ds17287rtc.h
@@ -0,0 +1,67 @@
1/*
2 * ds17287rtc.h - register definitions for the ds1728[57] RTC / CMOS RAM
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * (C) 2003 Guido Guenther <agx@sigxcpu.org>
9 */
10#ifndef __LINUX_DS17287RTC_H
11#define __LINUX_DS17287RTC_H
12
13#include <linux/rtc.h> /* get the user-level API */
14#include <linux/spinlock.h> /* spinlock_t */
15#include <linux/mc146818rtc.h>
16
17/* Register A */
18#define DS_REGA_DV2 0x40 /* countdown chain */
19#define DS_REGA_DV1 0x20 /* oscillator enable */
20#define DS_REGA_DV0 0x10 /* bank select */
21
22/* bank 1 registers */
23#define DS_B1_MODEL 0x40 /* model number byte */
24#define DS_B1_SN1 0x41 /* serial number byte 1 */
25#define DS_B1_SN2 0x42 /* serial number byte 2 */
26#define DS_B1_SN3 0x43 /* serial number byte 3 */
27#define DS_B1_SN4 0x44 /* serial number byte 4 */
28#define DS_B1_SN5 0x45 /* serial number byte 5 */
29#define DS_B1_SN6 0x46 /* serial number byte 6 */
30#define DS_B1_CRC 0x47 /* CRC byte */
31#define DS_B1_CENTURY 0x48 /* Century byte */
32#define DS_B1_DALARM 0x49 /* date alarm */
33#define DS_B1_XCTRL4A 0x4a /* extendec control register 4a */
34#define DS_B1_XCTRL4B 0x4b /* extendec control register 4b */
35#define DS_B1_RTCADDR2 0x4e /* rtc address 2 */
36#define DS_B1_RTCADDR3 0x4f /* rtc address 3 */
37#define DS_B1_RAMLSB 0x50 /* extended ram LSB */
38#define DS_B1_RAMMSB 0x51 /* extended ram MSB */
39#define DS_B1_RAMDPORT 0x53 /* extended ram data port */
40
41/* register details */
42/* extended control register 4a */
43#define DS_XCTRL4A_VRT2 0x80 /* valid ram and time */
44#define DS_XCTRL4A_INCR 0x40 /* increment progress status */
45#define DS_XCTRL4A_BME 0x20 /* burst mode enable */
46#define DS_XCTRL4A_PAB 0x08 /* power active bar ctrl */
47#define DS_XCTRL4A_RF 0x04 /* ram clear flag */
48#define DS_XCTRL4A_WF 0x02 /* wake up alarm flag */
49#define DS_XCTRL4A_KF 0x01 /* kickstart flag */
50
51/* interrupt causes */
52#define DS_XCTRL4A_IFS (DS_XCTRL4A_RF|DS_XCTRL4A_WF|DS_XCTRL4A_KF)
53
54/* extended control register 4b */
55#define DS_XCTRL4B_ABE 0x80 /* auxiliary battery enable */
56#define DS_XCTRL4B_E32K 0x40 /* enable 32.768 kHz Output */
57#define DS_XCTRL4B_CS 0x20 /* crystal select */
58#define DS_XCTRL4B_RCE 0x10 /* ram clear enable */
59#define DS_XCTRL4B_PRS 0x08 /* PAB resec select */
60#define DS_XCTRL4B_RIE 0x04 /* ram clear interrupt enable */
61#define DS_XCTRL4B_WFE 0x02 /* wake up alarm interrupt enable */
62#define DS_XCTRL4B_KFE 0x01 /* kickstart interrupt enable */
63
64/* interrupt enable bits */
65#define DS_XCTRL4B_IFES (DS_XCTRL4B_RIE|DS_XCTRL4B_WFE|DS_XCTRL4B_KFE)
66
67#endif /* __LINUX_DS17287RTC_H */
diff --git a/include/linux/ds1742rtc.h b/include/linux/ds1742rtc.h
new file mode 100644
index 00000000000..a83cdd1cafc
--- /dev/null
+++ b/include/linux/ds1742rtc.h
@@ -0,0 +1,53 @@
1/*
2 * ds1742rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
3 *
4 * Copyright (C) 1999-2001 Toshiba Corporation
5 * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
6 *
7 * Permission is hereby granted to copy, modify and redistribute this code
8 * in terms of the GNU Library General Public License, Version 2 or later,
9 * at your option.
10 */
11#ifndef __LINUX_DS1742RTC_H
12#define __LINUX_DS1742RTC_H
13
14#include <asm/ds1742.h>
15
16#define RTC_BRAM_SIZE 0x800
17#define RTC_OFFSET 0x7f8
18
19/*
20 * Register summary
21 */
22#define RTC_CONTROL (RTC_OFFSET + 0)
23#define RTC_CENTURY (RTC_OFFSET + 0)
24#define RTC_SECONDS (RTC_OFFSET + 1)
25#define RTC_MINUTES (RTC_OFFSET + 2)
26#define RTC_HOURS (RTC_OFFSET + 3)
27#define RTC_DAY (RTC_OFFSET + 4)
28#define RTC_DATE (RTC_OFFSET + 5)
29#define RTC_MONTH (RTC_OFFSET + 6)
30#define RTC_YEAR (RTC_OFFSET + 7)
31
32#define RTC_CENTURY_MASK 0x3f
33#define RTC_SECONDS_MASK 0x7f
34#define RTC_DAY_MASK 0x07
35
36/*
37 * Bits in the Control/Century register
38 */
39#define RTC_WRITE 0x80
40#define RTC_READ 0x40
41
42/*
43 * Bits in the Seconds register
44 */
45#define RTC_STOP 0x80
46
47/*
48 * Bits in the Day register
49 */
50#define RTC_BATT_FLAG 0x80
51#define RTC_FREQ_TEST 0x40
52
53#endif /* __LINUX_DS1742RTC_H */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d4c1c8fd292..7b387faedb4 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1401,6 +1401,7 @@
1401#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334 1401#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334
1402 1402
1403#define PCI_VENDOR_ID_MARVELL 0x11ab 1403#define PCI_VENDOR_ID_MARVELL 0x11ab
1404#define PCI_DEVICE_ID_MARVELL_GT64111 0x4146
1404#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430 1405#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430
1405#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460 1406#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460
1406#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480 1407#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480