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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-07 15:17:40 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-07 15:17:40 -0400
commit5b6b54982258c330247957a8d877b9851ac69d53 (patch)
tree567e4b3391e0c6689cf511789fb512ef7385c16f /include
parent35c74823cb382c610be908f1b92f980b84e7c37c (diff)
parent39374aadcd0159b4744ab456f4efa100bea84bd4 (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (38 commits) sh: R7785RP board updates. sh: Update r7780rp defconfig. sh: Add die chain notifiers. sh: Fix APM emulation on hp6xx. sh: Wire up more IRQs for SH7709. sh: Solution Engine 7722 board support. sh: Fix r7780rp build. sh: kdump support. sh: Move clock reporting to its own proc entry. sh: Solution Engine SH7705 board and CPU updates. serial: sh-sci: Fix module clock refcount for serial console. serial: sh-sci: Fix module clock refcounting. sh: SH7722 clock framework support. sh: hp6xx pata_platform support. sh: Obey CONFIG_HZ for HZ definition. sh: Fix fstatat64() syscall. sh: se7780 PCI support. sh: SH7780 Solution Engine board support. sh: Add a dummy SH-4 PCIC fixup. sh: Tidy up L-BOX area5 addresses. ...
Diffstat (limited to 'include')
-rw-r--r--include/asm-sh/bug.h92
-rw-r--r--include/asm-sh/clock.h32
-rw-r--r--include/asm-sh/cpu-sh3/mmu_context.h1
-rw-r--r--include/asm-sh/cpu-sh4/freq.h8
-rw-r--r--include/asm-sh/irq.h91
-rw-r--r--include/asm-sh/kdebug.h35
-rw-r--r--include/asm-sh/kexec.h42
-rw-r--r--include/asm-sh/kgdb.h51
-rw-r--r--include/asm-sh/lboxre2.h27
-rw-r--r--include/asm-sh/mmu_context.h6
-rw-r--r--include/asm-sh/page.h10
-rw-r--r--include/asm-sh/param.h2
-rw-r--r--include/asm-sh/pci.h2
-rw-r--r--include/asm-sh/processor.h2
-rw-r--r--include/asm-sh/r7780rp.h76
-rw-r--r--include/asm-sh/se.h4
-rw-r--r--include/asm-sh/se7722.h118
-rw-r--r--include/asm-sh/se7751.h2
-rw-r--r--include/asm-sh/se7780.h108
-rw-r--r--include/asm-sh/stat.h19
-rw-r--r--include/asm-sh/system.h3
21 files changed, 523 insertions, 208 deletions
diff --git a/include/asm-sh/bug.h b/include/asm-sh/bug.h
index 2f89dd06d0c..794c36daf06 100644
--- a/include/asm-sh/bug.h
+++ b/include/asm-sh/bug.h
@@ -2,50 +2,80 @@
2#define __ASM_SH_BUG_H 2#define __ASM_SH_BUG_H
3 3
4#ifdef CONFIG_BUG 4#ifdef CONFIG_BUG
5 5#define HAVE_ARCH_BUG
6struct bug_frame { 6#define HAVE_ARCH_WARN_ON
7 unsigned short opcode;
8 unsigned short line;
9 const char *file;
10 const char *func;
11};
12
13struct pt_regs;
14
15extern void handle_BUG(struct pt_regs *);
16 7
17#define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */ 8#define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */
18 9
10/**
11 * _EMIT_BUG_ENTRY
12 * %1 - __FILE__
13 * %2 - __LINE__
14 * %3 - trap type
15 * %4 - sizeof(struct bug_entry)
16 *
17 * The trapa opcode itself sits in %0.
18 * The %O notation is used to avoid # generation.
19 *
20 * The offending file and line are encoded in the __bug_table section.
21 */
19#ifdef CONFIG_DEBUG_BUGVERBOSE 22#ifdef CONFIG_DEBUG_BUGVERBOSE
23#define _EMIT_BUG_ENTRY \
24 "\t.pushsection __bug_table,\"a\"\n" \
25 "2:\t.long 1b, %O1\n" \
26 "\t.short %O2, %O3\n" \
27 "\t.org 2b+%O4\n" \
28 "\t.popsection\n"
29#else
30#define _EMIT_BUG_ENTRY \
31 "\t.pushsection __bug_table,\"a\"\n" \
32 "2:\t.long 1b\n" \
33 "\t.short %O3\n" \
34 "\t.org 2b+%O4\n" \
35 "\t.popsection\n"
36#endif
20 37
21#define BUG() \ 38#define BUG() \
22do { \ 39do { \
23 __asm__ __volatile__ ( \ 40 __asm__ __volatile__ ( \
24 ".align 2\n\t" \ 41 "1:\t.short %O0\n" \
25 ".short %O0\n\t" \ 42 _EMIT_BUG_ENTRY \
26 ".short %O1\n\t" \ 43 : \
27 ".long %O2\n\t" \ 44 : "n" (TRAPA_BUG_OPCODE), \
28 ".long %O3\n\t" \ 45 "i" (__FILE__), \
29 : \ 46 "i" (__LINE__), "i" (0), \
30 : "n" (TRAPA_BUG_OPCODE), \ 47 "i" (sizeof(struct bug_entry))); \
31 "i" (__LINE__), "X" (__FILE__), \
32 "X" (__FUNCTION__)); \
33} while (0) 48} while (0)
34 49
35#else 50#define __WARN() \
36 51do { \
37#define BUG() \ 52 __asm__ __volatile__ ( \
38do { \ 53 "1:\t.short %O0\n" \
39 __asm__ __volatile__ ( \ 54 _EMIT_BUG_ENTRY \
40 ".align 2\n\t" \ 55 : \
41 ".short %O0\n\t" \ 56 : "n" (TRAPA_BUG_OPCODE), \
42 : \ 57 "i" (__FILE__), \
43 : "n" (TRAPA_BUG_OPCODE)); \ 58 "i" (__LINE__), \
59 "i" (BUGFLAG_WARNING), \
60 "i" (sizeof(struct bug_entry))); \
44} while (0) 61} while (0)
45 62
46#endif /* CONFIG_DEBUG_BUGVERBOSE */ 63#define WARN_ON(x) ({ \
64 typeof(x) __ret_warn_on = (x); \
65 if (__builtin_constant_p(__ret_warn_on)) { \
66 if (__ret_warn_on) \
67 __WARN(); \
68 } else { \
69 if (unlikely(__ret_warn_on)) \
70 __WARN(); \
71 } \
72 unlikely(__ret_warn_on); \
73})
47 74
48#define HAVE_ARCH_BUG 75struct pt_regs;
76
77/* arch/sh/kernel/traps.c */
78void handle_BUG(struct pt_regs *);
49 79
50#endif /* CONFIG_BUG */ 80#endif /* CONFIG_BUG */
51 81
diff --git a/include/asm-sh/clock.h b/include/asm-sh/clock.h
index 1df92807f8c..386d797d86b 100644
--- a/include/asm-sh/clock.h
+++ b/include/asm-sh/clock.h
@@ -13,7 +13,7 @@ struct clk_ops {
13 void (*enable)(struct clk *clk); 13 void (*enable)(struct clk *clk);
14 void (*disable)(struct clk *clk); 14 void (*disable)(struct clk *clk);
15 void (*recalc)(struct clk *clk); 15 void (*recalc)(struct clk *clk);
16 int (*set_rate)(struct clk *clk, unsigned long rate); 16 int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
17}; 17};
18 18
19struct clk { 19struct clk {
@@ -48,6 +48,34 @@ void clk_recalc_rate(struct clk *);
48int clk_register(struct clk *); 48int clk_register(struct clk *);
49void clk_unregister(struct clk *); 49void clk_unregister(struct clk *);
50 50
51int show_clocks(struct seq_file *m); 51/* the exported API, in addition to clk_set_rate */
52/**
53 * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
54 * @clk: clock source
55 * @rate: desired clock rate in Hz
56 * @algo_id: algorithm id to be passed down to ops->set_rate
57 *
58 * Returns success (0) or negative errno.
59 */
60int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
52 61
62enum clk_sh_algo_id {
63 NO_CHANGE = 0,
64
65 IUS_N1_N1,
66 IUS_322,
67 IUS_522,
68 IUS_N11,
69
70 SB_N1,
71
72 SB3_N1,
73 SB3_32,
74 SB3_43,
75 SB3_54,
76
77 BP_N1,
78
79 IP_N1,
80};
53#endif /* __ASM_SH_CLOCK_H */ 81#endif /* __ASM_SH_CLOCK_H */
diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h
index bccb7ddb438..4704e86dff5 100644
--- a/include/asm-sh/cpu-sh3/mmu_context.h
+++ b/include/asm-sh/cpu-sh3/mmu_context.h
@@ -32,6 +32,7 @@
32 defined(CONFIG_CPU_SUBTYPE_SH7706) || \ 32 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
33 defined(CONFIG_CPU_SUBTYPE_SH7300) || \ 33 defined(CONFIG_CPU_SUBTYPE_SH7300) || \
34 defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 34 defined(CONFIG_CPU_SUBTYPE_SH7705) || \
35 defined(CONFIG_CPU_SUBTYPE_SH7712) || \
35 defined(CONFIG_CPU_SUBTYPE_SH7710) 36 defined(CONFIG_CPU_SUBTYPE_SH7710)
36#define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */ 37#define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */
37#else 38#else
diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h
index 602d061ca2d..86564e7a26a 100644
--- a/include/asm-sh/cpu-sh4/freq.h
+++ b/include/asm-sh/cpu-sh4/freq.h
@@ -12,8 +12,16 @@
12 12
13#if defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7722) 13#if defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7722)
14#define FRQCR 0xa4150000 14#define FRQCR 0xa4150000
15#define VCLKCR 0xa4150004
16#define SCLKACR 0xa4150008
17#define SCLKBCR 0xa415000c
18#define IrDACLKCR 0xa4150010
15#elif defined(CONFIG_CPU_SUBTYPE_SH7780) 19#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
16#define FRQCR 0xffc80000 20#define FRQCR 0xffc80000
21#elif defined(CONFIG_CPU_SUBTYPE_SH7785)
22#define FRQCR0 0xffc80000
23#define FRQCR1 0xffc80004
24#define FRQMR1 0xffc80014
17#else 25#else
18#define FRQCR 0xffc00000 26#define FRQCR 0xffc00000
19#endif 27#endif
diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h
index afe188f0ad5..e81bf21c801 100644
--- a/include/asm-sh/irq.h
+++ b/include/asm-sh/irq.h
@@ -2,94 +2,13 @@
2#define __ASM_SH_IRQ_H 2#define __ASM_SH_IRQ_H
3 3
4#include <asm/machvec.h> 4#include <asm/machvec.h>
5#include <asm/ptrace.h> /* for pt_regs */
6 5
7/* NR_IRQS is made from three components: 6/*
8 * 1. ONCHIP_NR_IRQS - number of IRLS + on-chip peripherial modules 7 * A sane default based on a reasonable vector table size, platforms are
9 * 2. PINT_NR_IRQS - number of PINT interrupts 8 * advised to cap this at the hard limit that they're interested in
10 * 3. OFFCHIP_NR_IRQS - numbe of IRQs from off-chip peripherial modules 9 * through the machvec.
11 */ 10 */
12 11#define NR_IRQS 256
13/* 1. ONCHIP_NR_IRQS */
14#if defined(CONFIG_CPU_SUBTYPE_SH7604)
15# define ONCHIP_NR_IRQS 24 // Actually 21
16#elif defined(CONFIG_CPU_SUBTYPE_SH7707)
17# define ONCHIP_NR_IRQS 64
18# define PINT_NR_IRQS 16
19#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
20# define ONCHIP_NR_IRQS 32
21#elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \
22 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
23 defined(CONFIG_CPU_SUBTYPE_SH7705)
24# define ONCHIP_NR_IRQS 64 // Actually 61
25# define PINT_NR_IRQS 16
26#elif defined(CONFIG_CPU_SUBTYPE_SH7710)
27# define ONCHIP_NR_IRQS 104
28#elif defined(CONFIG_CPU_SUBTYPE_SH7750)
29# define ONCHIP_NR_IRQS 48 // Actually 44
30#elif defined(CONFIG_CPU_SUBTYPE_SH7751)
31# define ONCHIP_NR_IRQS 72
32#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
33# define ONCHIP_NR_IRQS 112 /* XXX */
34#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
35# define ONCHIP_NR_IRQS 72
36#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
37# define ONCHIP_NR_IRQS 144
38#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \
39 defined(CONFIG_CPU_SUBTYPE_SH73180) || \
40 defined(CONFIG_CPU_SUBTYPE_SH7343) || \
41 defined(CONFIG_CPU_SUBTYPE_SH7722)
42# define ONCHIP_NR_IRQS 109
43#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
44# define ONCHIP_NR_IRQS 111
45#elif defined(CONFIG_CPU_SUBTYPE_SH7206)
46# define ONCHIP_NR_IRQS 256
47#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
48# define ONCHIP_NR_IRQS 128
49#elif defined(CONFIG_SH_UNKNOWN) /* Most be last */
50# define ONCHIP_NR_IRQS 144
51#endif
52
53/* 2. PINT_NR_IRQS */
54#ifdef CONFIG_SH_UNKNOWN
55# define PINT_NR_IRQS 16
56#else
57# ifndef PINT_NR_IRQS
58# define PINT_NR_IRQS 0
59# endif
60#endif
61
62#if PINT_NR_IRQS > 0
63# define PINT_IRQ_BASE ONCHIP_NR_IRQS
64#endif
65
66/* 3. OFFCHIP_NR_IRQS */
67#if defined(CONFIG_HD64461)
68# define OFFCHIP_NR_IRQS 18
69#elif defined(CONFIG_HD64465)
70# define OFFCHIP_NR_IRQS 16
71#elif defined (CONFIG_SH_DREAMCAST)
72# define OFFCHIP_NR_IRQS 96
73#elif defined (CONFIG_SH_TITAN)
74# define OFFCHIP_NR_IRQS 4
75#elif defined(CONFIG_SH_R7780RP)
76# define OFFCHIP_NR_IRQS 16
77#elif defined(CONFIG_SH_7343_SOLUTION_ENGINE)
78# define OFFCHIP_NR_IRQS 12
79#elif defined(CONFIG_SH_7722_SOLUTION_ENGINE)
80# define OFFCHIP_NR_IRQS 14
81#elif defined(CONFIG_SH_UNKNOWN)
82# define OFFCHIP_NR_IRQS 16 /* Must also be last */
83#else
84# define OFFCHIP_NR_IRQS 0
85#endif
86
87#if OFFCHIP_NR_IRQS > 0
88# define OFFCHIP_IRQ_BASE (ONCHIP_NR_IRQS + PINT_NR_IRQS)
89#endif
90
91/* NR_IRQS. 1+2+3 */
92#define NR_IRQS (ONCHIP_NR_IRQS + PINT_NR_IRQS + OFFCHIP_NR_IRQS)
93 12
94/* 13/*
95 * Convert back and forth between INTEVT and IRQ values. 14 * Convert back and forth between INTEVT and IRQ values.
diff --git a/include/asm-sh/kdebug.h b/include/asm-sh/kdebug.h
new file mode 100644
index 00000000000..ef009baf5a1
--- /dev/null
+++ b/include/asm-sh/kdebug.h
@@ -0,0 +1,35 @@
1#ifndef __ASM_SH_KDEBUG_H
2#define __ASM_SH_KDEBUG_H
3
4#include <linux/notifier.h>
5
6struct pt_regs;
7
8struct die_args {
9 struct pt_regs *regs;
10 int trapnr;
11};
12
13int register_die_notifier(struct notifier_block *nb);
14int unregister_die_notifier(struct notifier_block *nb);
15int register_page_fault_notifier(struct notifier_block *nb);
16int unregister_page_fault_notifier(struct notifier_block *nb);
17extern struct atomic_notifier_head shdie_chain;
18
19/* Grossly misnamed. */
20enum die_val {
21 DIE_TRAP,
22 DIE_PAGE_FAULT,
23};
24
25static inline int notify_die(enum die_val val, struct pt_regs *regs,
26 int trap, int sig)
27{
28 struct die_args args = {
29 .regs = regs,
30 .trapnr = trap,
31 };
32
33 return atomic_notifier_call_chain(&shdie_chain, val, &args);
34}
35#endif /* __ASM_SH_KDEBUG_H */
diff --git a/include/asm-sh/kexec.h b/include/asm-sh/kexec.h
index 9d235af20cd..da36a754860 100644
--- a/include/asm-sh/kexec.h
+++ b/include/asm-sh/kexec.h
@@ -1,5 +1,8 @@
1#ifndef _SH_KEXEC_H 1#ifndef __ASM_SH_KEXEC_H
2#define _SH_KEXEC_H 2#define __ASM_SH_KEXEC_H
3
4#include <asm/ptrace.h>
5#include <asm/string.h>
3 6
4/* 7/*
5 * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return. 8 * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
@@ -25,8 +28,37 @@
25 28
26#define MAX_NOTE_BYTES 1024 29#define MAX_NOTE_BYTES 1024
27 30
28/* Provide a dummy definition to avoid build failures. */
29static inline void crash_setup_regs(struct pt_regs *newregs, 31static inline void crash_setup_regs(struct pt_regs *newregs,
30 struct pt_regs *oldregs) { } 32 struct pt_regs *oldregs)
33{
34 if (oldregs)
35 memcpy(newregs, oldregs, sizeof(*newregs));
36 else {
37 __asm__ __volatile__ ("mov r0, %0" : "=r" (newregs->regs[0]));
38 __asm__ __volatile__ ("mov r1, %0" : "=r" (newregs->regs[1]));
39 __asm__ __volatile__ ("mov r2, %0" : "=r" (newregs->regs[2]));
40 __asm__ __volatile__ ("mov r3, %0" : "=r" (newregs->regs[3]));
41 __asm__ __volatile__ ("mov r4, %0" : "=r" (newregs->regs[4]));
42 __asm__ __volatile__ ("mov r5, %0" : "=r" (newregs->regs[5]));
43 __asm__ __volatile__ ("mov r6, %0" : "=r" (newregs->regs[6]));
44 __asm__ __volatile__ ("mov r7, %0" : "=r" (newregs->regs[7]));
45 __asm__ __volatile__ ("mov r8, %0" : "=r" (newregs->regs[8]));
46 __asm__ __volatile__ ("mov r9, %0" : "=r" (newregs->regs[9]));
47 __asm__ __volatile__ ("mov r10, %0" : "=r" (newregs->regs[10]));
48 __asm__ __volatile__ ("mov r11, %0" : "=r" (newregs->regs[11]));
49 __asm__ __volatile__ ("mov r12, %0" : "=r" (newregs->regs[12]));
50 __asm__ __volatile__ ("mov r13, %0" : "=r" (newregs->regs[13]));
51 __asm__ __volatile__ ("mov r14, %0" : "=r" (newregs->regs[14]));
52 __asm__ __volatile__ ("mov r15, %0" : "=r" (newregs->regs[15]));
53
54 __asm__ __volatile__ ("sts pr, %0" : "=r" (newregs->pr));
55 __asm__ __volatile__ ("sts macl, %0" : "=r" (newregs->macl));
56 __asm__ __volatile__ ("sts mach, %0" : "=r" (newregs->mach));
57
58 __asm__ __volatile__ ("stc gbr, %0" : "=r" (newregs->gbr));
59 __asm__ __volatile__ ("stc sr, %0" : "=r" (newregs->sr));
31 60
32#endif /* _SH_KEXEC_H */ 61 newregs->pc = (unsigned long)current_text_addr();
62 }
63}
64#endif /* __ASM_SH_KEXEC_H */
diff --git a/include/asm-sh/kgdb.h b/include/asm-sh/kgdb.h
index 0095c665d27..74bd0953e5c 100644
--- a/include/asm-sh/kgdb.h
+++ b/include/asm-sh/kgdb.h
@@ -17,6 +17,7 @@
17#define __KGDB_H 17#define __KGDB_H
18 18
19#include <asm/ptrace.h> 19#include <asm/ptrace.h>
20#include <asm/cacheflush.h>
20 21
21struct console; 22struct console;
22 23
@@ -45,35 +46,21 @@ extern int kgdb_portnum;
45extern int kgdb_baud; 46extern int kgdb_baud;
46extern char kgdb_parity; 47extern char kgdb_parity;
47extern char kgdb_bits; 48extern char kgdb_bits;
48extern int kgdb_console_setup(struct console *, char *);
49 49
50/* Init and interface stuff */ 50/* Init and interface stuff */
51extern int kgdb_init(void); 51extern int kgdb_init(void);
52extern int (*kgdb_serial_setup)(void);
53extern int (*kgdb_getchar)(void); 52extern int (*kgdb_getchar)(void);
54extern void (*kgdb_putchar)(int); 53extern void (*kgdb_putchar)(int);
55 54
56struct kgdb_sermap {
57 char *name;
58 int namelen;
59 int (*setup_fn)(struct console *, char *);
60 struct kgdb_sermap *next;
61};
62extern void kgdb_register_sermap(struct kgdb_sermap *map);
63extern struct kgdb_sermap *kgdb_porttype;
64
65/* Trap functions */ 55/* Trap functions */
66typedef void (kgdb_debug_hook_t)(struct pt_regs *regs); 56typedef void (kgdb_debug_hook_t)(struct pt_regs *regs);
67typedef void (kgdb_bus_error_hook_t)(void); 57typedef void (kgdb_bus_error_hook_t)(void);
68extern kgdb_debug_hook_t *kgdb_debug_hook; 58extern kgdb_debug_hook_t *kgdb_debug_hook;
69extern kgdb_bus_error_hook_t *kgdb_bus_err_hook; 59extern kgdb_bus_error_hook_t *kgdb_bus_err_hook;
70 60
71extern void breakpoint(void);
72
73/* Console */ 61/* Console */
74struct console;
75void kgdb_console_write(struct console *co, const char *s, unsigned count); 62void kgdb_console_write(struct console *co, const char *s, unsigned count);
76void kgdb_console_init(void); 63extern int kgdb_console_setup(struct console *, char *);
77 64
78/* Prototypes for jmp fns */ 65/* Prototypes for jmp fns */
79#define _JBLEN 9 66#define _JBLEN 9
@@ -81,11 +68,8 @@ typedef int jmp_buf[_JBLEN];
81extern void longjmp(jmp_buf __jmpb, int __retval); 68extern void longjmp(jmp_buf __jmpb, int __retval);
82extern int setjmp(jmp_buf __jmpb); 69extern int setjmp(jmp_buf __jmpb);
83 70
84/* Variadic macro to print our own message to the console */
85#define KGDB_PRINTK(...) printk("KGDB: " __VA_ARGS__)
86
87/* Forced breakpoint */ 71/* Forced breakpoint */
88#define BREAKPOINT() \ 72#define breakpoint() \
89do { \ 73do { \
90 if (kgdb_enabled) \ 74 if (kgdb_enabled) \
91 __asm__ __volatile__("trapa #0x3c"); \ 75 __asm__ __volatile__("trapa #0x3c"); \
@@ -95,7 +79,6 @@ do { \
95#if defined(CONFIG_CPU_SH4) 79#if defined(CONFIG_CPU_SH4)
96#define kgdb_flush_icache_range(start, end) \ 80#define kgdb_flush_icache_range(start, end) \
97{ \ 81{ \
98 extern void __flush_purge_region(void *, int); \
99 __flush_purge_region((void*)(start), (int)(end) - (int)(start));\ 82 __flush_purge_region((void*)(start), (int)(end) - (int)(start));\
100 flush_icache_range((start), (end)); \ 83 flush_icache_range((start), (end)); \
101} 84}
@@ -103,31 +86,6 @@ do { \
103#define kgdb_flush_icache_range(start, end) do { } while (0) 86#define kgdb_flush_icache_range(start, end) do { } while (0)
104#endif 87#endif
105 88
106/* Kernel assert macros */
107#ifdef CONFIG_KGDB_KERNEL_ASSERTS
108
109/* Predefined conditions */
110#define KA_VALID_ERRNO(errno) ((errno) > 0 && (errno) <= EMEDIUMTYPE)
111#define KA_VALID_PTR_ERR(ptr) KA_VALID_ERRNO(-PTR_ERR(ptr))
112#define KA_VALID_KPTR(ptr) (!(ptr) || \
113 ((void *)(ptr) >= (void *)PAGE_OFFSET && \
114 (void *)(ptr) < ERR_PTR(-EMEDIUMTYPE)))
115#define KA_VALID_PTRORERR(errptr) \
116 (KA_VALID_KPTR(errptr) || KA_VALID_PTR_ERR(errptr))
117#define KA_HELD_GKL() (current->lock_depth >= 0)
118
119/* The actual assert */
120#define KGDB_ASSERT(condition, message) do { \
121 if (!(condition) && (kgdb_enabled)) { \
122 KGDB_PRINTK("Assertion failed at %s:%d: %s\n", \
123 __FILE__, __LINE__, message);\
124 BREAKPOINT(); \
125 } \
126} while (0)
127#else
128#define KGDB_ASSERT(condition, message)
129#endif
130
131/* Taken from sh-stub.c of GDB 4.18 */ 89/* Taken from sh-stub.c of GDB 4.18 */
132static const char hexchars[] = "0123456789abcdef"; 90static const char hexchars[] = "0123456789abcdef";
133 91
@@ -142,5 +100,4 @@ static inline char lowhex(const int x)
142{ 100{
143 return hexchars[x & 0xf]; 101 return hexchars[x & 0xf];
144} 102}
145
146#endif 103#endif
diff --git a/include/asm-sh/lboxre2.h b/include/asm-sh/lboxre2.h
new file mode 100644
index 00000000000..e6d16050492
--- /dev/null
+++ b/include/asm-sh/lboxre2.h
@@ -0,0 +1,27 @@
1#ifndef __ASM_SH_LBOXRE2_H
2#define __ASM_SH_LBOXRE2_H
3
4/*
5 * Copyright (C) 2007 Nobuhiro Iwamatsu
6 *
7 * NTT COMWARE L-BOX RE2 support
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 *
13 */
14
15#define IRQ_CF1 9 /* CF1 */
16#define IRQ_CF0 10 /* CF0 */
17#define IRQ_INTD 11 /* INTD */
18#define IRQ_ETH1 12 /* Ether1 */
19#define IRQ_ETH0 13 /* Ether0 */
20#define IRQ_INTA 14 /* INTA */
21
22void init_lboxre2_IRQ(void);
23
24#define __IO_PREFIX lboxre2
25#include <asm/io_generic.h>
26
27#endif /* __ASM_SH_LBOXRE2_H */
diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h
index 01acaaae975..199662bb35c 100644
--- a/include/asm-sh/mmu_context.h
+++ b/include/asm-sh/mmu_context.h
@@ -169,6 +169,8 @@ enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
169#define destroy_context(mm) do { } while (0) 169#define destroy_context(mm) do { } while (0)
170#define set_asid(asid) do { } while (0) 170#define set_asid(asid) do { } while (0)
171#define get_asid() (0) 171#define get_asid() (0)
172#define set_TTB(pgd) do { } while (0)
173#define get_TTB() (0)
172#define activate_context(mm,cpu) do { } while (0) 174#define activate_context(mm,cpu) do { } while (0)
173#define switch_mm(prev,next,tsk) do { } while (0) 175#define switch_mm(prev,next,tsk) do { } while (0)
174#define deactivate_mm(tsk,mm) do { } while (0) 176#define deactivate_mm(tsk,mm) do { } while (0)
@@ -211,8 +213,8 @@ static inline void disable_mmu(void)
211 * MMU control handlers for processors lacking memory 213 * MMU control handlers for processors lacking memory
212 * management hardware. 214 * management hardware.
213 */ 215 */
214#define enable_mmu() do { BUG(); } while (0) 216#define enable_mmu() do { } while (0)
215#define disable_mmu() do { BUG(); } while (0) 217#define disable_mmu() do { } while (0)
216#endif 218#endif
217 219
218#endif /* __KERNEL__ */ 220#endif /* __KERNEL__ */
diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h
index ac4b4677f28..7464de4ba07 100644
--- a/include/asm-sh/page.h
+++ b/include/asm-sh/page.h
@@ -59,6 +59,7 @@ extern void (*clear_page)(void *to);
59extern void (*copy_page)(void *to, void *from); 59extern void (*copy_page)(void *to, void *from);
60 60
61extern unsigned long shm_align_mask; 61extern unsigned long shm_align_mask;
62extern unsigned long max_low_pfn, min_low_pfn;
62 63
63#ifdef CONFIG_MMU 64#ifdef CONFIG_MMU
64extern void clear_page_slow(void *to); 65extern void clear_page_slow(void *to);
@@ -124,17 +125,16 @@ typedef struct { unsigned long pgd; } pgd_t;
124#define PAGE_OFFSET CONFIG_PAGE_OFFSET 125#define PAGE_OFFSET CONFIG_PAGE_OFFSET
125#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) 126#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
126#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) 127#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
128#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
127 129
128#define MAP_NR(addr) (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT) 130#define phys_to_page(phys) (pfn_to_page(phys >> PAGE_SHIFT))
129 131#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
130#define phys_to_page(phys) (mem_map + (((phys)-__MEMORY_START) >> PAGE_SHIFT))
131#define page_to_phys(page) (((page - mem_map) << PAGE_SHIFT) + __MEMORY_START)
132 132
133/* PFN start number, because of __MEMORY_START */ 133/* PFN start number, because of __MEMORY_START */
134#define PFN_START (__MEMORY_START >> PAGE_SHIFT) 134#define PFN_START (__MEMORY_START >> PAGE_SHIFT)
135#define ARCH_PFN_OFFSET (PFN_START) 135#define ARCH_PFN_OFFSET (PFN_START)
136#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) 136#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
137#define pfn_valid(pfn) (((pfn) - PFN_START) < max_mapnr) 137#define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_low_pfn)
138#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) 138#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
139 139
140#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 140#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
diff --git a/include/asm-sh/param.h b/include/asm-sh/param.h
index ce13064fec2..1012296e07a 100644
--- a/include/asm-sh/param.h
+++ b/include/asm-sh/param.h
@@ -5,7 +5,7 @@
5# ifdef CONFIG_SH_WDT 5# ifdef CONFIG_SH_WDT
6# define HZ 1000 /* Needed for high-res WOVF */ 6# define HZ 1000 /* Needed for high-res WOVF */
7# else 7# else
8# define HZ 100 8# define HZ CONFIG_HZ
9# endif 9# endif
10# define USER_HZ 100 /* User interfaces are in "ticks" */ 10# define USER_HZ 100 /* User interfaces are in "ticks" */
11# define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */ 11# define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */
diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h
index 6ccc948fe21..b1f9a9e0231 100644
--- a/include/asm-sh/pci.h
+++ b/include/asm-sh/pci.h
@@ -35,7 +35,7 @@ extern struct pci_channel board_pci_channels[];
35/* 35/*
36 * I/O routine helpers 36 * I/O routine helpers
37 */ 37 */
38#ifdef CONFIG_CPU_SUBTYPE_SH7780 38#if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785)
39#define PCI_IO_AREA 0xFE400000 39#define PCI_IO_AREA 0xFE400000
40#define PCI_IO_SIZE 0x00400000 40#define PCI_IO_SIZE 0x00400000
41#else 41#else
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index 3e46a7afe76..d42f68e724f 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -44,7 +44,7 @@ enum cpu_type {
44 /* SH-3 types */ 44 /* SH-3 types */
45 CPU_SH7705, CPU_SH7706, CPU_SH7707, 45 CPU_SH7705, CPU_SH7706, CPU_SH7707,
46 CPU_SH7708, CPU_SH7708S, CPU_SH7708R, 46 CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
47 CPU_SH7709, CPU_SH7709A, CPU_SH7710, 47 CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
48 CPU_SH7729, CPU_SH7300, 48 CPU_SH7729, CPU_SH7300,
49 49
50 /* SH-4 types */ 50 /* SH-4 types */
diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h
index c18f648a799..4083b594992 100644
--- a/include/asm-sh/r7780rp.h
+++ b/include/asm-sh/r7780rp.h
@@ -1,17 +1,11 @@
1#ifndef __ASM_SH_RENESAS_R7780RP_H 1#ifndef __ASM_SH_RENESAS_R7780RP_H
2#define __ASM_SH_RENESAS_R7780RP_H 2#define __ASM_SH_RENESAS_R7780RP_H
3 3
4/*
5 * linux/include/asm-sh/r7780rp.h
6 *
7 * Copyright (C) 2000 Atom Create Engineering Co., Ltd.
8 *
9 * Renesas Solutions Highlander R7780RP support
10 */
11
12/* Box specific addresses. */ 4/* Box specific addresses. */
13#if defined(CONFIG_SH_R7780MP) 5#if defined(CONFIG_SH_R7780MP)
14#define PA_BCR 0xa4000000 /* FPGA */ 6#define PA_BCR 0xa4000000 /* FPGA */
7#define PA_SDPOW (-1)
8
15#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ 9#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
16#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */ 10#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */
17#define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */ 11#define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */
@@ -70,18 +64,12 @@
70#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */ 64#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */
71#define PA_PMR (PA_BCR+0x0900) /* */ 65#define PA_PMR (PA_BCR+0x0900) /* */
72 66
73#define PA_AX88796L 0xa4100400 /* AX88796L Area */
74#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */
75#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
76#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
77
78#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ 67#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
79 68
80#define IRQ_PCISLOT1 65 /* PCI Slot #1 IRQ */ 69#define IRQ_PCISLOT1 65 /* PCI Slot #1 IRQ */
81#define IRQ_PCISLOT2 66 /* PCI Slot #2 IRQ */ 70#define IRQ_PCISLOT2 66 /* PCI Slot #2 IRQ */
82#define IRQ_PCISLOT3 67 /* PCI Slot #3 IRQ */ 71#define IRQ_PCISLOT3 67 /* PCI Slot #3 IRQ */
83#define IRQ_PCISLOT4 68 /* PCI Slot #4 IRQ */ 72#define IRQ_PCISLOT4 68 /* PCI Slot #4 IRQ */
84// #define IRQ_CFINST 0 /* CF Card Insert IRQ */
85#define IRQ_TP 2 /* Touch Panel IRQ */ 73#define IRQ_TP 2 /* Touch Panel IRQ */
86#define IRQ_SCI1 3 /* SCI1 IRQ */ 74#define IRQ_SCI1 3 /* SCI1 IRQ */
87#define IRQ_SCI0 4 /* SCI0 IRQ */ 75#define IRQ_SCI0 4 /* SCI0 IRQ */
@@ -95,7 +83,10 @@
95#define IRQ_ONETH 13 /* On board Ethernet IRQ */ 83#define IRQ_ONETH 13 /* On board Ethernet IRQ */
96#define IRQ_PSW 14 /* Push Switch IRQ */ 84#define IRQ_PSW 14 /* Push Switch IRQ */
97 85
98#else /* R7780RP */ 86#define IVDR_CK_ON 8 /* iVDR Clock ON */
87
88#elif defined(CONFIG_SH_R7780RP)
89#define PA_POFF (-1)
99 90
100#define PA_BCR 0xa5000000 /* FPGA */ 91#define PA_BCR 0xa5000000 /* FPGA */
101#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ 92#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
@@ -163,7 +154,60 @@
163#define IRQ_PSW 13 /* Push Switch IRQ */ 154#define IRQ_PSW 13 /* Push Switch IRQ */
164#define IRQ_ZIGBEE 14 /* Ziggbee IO IRQ */ 155#define IRQ_ZIGBEE 14 /* Ziggbee IO IRQ */
165 156
166#endif /* CONFIG_SH_R7780MP */ 157#define IVDR_CK_ON 8 /* iVDR Clock ON */
158
159#elif defined(CONFIG_SH_R7785RP)
160#define PA_BCR 0xa4000000 /* FPGA */
161#define PA_SDPOW (-1)
162
163#define PA_PCISCR (PA_BCR+0x0000)
164#define PA_IRLPRA (PA_BCR+0x0002)
165#define PA_IRLPRB (PA_BCR+0x0004)
166#define PA_IRLPRC (PA_BCR+0x0006)
167#define PA_IRLPRD (PA_BCR+0x0008)
168#define IRLCNTR1 (PA_BCR+0x0010)
169#define PA_IRLPRE (PA_BCR+0x000a)
170#define PA_IRLPRF (PA_BCR+0x000c)
171#define PA_EXIRLCR (PA_BCR+0x000e)
172#define PA_IRLMCR1 (PA_BCR+0x0010)
173#define PA_IRLMCR2 (PA_BCR+0x0012)
174#define PA_IRLSSR1 (PA_BCR+0x0014)
175#define PA_IRLSSR2 (PA_BCR+0x0016)
176#define PA_CFTCR (PA_BCR+0x0100)
177#define PA_CFPCR (PA_BCR+0x0102)
178#define PA_PCICR (PA_BCR+0x0110)
179#define PA_IVDRCTL (PA_BCR+0x0112)
180#define PA_IVDRSR (PA_BCR+0x0114)
181#define PA_PDRSTCR (PA_BCR+0x0116)
182#define PA_POFF (PA_BCR+0x0120)
183#define PA_LCDCR (PA_BCR+0x0130)
184#define PA_TPCR (PA_BCR+0x0140)
185#define PA_TPCKCR (PA_BCR+0x0142)
186#define PA_TPRSTR (PA_BCR+0x0144)
187#define PA_TPXPDR (PA_BCR+0x0146)
188#define PA_TPYPDR (PA_BCR+0x0148)
189#define PA_GPIOPFR (PA_BCR+0x0150)
190#define PA_GPIODR (PA_BCR+0x0152)
191#define PA_OBLED (PA_BCR+0x0154)
192#define PA_SWSR (PA_BCR+0x0156)
193#define PA_VERREG (PA_BCR+0x0158)
194#define PA_SMCR (PA_BCR+0x0200)
195#define PA_SMSMADR (PA_BCR+0x0202)
196#define PA_SMMR (PA_BCR+0x0204)
197#define PA_SMSADR1 (PA_BCR+0x0206)
198#define PA_SMSADR32 (PA_BCR+0x0244)
199#define PA_SMTRDR1 (PA_BCR+0x0246)
200#define PA_SMTRDR16 (PA_BCR+0x0264)
201#define PA_CU3MDR (PA_BCR+0x0300)
202#define PA_CU5MDR (PA_BCR+0x0302)
203#define PA_MMSR (PA_BCR+0x0400)
204
205#define IVDR_CK_ON 4 /* iVDR Clock ON */
206
207#endif
208
209void make_r7780rp_irq(unsigned int irq);
210void highlander_init_irq(void);
167 211
168#define __IO_PREFIX r7780rp 212#define __IO_PREFIX r7780rp
169#include <asm/io_generic.h> 213#include <asm/io_generic.h>
diff --git a/include/asm-sh/se.h b/include/asm-sh/se.h
index a1832154a3a..bd2596c014a 100644
--- a/include/asm-sh/se.h
+++ b/include/asm-sh/se.h
@@ -69,9 +69,11 @@
69#define BCR_ILCRG (PA_BCR + 12) 69#define BCR_ILCRG (PA_BCR + 12)
70 70
71#if defined(CONFIG_CPU_SUBTYPE_SH7705) 71#if defined(CONFIG_CPU_SUBTYPE_SH7705)
72#define IRQ_STNIC 12 72#define IRQ_STNIC 12
73#define IRQ_CFCARD 14
73#else 74#else
74#define IRQ_STNIC 10 75#define IRQ_STNIC 10
76#define IRQ_CFCARD 7
75#endif 77#endif
76 78
77#define __IO_PREFIX se 79#define __IO_PREFIX se
diff --git a/include/asm-sh/se7722.h b/include/asm-sh/se7722.h
new file mode 100644
index 00000000000..b3b31e4725c
--- /dev/null
+++ b/include/asm-sh/se7722.h
@@ -0,0 +1,118 @@
1#ifndef __ASM_SH_SE7722_H
2#define __ASM_SH_SE7722_H
3
4/*
5 * linux/include/asm-sh/se7722.h
6 *
7 * Copyright (C) 2007 Nobuhiro Iwamatsu
8 *
9 * Hitachi UL SolutionEngine 7722 Support.
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 *
15 */
16#include <asm/addrspace.h>
17
18/* Box specific addresses. */
19#define SE_AREA0_WIDTH 4 /* Area0: 32bit */
20#define PA_ROM 0xa0000000 /* EPROM */
21#define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */
22#define PA_FROM 0xa1000000 /* Flash-ROM */
23#define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */
24#define PA_EXT1 0xa4000000
25#define PA_EXT1_SIZE 0x04000000
26#define PA_SDRAM 0xaC000000 /* DDR-SDRAM(Area3) 64MB */
27#define PA_SDRAM_SIZE 0x04000000
28
29#define PA_EXT4 0xb0000000
30#define PA_EXT4_SIZE 0x04000000
31
32#define PA_PERIPHERAL 0xB0000000
33
34#define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */
35#define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0) /* MR-SHPC-01 PCMCIA controller */
36#define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000) /* MR-SHPC-01 memory window base */
37#define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000) /* MR-SHPC-01 attribute window base */
38#define PA_MRSHPC_IO (PA_PERIPHERAL + 0x00600000) /* MR-SHPC-01 I/O window base */
39#define MRSHPC_OPTION (PA_MRSHPC + 6)
40#define MRSHPC_CSR (PA_MRSHPC + 8)
41#define MRSHPC_ISR (PA_MRSHPC + 10)
42#define MRSHPC_ICR (PA_MRSHPC + 12)
43#define MRSHPC_CPWCR (PA_MRSHPC + 14)
44#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
45#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
46#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
47#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
48#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
49#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
50#define MRSHPC_CDCR (PA_MRSHPC + 28)
51#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
52
53#define PA_LED (PA_PERIPHERAL + 0x00800000) /* 8bit LED */
54#define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */
55
56#define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */
57/* GPIO */
58#define MSTPCR0 0xA4150030UL
59#define MSTPCR1 0xA4150034UL
60#define MSTPCR2 0xA4150038UL
61
62#define FPGA_IN 0xb1840000UL
63#define FPGA_OUT 0xb1840004UL
64
65#define PORT_PECR 0xA4050108UL
66#define PORT_PJCR 0xA4050110UL
67#define PORT_PSELD 0xA4050154UL
68#define PORT_PSELB 0xA4050150UL
69
70#define PORT_PSELC 0xA4050152UL
71#define PORT_PKCR 0xA4050112UL
72#define PORT_PHCR 0xA405010EUL
73#define PORT_PLCR 0xA4050114UL
74#define PORT_PMCR 0xA4050116UL
75#define PORT_PRCR 0xA405011CUL
76#define PORT_PXCR 0xA4050148UL
77#define PORT_PSELA 0xA405014EUL
78#define PORT_PYCR 0xA405014AUL
79#define PORT_PZCR 0xA405014CUL
80
81/* IRQ */
82#define IRQ0_IRQ 32
83#define IRQ1_IRQ 33
84#define INTC_ICR0 0xA4140000UL
85#define INTC_ICR1 0xA414001CUL
86
87#define INTMSK0 0xa4140044
88#define INTMSKCLR0 0xa4140064
89#define INTC_INTPRI0 0xa4140010
90
91#define IRQ01_MODE 0xb1800000
92#define IRQ01_STS 0xb1800004
93#define IRQ01_MASK 0xb1800008
94#define EXT_BIT (0x3fc0) /* SH IRQ1 */
95#define MRSHPC_BIT0 (0x0004) /* SH IRQ1 */
96#define MRSHPC_BIT1 (0x0008) /* SH IRQ1 */
97#define MRSHPC_BIT2 (0x0010) /* SH IRQ1 */
98#define MRSHPC_BIT3 (0x0020) /* SH IRQ1 */
99#define SMC_BIT (0x0002) /* SH IRQ0 */
100#define USB_BIT (0x0001) /* SH IRQ0 */
101
102#define MRSHPC_IRQ3 11
103#define MRSHPC_IRQ2 12
104#define MRSHPC_IRQ1 13
105#define MRSHPC_IRQ0 14
106#define SMC_IRQ 10
107#define EXT_IRQ 5
108#define USB_IRQ 6
109
110
111/* arch/sh/boards/se/7722/irq.c */
112void init_se7722_IRQ(void);
113int se7722_irq_demux(int);
114
115#define __IO_PREFIX se7722
116#include <asm/io_generic.h>
117
118#endif /* __ASM_SH_SE7722_H */
diff --git a/include/asm-sh/se7751.h b/include/asm-sh/se7751.h
index 88cd379d908..02ca9347f04 100644
--- a/include/asm-sh/se7751.h
+++ b/include/asm-sh/se7751.h
@@ -65,6 +65,8 @@
65 65
66#define IRQ_79C973 13 66#define IRQ_79C973 13
67 67
68void init_7751se_IRQ(void);
69
68#define __IO_PREFIX sh7751se 70#define __IO_PREFIX sh7751se
69#include <asm/io_generic.h> 71#include <asm/io_generic.h>
70 72
diff --git a/include/asm-sh/se7780.h b/include/asm-sh/se7780.h
new file mode 100644
index 00000000000..40e9b41458c
--- /dev/null
+++ b/include/asm-sh/se7780.h
@@ -0,0 +1,108 @@
1#ifndef __ASM_SH_SE7780_H
2#define __ASM_SH_SE7780_H
3
4/*
5 * linux/include/asm-sh/se7780.h
6 *
7 * Copyright (C) 2006,2007 Nobuhiro Iwamatsu
8 *
9 * Hitachi UL SolutionEngine 7780 Support.
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#include <asm/addrspace.h>
16
17/* Box specific addresses. */
18#define SE_AREA0_WIDTH 4 /* Area0: 32bit */
19#define PA_ROM 0xa0000000 /* EPROM */
20#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */
21#define PA_FROM 0xa1000000 /* Flash-ROM */
22#define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */
23#define PA_EXT1 0xa4000000
24#define PA_EXT1_SIZE 0x04000000
25#define PA_SM501 PA_EXT1 /* Graphic IC (SM501) */
26#define PA_SM501_SIZE PA_EXT1_SIZE /* Graphic IC (SM501) */
27#define PA_SDRAM 0xa8000000 /* DDR-SDRAM(Area2/3) 128MB */
28#define PA_SDRAM_SIZE 0x08000000
29
30#define PA_EXT4 0xb0000000
31#define PA_EXT4_SIZE 0x04000000
32#define PA_EXT_FLASH PA_EXT4 /* Expansion Flash-ROM */
33
34#define PA_PERIPHERAL PA_AREA6_IO /* SW6-6=ON */
35
36#define PA_LAN (PA_PERIPHERAL + 0) /* SMC LAN91C111 */
37#define PA_LED_DISP (PA_PERIPHERAL + 0x02000000) /* 8words LED Display */
38#define DISP_CHAR_RAM (7 << 3)
39#define DISP_SEL0_ADDR (DISP_CHAR_RAM + 0)
40#define DISP_SEL1_ADDR (DISP_CHAR_RAM + 1)
41#define DISP_SEL2_ADDR (DISP_CHAR_RAM + 2)
42#define DISP_SEL3_ADDR (DISP_CHAR_RAM + 3)
43#define DISP_SEL4_ADDR (DISP_CHAR_RAM + 4)
44#define DISP_SEL5_ADDR (DISP_CHAR_RAM + 5)
45#define DISP_SEL6_ADDR (DISP_CHAR_RAM + 6)
46#define DISP_SEL7_ADDR (DISP_CHAR_RAM + 7)
47
48#define DISP_UDC_RAM (5 << 3)
49#define PA_FPGA (PA_PERIPHERAL + 0x03000000) /* FPGA base address */
50
51/* FPGA register address and bit */
52#define FPGA_SFTRST (PA_FPGA + 0) /* Soft reset register */
53#define FPGA_INTMSK1 (PA_FPGA + 2) /* Interrupt Mask register 1 */
54#define FPGA_INTMSK2 (PA_FPGA + 4) /* Interrupt Mask register 2 */
55#define FPGA_INTSEL1 (PA_FPGA + 6) /* Interrupt select register 1 */
56#define FPGA_INTSEL2 (PA_FPGA + 8) /* Interrupt select register 2 */
57#define FPGA_INTSEL3 (PA_FPGA + 10) /* Interrupt select register 3 */
58#define FPGA_PCI_INTSEL1 (PA_FPGA + 12) /* PCI Interrupt select register 1 */
59#define FPGA_PCI_INTSEL2 (PA_FPGA + 14) /* PCI Interrupt select register 2 */
60#define FPGA_INTSET (PA_FPGA + 16) /* IRQ/IRL select register */
61#define FPGA_INTSTS1 (PA_FPGA + 18) /* Interrupt status register 1 */
62#define FPGA_INTSTS2 (PA_FPGA + 20) /* Interrupt status register 2 */
63#define FPGA_REQSEL (PA_FPGA + 22) /* REQ/GNT select register */
64#define FPGA_DBG_LED (PA_FPGA + 32) /* Debug LED(D-LED[8:1] */
65#define PA_LED FPGA_DBG_LED
66#define FPGA_IVDRID (PA_FPGA + 36) /* iVDR ID Register */
67#define FPGA_IVDRPW (PA_FPGA + 38) /* iVDR Power ON Register */
68#define FPGA_MMCID (PA_FPGA + 40) /* MMC ID Register */
69
70/* FPGA INTSEL position */
71/* INTSEL1 */
72#define IRQPOS_SMC91CX (0 * 4)
73#define IRQPOS_SM501 (1 * 4)
74/* INTSEL2 */
75#define IRQPOS_EXTINT1 (0 * 4)
76#define IRQPOS_EXTINT2 (1 * 4)
77#define IRQPOS_EXTINT3 (2 * 4)
78#define IRQPOS_EXTINT4 (3 * 4)
79/* INTSEL3 */
80#define IRQPOS_PCCPW (0 * 4)
81
82/* IDE interrupt */
83#define IRQ_IDE0 67 /* iVDR */
84
85/* SMC interrupt */
86#define SMC_IRQ 8
87
88/* SM501 interrupt */
89#define SM501_IRQ 0
90
91/* interrupt pin */
92#define IRQPIN_EXTINT1 0 /* IRQ0 pin */
93#define IRQPIN_EXTINT2 1 /* IRQ1 pin */
94#define IRQPIN_EXTINT3 2 /* IRQ2 pin */
95#define IRQPIN_SMC91CX 3 /* IRQ3 pin */
96#define IRQPIN_EXTINT4 4 /* IRQ4 pin */
97#define IRQPIN_PCC0 5 /* IRQ5 pin */
98#define IRQPIN_PCC2 6 /* IRQ6 pin */
99#define IRQPIN_SM501 7 /* IRQ7 pin */
100#define IRQPIN_PCCPW 7 /* IRQ7 pin */
101
102/* arch/sh/boards/se/7780/irq.c */
103void init_se7780_IRQ(void);
104
105#define __IO_PREFIX se7780
106#include <asm/io_generic.h>
107
108#endif /* __ASM_SH_SE7780_H */
diff --git a/include/asm-sh/stat.h b/include/asm-sh/stat.h
index 6c41a60657f..6d6ad26e3a2 100644
--- a/include/asm-sh/stat.h
+++ b/include/asm-sh/stat.h
@@ -16,15 +16,13 @@ struct __old_kernel_stat {
16}; 16};
17 17
18struct stat { 18struct stat {
19 unsigned short st_dev; 19 unsigned long st_dev;
20 unsigned short __pad1; 20 unsigned long st_ino;
21 unsigned long st_ino;
22 unsigned short st_mode; 21 unsigned short st_mode;
23 unsigned short st_nlink; 22 unsigned short st_nlink;
24 unsigned short st_uid; 23 unsigned short st_uid;
25 unsigned short st_gid; 24 unsigned short st_gid;
26 unsigned short st_rdev; 25 unsigned long st_rdev;
27 unsigned short __pad2;
28 unsigned long st_size; 26 unsigned long st_size;
29 unsigned long st_blksize; 27 unsigned long st_blksize;
30 unsigned long st_blocks; 28 unsigned long st_blocks;
@@ -38,8 +36,6 @@ struct stat {
38 unsigned long __unused5; 36 unsigned long __unused5;
39}; 37};
40 38
41#define STAT_HAVE_NSEC 1
42
43/* This matches struct stat64 in glibc2.1, hence the absolutely 39/* This matches struct stat64 in glibc2.1, hence the absolutely
44 * insane amounts of padding around dev_t's. 40 * insane amounts of padding around dev_t's.
45 */ 41 */
@@ -47,7 +43,9 @@ struct stat64 {
47 unsigned long long st_dev; 43 unsigned long long st_dev;
48 unsigned char __pad0[4]; 44 unsigned char __pad0[4];
49 45
50 unsigned long st_ino; 46#define STAT64_HAS_BROKEN_ST_INO 1
47 unsigned long __st_ino;
48
51 unsigned int st_mode; 49 unsigned int st_mode;
52 unsigned int st_nlink; 50 unsigned int st_nlink;
53 51
@@ -71,8 +69,9 @@ struct stat64 {
71 unsigned long st_ctime; 69 unsigned long st_ctime;
72 unsigned long st_ctime_nsec; 70 unsigned long st_ctime_nsec;
73 71
74 unsigned long __unused1; 72 unsigned long long st_ino;
75 unsigned long __unused2;
76}; 73};
77 74
75#define STAT_HAVE_NSEC 1
76
78#endif /* __ASM_SH_STAT_H */ 77#endif /* __ASM_SH_STAT_H */
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h
index 4a6a19f4f8a..127af304865 100644
--- a/include/asm-sh/system.h
+++ b/include/asm-sh/system.h
@@ -9,6 +9,7 @@
9#include <linux/irqflags.h> 9#include <linux/irqflags.h>
10#include <linux/compiler.h> 10#include <linux/compiler.h>
11#include <asm/types.h> 11#include <asm/types.h>
12#include <asm/ptrace.h>
12 13
13/* 14/*
14 * switch_to() should switch tasks to task nr n, first 15 * switch_to() should switch tasks to task nr n, first
@@ -255,6 +256,8 @@ static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
255 (unsigned long)_n_, sizeof(*(ptr))); \ 256 (unsigned long)_n_, sizeof(*(ptr))); \
256 }) 257 })
257 258
259extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn));
260
258extern void *set_exception_table_vec(unsigned int vec, void *handler); 261extern void *set_exception_table_vec(unsigned int vec, void *handler);
259 262
260static inline void *set_exception_table_evt(unsigned int evt, void *handler) 263static inline void *set_exception_table_evt(unsigned int evt, void *handler)
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-15 13:23:40 -0400