aboutsummaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorViresh Kumar <viresh.kumar@st.com>2011-08-05 06:02:42 -0400
committerVinod Koul <vinod.koul@intel.com>2011-08-25 10:03:39 -0400
commit0a2356572b1910cc977f4ccf3c9ee1ecab08327a (patch)
treea2e5c45222c72d2f9d5b89e8e25e9e463fafb319 /include
parent036f05fd6dcdb6a6b9e55703cb663112fa4c4e42 (diff)
dmaengine/amba-pl08x: Pass flow controller information with slave channel data
At least, on SPEAr platforms there is one peripheral, JPEG, which can be flow controller for DMA transfer. Currently DMA controller driver didn't support peripheral flow controller configurations. This patch adds device_fc field in struct pl08x_channel_data, which will be used only for slave transfers and is not used in case of mem2mem transfers. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/amba/pl08x.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/amba/pl08x.h b/include/linux/amba/pl08x.h
index ecd17f581e7..a22662c9398 100644
--- a/include/linux/amba/pl08x.h
+++ b/include/linux/amba/pl08x.h
@@ -47,6 +47,9 @@ enum {
47 * @muxval: a number usually used to poke into some mux regiser to 47 * @muxval: a number usually used to poke into some mux regiser to
48 * mux in the signal to this channel 48 * mux in the signal to this channel
49 * @cctl_opt: default options for the channel control register 49 * @cctl_opt: default options for the channel control register
50 * @device_fc: Flow Controller Settings for ccfg register. Only valid for slave
51 * channels. Fill with 'true' if peripheral should be flow controller. Direction
52 * will be selected at Runtime.
50 * @addr: source/target address in physical memory for this DMA channel, 53 * @addr: source/target address in physical memory for this DMA channel,
51 * can be the address of a FIFO register for burst requests for example. 54 * can be the address of a FIFO register for burst requests for example.
52 * This can be left undefined if the PrimeCell API is used for configuring 55 * This can be left undefined if the PrimeCell API is used for configuring
@@ -65,6 +68,7 @@ struct pl08x_channel_data {
65 int max_signal; 68 int max_signal;
66 u32 muxval; 69 u32 muxval;
67 u32 cctl; 70 u32 cctl;
71 bool device_fc;
68 dma_addr_t addr; 72 dma_addr_t addr;
69 bool circular_buffer; 73 bool circular_buffer;
70 bool single; 74 bool single;