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authorLinus Torvalds <torvalds@linux-foundation.org>2012-07-26 13:23:47 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-07-26 13:23:47 -0400
commit9fc377799bc9bfd8d5cb35d0d1ea2e2458cbdbb3 (patch)
treefe93603b4e33dd50ff5f95ff769a0748b230cdf9 /include/linux/usb/ehci_def.h
parent5e23ae49960d05f578a73ecd19749c45af682c2b (diff)
parente387ef5c47ddeaeaa3cbdc54424cdb7a28dae2c0 (diff)
Merge tag 'usb-3.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB patches from Greg Kroah-Hartman: "Here's the big USB patch set for the 3.6-rc1 merge window. Lots of little changes in here, primarily for gadget controllers and drivers. There's some scsi changes that I think also went in through the scsi tree, but they merge just fine. All of these patches have been in the linux-next tree for a while now. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>" Fix up trivial conflicts in include/scsi/scsi_device.h (same libata conflict that Jeff had already encountered) * tag 'usb-3.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (207 commits) usb: Add USB_QUIRK_RESET_RESUME for all Logitech UVC webcams usb: Add quirk detection based on interface information usb: s3c-hsotg: Add header file protection macros in s3c-hsotg.h USB: ehci-s5p: Add vbus setup function to the s5p ehci glue layer USB: add USB_VENDOR_AND_INTERFACE_INFO() macro USB: notify phy when root hub port connect change USB: remove 8 bytes of padding from usb_host_interface on 64 bit builds USB: option: add ZTE MF821D USB: sierra: QMI mode MC7710 moved to qcserial USB: qcserial: adding Sierra Wireless devices USB: qcserial: support generic Qualcomm serial ports USB: qcserial: make probe more flexible USB: qcserial: centralize probe exit path USB: qcserial: consolidate usb_set_interface calls USB: ehci-s5p: Add support for device tree USB: ohci-exynos: Add support for device tree USB: ehci-omap: fix compile failure(v1) usb: host: tegra: pass correct pointer in ehci_setup() USB: ehci-fsl: Update ifdef check to work on 64-bit ppc USB: serial: keyspan: Removed unrequired parentheses. ...
Diffstat (limited to 'include/linux/usb/ehci_def.h')
-rw-r--r--include/linux/usb/ehci_def.h28
1 files changed, 21 insertions, 7 deletions
diff --git a/include/linux/usb/ehci_def.h b/include/linux/usb/ehci_def.h
index 7cc95ee3606..de4b9ed5d5d 100644
--- a/include/linux/usb/ehci_def.h
+++ b/include/linux/usb/ehci_def.h
@@ -111,7 +111,13 @@ struct ehci_regs {
111 /* ASYNCLISTADDR: offset 0x18 */ 111 /* ASYNCLISTADDR: offset 0x18 */
112 u32 async_next; /* address of next async queue head */ 112 u32 async_next; /* address of next async queue head */
113 113
114 u32 reserved[9]; 114 u32 reserved1[2];
115
116 /* TXFILLTUNING: offset 0x24 */
117 u32 txfill_tuning; /* TX FIFO Tuning register */
118#define TXFIFO_DEFAULT (8<<16) /* FIFO burst threshold 8 */
119
120 u32 reserved2[6];
115 121
116 /* CONFIGFLAG: offset 0x40 */ 122 /* CONFIGFLAG: offset 0x40 */
117 u32 configured_flag; 123 u32 configured_flag;
@@ -155,26 +161,34 @@ struct ehci_regs {
155#define PORT_CSC (1<<1) /* connect status change */ 161#define PORT_CSC (1<<1) /* connect status change */
156#define PORT_CONNECT (1<<0) /* device connected */ 162#define PORT_CONNECT (1<<0) /* device connected */
157#define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC) 163#define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
158};
159 164
160#define USBMODE 0x68 /* USB Device mode */ 165 u32 reserved3[9];
166
167 /* USBMODE: offset 0x68 */
168 u32 usbmode; /* USB Device mode */
161#define USBMODE_SDIS (1<<3) /* Stream disable */ 169#define USBMODE_SDIS (1<<3) /* Stream disable */
162#define USBMODE_BE (1<<2) /* BE/LE endianness select */ 170#define USBMODE_BE (1<<2) /* BE/LE endianness select */
163#define USBMODE_CM_HC (3<<0) /* host controller mode */ 171#define USBMODE_CM_HC (3<<0) /* host controller mode */
164#define USBMODE_CM_IDLE (0<<0) /* idle state */ 172#define USBMODE_CM_IDLE (0<<0) /* idle state */
165 173
174 u32 reserved4[7];
175
166/* Moorestown has some non-standard registers, partially due to the fact that 176/* Moorestown has some non-standard registers, partially due to the fact that
167 * its EHCI controller has both TT and LPM support. HOSTPCx are extensions to 177 * its EHCI controller has both TT and LPM support. HOSTPCx are extensions to
168 * PORTSCx 178 * PORTSCx
169 */ 179 */
170#define HOSTPC0 0x84 /* HOSTPC extension */ 180 /* HOSTPC: offset 0x84 */
181 u32 hostpc[0]; /* HOSTPC extension */
171#define HOSTPC_PHCD (1<<22) /* Phy clock disable */ 182#define HOSTPC_PHCD (1<<22) /* Phy clock disable */
172#define HOSTPC_PSPD (3<<25) /* Port speed detection */ 183#define HOSTPC_PSPD (3<<25) /* Port speed detection */
173#define USBMODE_EX 0xc8 /* USB Device mode extension */ 184
185 u32 reserved5[17];
186
187 /* USBMODE_EX: offset 0xc8 */
188 u32 usbmode_ex; /* USB Device mode extension */
174#define USBMODE_EX_VBPS (1<<5) /* VBus Power Select On */ 189#define USBMODE_EX_VBPS (1<<5) /* VBus Power Select On */
175#define USBMODE_EX_HC (3<<0) /* host controller mode */ 190#define USBMODE_EX_HC (3<<0) /* host controller mode */
176#define TXFILLTUNING 0x24 /* TX FIFO Tuning register */ 191};
177#define TXFIFO_DEFAULT (8<<16) /* FIFO burst threshold 8 */
178 192
179/* Appendix C, Debug port ... intended for use with special "debug devices" 193/* Appendix C, Debug port ... intended for use with special "debug devices"
180 * that can help if there's no serial console. (nonstandard enumeration.) 194 * that can help if there's no serial console. (nonstandard enumeration.)