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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
commit8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch)
treea8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /include/linux/mtd
parent406089d01562f1e2bf9f089fd7637009ebaad589 (diff)
Patched in Tegra support.
Diffstat (limited to 'include/linux/mtd')
-rw-r--r--include/linux/mtd/bbm.h49
-rw-r--r--include/linux/mtd/blktrans.h5
-rw-r--r--include/linux/mtd/cfi.h17
-rw-r--r--include/linux/mtd/cfi_endian.h76
-rw-r--r--include/linux/mtd/doc2000.h22
-rw-r--r--include/linux/mtd/fsmc.h166
-rw-r--r--include/linux/mtd/lpc32xx_mlc.h20
-rw-r--r--include/linux/mtd/lpc32xx_slc.h20
-rw-r--r--include/linux/mtd/map.h9
-rw-r--r--include/linux/mtd/mtd.h307
-rw-r--r--include/linux/mtd/nand.h196
-rw-r--r--include/linux/mtd/onenand.h4
-rw-r--r--include/linux/mtd/partitions.h49
-rw-r--r--include/linux/mtd/physmap.h18
-rw-r--r--include/linux/mtd/sh_flctl.h77
-rw-r--r--include/linux/mtd/spear_smi.h65
-rw-r--r--include/linux/mtd/ubi.h31
17 files changed, 455 insertions, 676 deletions
diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h
index 211ff67e8b0..57cc0e63714 100644
--- a/include/linux/mtd/bbm.h
+++ b/include/linux/mtd/bbm.h
@@ -78,53 +78,32 @@ struct nand_bbt_descr {
78#define NAND_BBT_LASTBLOCK 0x00000010 78#define NAND_BBT_LASTBLOCK 0x00000010
79/* The bbt is at the given page, else we must scan for the bbt */ 79/* The bbt is at the given page, else we must scan for the bbt */
80#define NAND_BBT_ABSPAGE 0x00000020 80#define NAND_BBT_ABSPAGE 0x00000020
81/* The bbt is at the given page, else we must scan for the bbt */
82#define NAND_BBT_SEARCH 0x00000040
81/* bbt is stored per chip on multichip devices */ 83/* bbt is stored per chip on multichip devices */
82#define NAND_BBT_PERCHIP 0x00000080 84#define NAND_BBT_PERCHIP 0x00000080
83/* bbt has a version counter at offset veroffs */ 85/* bbt has a version counter at offset veroffs */
84#define NAND_BBT_VERSION 0x00000100 86#define NAND_BBT_VERSION 0x00000100
85/* Create a bbt if none exists */ 87/* Create a bbt if none exists */
86#define NAND_BBT_CREATE 0x00000200 88#define NAND_BBT_CREATE 0x00000200
87/*
88 * Create an empty BBT with no vendor information. Vendor's information may be
89 * unavailable, for example, if the NAND controller has a different data and OOB
90 * layout or if this information is already purged. Must be used in conjunction
91 * with NAND_BBT_CREATE.
92 */
93#define NAND_BBT_CREATE_EMPTY 0x00000400
94/* Search good / bad pattern through all pages of a block */ 89/* Search good / bad pattern through all pages of a block */
95#define NAND_BBT_SCANALLPAGES 0x00000800 90#define NAND_BBT_SCANALLPAGES 0x00000400
96/* Scan block empty during good / bad block scan */ 91/* Scan block empty during good / bad block scan */
97#define NAND_BBT_SCANEMPTY 0x00001000 92#define NAND_BBT_SCANEMPTY 0x00000800
98/* Write bbt if neccecary */ 93/* Write bbt if neccecary */
99#define NAND_BBT_WRITE 0x00002000 94#define NAND_BBT_WRITE 0x00001000
100/* Read and write back block contents when writing bbt */ 95/* Read and write back block contents when writing bbt */
101#define NAND_BBT_SAVECONTENT 0x00004000 96#define NAND_BBT_SAVECONTENT 0x00002000
102/* Search good / bad pattern on the first and the second page */ 97/* Search good / bad pattern on the first and the second page */
103#define NAND_BBT_SCAN2NDPAGE 0x00008000 98#define NAND_BBT_SCAN2NDPAGE 0x00004000
104/* Search good / bad pattern on the last page of the eraseblock */ 99/* Search good / bad pattern on the last page of the eraseblock */
105#define NAND_BBT_SCANLASTPAGE 0x00010000 100#define NAND_BBT_SCANLASTPAGE 0x00008000
106/* 101/* Chip stores bad block marker on BOTH 1st and 6th bytes of OOB */
107 * Use a flash based bad block table. By default, OOB identifier is saved in 102#define NAND_BBT_SCANBYTE1AND6 0x00100000
108 * OOB area. This option is passed to the default bad block table function. 103/* The nand_bbt_descr was created dynamicaly and must be freed */
109 */ 104#define NAND_BBT_DYNAMICSTRUCT 0x00200000
110#define NAND_BBT_USE_FLASH 0x00020000 105/* The bad block table does not OOB for marker */
111/* 106#define NAND_BBT_NO_OOB 0x00400000
112 * Do not store flash based bad block table marker in the OOB area; store it
113 * in-band.
114 */
115#define NAND_BBT_NO_OOB 0x00040000
116/*
117 * Do not write new bad block markers to OOB; useful, e.g., when ECC covers
118 * entire spare area. Must be used with NAND_BBT_USE_FLASH.
119 */
120#define NAND_BBT_NO_OOB_BBM 0x00080000
121
122/*
123 * Flag set by nand_create_default_bbt_descr(), marking that the nand_bbt_descr
124 * was allocated dynamicaly and must be freed in nand_release(). Has no meaning
125 * in nand_chip.bbt_options.
126 */
127#define NAND_BBT_DYNAMICSTRUCT 0x80000000
128 107
129/* The maximum number of blocks to scan for a bbt */ 108/* The maximum number of blocks to scan for a bbt */
130#define NAND_BBT_SCAN_MAXBLOCKS 4 109#define NAND_BBT_SCAN_MAXBLOCKS 4
diff --git a/include/linux/mtd/blktrans.h b/include/linux/mtd/blktrans.h
index 4eb0a50d0c5..1bbd9f28924 100644
--- a/include/linux/mtd/blktrans.h
+++ b/include/linux/mtd/blktrans.h
@@ -23,7 +23,6 @@
23#include <linux/mutex.h> 23#include <linux/mutex.h>
24#include <linux/kref.h> 24#include <linux/kref.h>
25#include <linux/sysfs.h> 25#include <linux/sysfs.h>
26#include <linux/workqueue.h>
27 26
28struct hd_geometry; 27struct hd_geometry;
29struct mtd_info; 28struct mtd_info;
@@ -44,12 +43,10 @@ struct mtd_blktrans_dev {
44 struct kref ref; 43 struct kref ref;
45 struct gendisk *disk; 44 struct gendisk *disk;
46 struct attribute_group *disk_attributes; 45 struct attribute_group *disk_attributes;
47 struct workqueue_struct *wq; 46 struct task_struct *thread;
48 struct work_struct work;
49 struct request_queue *rq; 47 struct request_queue *rq;
50 spinlock_t queue_lock; 48 spinlock_t queue_lock;
51 void *priv; 49 void *priv;
52 fmode_t file_mode;
53}; 50};
54 51
55struct mtd_blktrans_ops { 52struct mtd_blktrans_ops {
diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
index 37ef6b19408..d2492549297 100644
--- a/include/linux/mtd/cfi.h
+++ b/include/linux/mtd/cfi.h
@@ -22,7 +22,6 @@
22 22
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/types.h> 24#include <linux/types.h>
25#include <linux/bug.h>
26#include <linux/interrupt.h> 25#include <linux/interrupt.h>
27#include <linux/mtd/flashchip.h> 26#include <linux/mtd/flashchip.h>
28#include <linux/mtd/map.h> 27#include <linux/mtd/map.h>
@@ -355,10 +354,10 @@ static inline map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cf
355 onecmd = cmd; 354 onecmd = cmd;
356 break; 355 break;
357 case 2: 356 case 2:
358 onecmd = cpu_to_cfi16(map, cmd); 357 onecmd = cpu_to_cfi16(cmd);
359 break; 358 break;
360 case 4: 359 case 4:
361 onecmd = cpu_to_cfi32(map, cmd); 360 onecmd = cpu_to_cfi32(cmd);
362 break; 361 break;
363 } 362 }
364 363
@@ -438,10 +437,10 @@ static inline unsigned long cfi_merge_status(map_word val, struct map_info *map,
438 case 1: 437 case 1:
439 break; 438 break;
440 case 2: 439 case 2:
441 res = cfi16_to_cpu(map, res); 440 res = cfi16_to_cpu(res);
442 break; 441 break;
443 case 4: 442 case 4:
444 res = cfi32_to_cpu(map, res); 443 res = cfi32_to_cpu(res);
445 break; 444 break;
446 default: BUG(); 445 default: BUG();
447 } 446 }
@@ -481,12 +480,12 @@ static inline uint8_t cfi_read_query(struct map_info *map, uint32_t addr)
481 if (map_bankwidth_is_1(map)) { 480 if (map_bankwidth_is_1(map)) {
482 return val.x[0]; 481 return val.x[0];
483 } else if (map_bankwidth_is_2(map)) { 482 } else if (map_bankwidth_is_2(map)) {
484 return cfi16_to_cpu(map, val.x[0]); 483 return cfi16_to_cpu(val.x[0]);
485 } else { 484 } else {
486 /* No point in a 64-bit byteswap since that would just be 485 /* No point in a 64-bit byteswap since that would just be
487 swapping the responses from different chips, and we are 486 swapping the responses from different chips, and we are
488 only interested in one chip (a representative sample) */ 487 only interested in one chip (a representative sample) */
489 return cfi32_to_cpu(map, val.x[0]); 488 return cfi32_to_cpu(val.x[0]);
490 } 489 }
491} 490}
492 491
@@ -497,12 +496,12 @@ static inline uint16_t cfi_read_query16(struct map_info *map, uint32_t addr)
497 if (map_bankwidth_is_1(map)) { 496 if (map_bankwidth_is_1(map)) {
498 return val.x[0] & 0xff; 497 return val.x[0] & 0xff;
499 } else if (map_bankwidth_is_2(map)) { 498 } else if (map_bankwidth_is_2(map)) {
500 return cfi16_to_cpu(map, val.x[0]); 499 return cfi16_to_cpu(val.x[0]);
501 } else { 500 } else {
502 /* No point in a 64-bit byteswap since that would just be 501 /* No point in a 64-bit byteswap since that would just be
503 swapping the responses from different chips, and we are 502 swapping the responses from different chips, and we are
504 only interested in one chip (a representative sample) */ 503 only interested in one chip (a representative sample) */
505 return cfi32_to_cpu(map, val.x[0]); 504 return cfi32_to_cpu(val.x[0]);
506 } 505 }
507} 506}
508 507
diff --git a/include/linux/mtd/cfi_endian.h b/include/linux/mtd/cfi_endian.h
index b97a625071f..51cc3f5917a 100644
--- a/include/linux/mtd/cfi_endian.h
+++ b/include/linux/mtd/cfi_endian.h
@@ -19,35 +19,53 @@
19 19
20#include <asm/byteorder.h> 20#include <asm/byteorder.h>
21 21
22#define CFI_HOST_ENDIAN 1 22#ifndef CONFIG_MTD_CFI_ADV_OPTIONS
23#define CFI_LITTLE_ENDIAN 2 23
24#define CFI_BIG_ENDIAN 3 24#define CFI_HOST_ENDIAN
25 25
26#if !defined(CONFIG_MTD_CFI_ADV_OPTIONS) || defined(CONFIG_MTD_CFI_NOSWAP)
27#define CFI_DEFAULT_ENDIAN CFI_HOST_ENDIAN
28#elif defined(CONFIG_MTD_CFI_LE_BYTE_SWAP)
29#define CFI_DEFAULT_ENDIAN CFI_LITTLE_ENDIAN
30#elif defined(CONFIG_MTD_CFI_BE_BYTE_SWAP)
31#define CFI_DEFAULT_ENDIAN CFI_BIG_ENDIAN
32#else 26#else
33#error No CFI endianness defined 27
28#ifdef CONFIG_MTD_CFI_NOSWAP
29#define CFI_HOST_ENDIAN
34#endif 30#endif
35 31
36#define cfi_default(s) ((s)?:CFI_DEFAULT_ENDIAN) 32#ifdef CONFIG_MTD_CFI_LE_BYTE_SWAP
37#define cfi_be(s) (cfi_default(s) == CFI_BIG_ENDIAN) 33#define CFI_LITTLE_ENDIAN
38#define cfi_le(s) (cfi_default(s) == CFI_LITTLE_ENDIAN) 34#endif
39#define cfi_host(s) (cfi_default(s) == CFI_HOST_ENDIAN) 35
40 36#ifdef CONFIG_MTD_CFI_BE_BYTE_SWAP
41#define cpu_to_cfi8(map, x) (x) 37#define CFI_BIG_ENDIAN
42#define cfi8_to_cpu(map, x) (x) 38#endif
43#define cpu_to_cfi16(map, x) _cpu_to_cfi(16, (map)->swap, (x)) 39
44#define cpu_to_cfi32(map, x) _cpu_to_cfi(32, (map)->swap, (x)) 40#endif
45#define cpu_to_cfi64(map, x) _cpu_to_cfi(64, (map)->swap, (x)) 41
46#define cfi16_to_cpu(map, x) _cfi_to_cpu(16, (map)->swap, (x)) 42#if defined(CFI_LITTLE_ENDIAN)
47#define cfi32_to_cpu(map, x) _cfi_to_cpu(32, (map)->swap, (x)) 43#define cpu_to_cfi8(x) (x)
48#define cfi64_to_cpu(map, x) _cfi_to_cpu(64, (map)->swap, (x)) 44#define cfi8_to_cpu(x) (x)
49 45#define cpu_to_cfi16(x) cpu_to_le16(x)
50#define _cpu_to_cfi(w, s, x) (cfi_host(s)?(x):_swap_to_cfi(w, s, x)) 46#define cpu_to_cfi32(x) cpu_to_le32(x)
51#define _cfi_to_cpu(w, s, x) (cfi_host(s)?(x):_swap_to_cpu(w, s, x)) 47#define cpu_to_cfi64(x) cpu_to_le64(x)
52#define _swap_to_cfi(w, s, x) (cfi_be(s)?cpu_to_be##w(x):cpu_to_le##w(x)) 48#define cfi16_to_cpu(x) le16_to_cpu(x)
53#define _swap_to_cpu(w, s, x) (cfi_be(s)?be##w##_to_cpu(x):le##w##_to_cpu(x)) 49#define cfi32_to_cpu(x) le32_to_cpu(x)
50#define cfi64_to_cpu(x) le64_to_cpu(x)
51#elif defined (CFI_BIG_ENDIAN)
52#define cpu_to_cfi8(x) (x)
53#define cfi8_to_cpu(x) (x)
54#define cpu_to_cfi16(x) cpu_to_be16(x)
55#define cpu_to_cfi32(x) cpu_to_be32(x)
56#define cpu_to_cfi64(x) cpu_to_be64(x)
57#define cfi16_to_cpu(x) be16_to_cpu(x)
58#define cfi32_to_cpu(x) be32_to_cpu(x)
59#define cfi64_to_cpu(x) be64_to_cpu(x)
60#elif defined (CFI_HOST_ENDIAN)
61#define cpu_to_cfi8(x) (x)
62#define cfi8_to_cpu(x) (x)
63#define cpu_to_cfi16(x) (x)
64#define cpu_to_cfi32(x) (x)
65#define cpu_to_cfi64(x) (x)
66#define cfi16_to_cpu(x) (x)
67#define cfi32_to_cpu(x) (x)
68#define cfi64_to_cpu(x) (x)
69#else
70#error No CFI endianness defined
71#endif
diff --git a/include/linux/mtd/doc2000.h b/include/linux/mtd/doc2000.h
index 407d1e556c3..0f6fea73a1f 100644
--- a/include/linux/mtd/doc2000.h
+++ b/include/linux/mtd/doc2000.h
@@ -92,26 +92,12 @@
92 * Others use readb/writeb 92 * Others use readb/writeb
93 */ 93 */
94#if defined(__arm__) 94#if defined(__arm__)
95static inline u8 ReadDOC_(u32 __iomem *addr, unsigned long reg) 95#define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u32 *)(((unsigned long)adr)+((reg)<<2))))
96{ 96#define WriteDOC_(d, adr, reg) do{ *(volatile __u32 *)(((unsigned long)adr)+((reg)<<2)) = (__u32)d; wmb();} while(0)
97 return __raw_readl(addr + reg);
98}
99static inline void WriteDOC_(u8 data, u32 __iomem *addr, unsigned long reg)
100{
101 __raw_writel(data, addr + reg);
102 wmb();
103}
104#define DOC_IOREMAP_LEN 0x8000 97#define DOC_IOREMAP_LEN 0x8000
105#elif defined(__ppc__) 98#elif defined(__ppc__)
106static inline u8 ReadDOC_(u16 __iomem *addr, unsigned long reg) 99#define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u16 *)(((unsigned long)adr)+((reg)<<1))))
107{ 100#define WriteDOC_(d, adr, reg) do{ *(volatile __u16 *)(((unsigned long)adr)+((reg)<<1)) = (__u16)d; wmb();} while(0)
108 return __raw_readw(addr + reg);
109}
110static inline void WriteDOC_(u8 data, u16 __iomem *addr, unsigned long reg)
111{
112 __raw_writew(data, addr + reg);
113 wmb();
114}
115#define DOC_IOREMAP_LEN 0x4000 101#define DOC_IOREMAP_LEN 0x4000
116#else 102#else
117#define ReadDOC_(adr, reg) readb((void __iomem *)(adr) + (reg)) 103#define ReadDOC_(adr, reg) readb((void __iomem *)(adr) + (reg))
diff --git a/include/linux/mtd/fsmc.h b/include/linux/mtd/fsmc.h
index d6ed61ef451..6987995ad3c 100644
--- a/include/linux/mtd/fsmc.h
+++ b/include/linux/mtd/fsmc.h
@@ -26,83 +26,95 @@
26#define FSMC_NAND_BW8 1 26#define FSMC_NAND_BW8 1
27#define FSMC_NAND_BW16 2 27#define FSMC_NAND_BW16 2
28 28
29/*
30 * The placement of the Command Latch Enable (CLE) and
31 * Address Latch Enable (ALE) is twisted around in the
32 * SPEAR310 implementation.
33 */
34#if defined(CONFIG_MACH_SPEAR310)
35#define PLAT_NAND_CLE (1 << 17)
36#define PLAT_NAND_ALE (1 << 16)
37#else
38#define PLAT_NAND_CLE (1 << 16)
39#define PLAT_NAND_ALE (1 << 17)
40#endif
41
29#define FSMC_MAX_NOR_BANKS 4 42#define FSMC_MAX_NOR_BANKS 4
30#define FSMC_MAX_NAND_BANKS 4 43#define FSMC_MAX_NAND_BANKS 4
31 44
32#define FSMC_FLASH_WIDTH8 1 45#define FSMC_FLASH_WIDTH8 1
33#define FSMC_FLASH_WIDTH16 2 46#define FSMC_FLASH_WIDTH16 2
34 47
35/* fsmc controller registers for NOR flash */ 48struct fsmc_nor_bank_regs {
36#define CTRL 0x0 49 uint32_t ctrl;
37 /* ctrl register definitions */ 50 uint32_t ctrl_tim;
38 #define BANK_ENABLE (1 << 0) 51};
39 #define MUXED (1 << 1) 52
40 #define NOR_DEV (2 << 2) 53/* ctrl register definitions */
41 #define WIDTH_8 (0 << 4) 54#define BANK_ENABLE (1 << 0)
42 #define WIDTH_16 (1 << 4) 55#define MUXED (1 << 1)
43 #define RSTPWRDWN (1 << 6) 56#define NOR_DEV (2 << 2)
44 #define WPROT (1 << 7) 57#define WIDTH_8 (0 << 4)
45 #define WRT_ENABLE (1 << 12) 58#define WIDTH_16 (1 << 4)
46 #define WAIT_ENB (1 << 13) 59#define RSTPWRDWN (1 << 6)
47 60#define WPROT (1 << 7)
48#define CTRL_TIM 0x4 61#define WRT_ENABLE (1 << 12)
49 /* ctrl_tim register definitions */ 62#define WAIT_ENB (1 << 13)
50 63
51#define FSMC_NOR_BANK_SZ 0x8 64/* ctrl_tim register definitions */
65
66struct fsmc_nand_bank_regs {
67 uint32_t pc;
68 uint32_t sts;
69 uint32_t comm;
70 uint32_t attrib;
71 uint32_t ioata;
72 uint32_t ecc1;
73 uint32_t ecc2;
74 uint32_t ecc3;
75};
76
52#define FSMC_NOR_REG_SIZE 0x40 77#define FSMC_NOR_REG_SIZE 0x40
53 78
54#define FSMC_NOR_REG(base, bank, reg) (base + \ 79struct fsmc_regs {
55 FSMC_NOR_BANK_SZ * (bank) + \ 80 struct fsmc_nor_bank_regs nor_bank_regs[FSMC_MAX_NOR_BANKS];
56 reg) 81 uint8_t reserved_1[0x40 - 0x20];
57 82 struct fsmc_nand_bank_regs bank_regs[FSMC_MAX_NAND_BANKS];
58/* fsmc controller registers for NAND flash */ 83 uint8_t reserved_2[0xfe0 - 0xc0];
59#define PC 0x00 84 uint32_t peripid0; /* 0xfe0 */
60 /* pc register definitions */ 85 uint32_t peripid1; /* 0xfe4 */
61 #define FSMC_RESET (1 << 0) 86 uint32_t peripid2; /* 0xfe8 */
62 #define FSMC_WAITON (1 << 1) 87 uint32_t peripid3; /* 0xfec */
63 #define FSMC_ENABLE (1 << 2) 88 uint32_t pcellid0; /* 0xff0 */
64 #define FSMC_DEVTYPE_NAND (1 << 3) 89 uint32_t pcellid1; /* 0xff4 */
65 #define FSMC_DEVWID_8 (0 << 4) 90 uint32_t pcellid2; /* 0xff8 */
66 #define FSMC_DEVWID_16 (1 << 4) 91 uint32_t pcellid3; /* 0xffc */
67 #define FSMC_ECCEN (1 << 6) 92};
68 #define FSMC_ECCPLEN_512 (0 << 7)
69 #define FSMC_ECCPLEN_256 (1 << 7)
70 #define FSMC_TCLR_1 (1)
71 #define FSMC_TCLR_SHIFT (9)
72 #define FSMC_TCLR_MASK (0xF)
73 #define FSMC_TAR_1 (1)
74 #define FSMC_TAR_SHIFT (13)
75 #define FSMC_TAR_MASK (0xF)
76#define STS 0x04
77 /* sts register definitions */
78 #define FSMC_CODE_RDY (1 << 15)
79#define COMM 0x08
80 /* comm register definitions */
81 #define FSMC_TSET_0 0
82 #define FSMC_TSET_SHIFT 0
83 #define FSMC_TSET_MASK 0xFF
84 #define FSMC_TWAIT_6 6
85 #define FSMC_TWAIT_SHIFT 8
86 #define FSMC_TWAIT_MASK 0xFF
87 #define FSMC_THOLD_4 4
88 #define FSMC_THOLD_SHIFT 16
89 #define FSMC_THOLD_MASK 0xFF
90 #define FSMC_THIZ_1 1
91 #define FSMC_THIZ_SHIFT 24
92 #define FSMC_THIZ_MASK 0xFF
93#define ATTRIB 0x0C
94#define IOATA 0x10
95#define ECC1 0x14
96#define ECC2 0x18
97#define ECC3 0x1C
98#define FSMC_NAND_BANK_SZ 0x20
99
100#define FSMC_NAND_REG(base, bank, reg) (base + FSMC_NOR_REG_SIZE + \
101 (FSMC_NAND_BANK_SZ * (bank)) + \
102 reg)
103 93
104#define FSMC_BUSY_WAIT_TIMEOUT (1 * HZ) 94#define FSMC_BUSY_WAIT_TIMEOUT (1 * HZ)
105 95
96/* pc register definitions */
97#define FSMC_RESET (1 << 0)
98#define FSMC_WAITON (1 << 1)
99#define FSMC_ENABLE (1 << 2)
100#define FSMC_DEVTYPE_NAND (1 << 3)
101#define FSMC_DEVWID_8 (0 << 4)
102#define FSMC_DEVWID_16 (1 << 4)
103#define FSMC_ECCEN (1 << 6)
104#define FSMC_ECCPLEN_512 (0 << 7)
105#define FSMC_ECCPLEN_256 (1 << 7)
106#define FSMC_TCLR_1 (1 << 9)
107#define FSMC_TAR_1 (1 << 13)
108
109/* sts register definitions */
110#define FSMC_CODE_RDY (1 << 15)
111
112/* comm register definitions */
113#define FSMC_TSET_0 (0 << 0)
114#define FSMC_TWAIT_6 (6 << 8)
115#define FSMC_THOLD_4 (4 << 16)
116#define FSMC_THIZ_1 (1 << 24)
117
106/* 118/*
107 * There are 13 bytes of ecc for every 512 byte block in FSMC version 8 119 * There are 13 bytes of ecc for every 512 byte block in FSMC version 8
108 * and it has to be read consecutively and immediately after the 512 120 * and it has to be read consecutively and immediately after the 512
@@ -121,20 +133,6 @@ struct fsmc_eccplace {
121 struct fsmc_nand_eccplace eccplace[MAX_ECCPLACE_ENTRIES]; 133 struct fsmc_nand_eccplace eccplace[MAX_ECCPLACE_ENTRIES];
122}; 134};
123 135
124struct fsmc_nand_timings {
125 uint8_t tclr;
126 uint8_t tar;
127 uint8_t thiz;
128 uint8_t thold;
129 uint8_t twait;
130 uint8_t tset;
131};
132
133enum access_mode {
134 USE_DMA_ACCESS = 1,
135 USE_WORD_ACCESS,
136};
137
138/** 136/**
139 * fsmc_nand_platform_data - platform specific NAND controller config 137 * fsmc_nand_platform_data - platform specific NAND controller config
140 * @partitions: partition table for the platform, use a default fallback 138 * @partitions: partition table for the platform, use a default fallback
@@ -148,20 +146,12 @@ enum access_mode {
148 * this may be set to NULL 146 * this may be set to NULL
149 */ 147 */
150struct fsmc_nand_platform_data { 148struct fsmc_nand_platform_data {
151 struct fsmc_nand_timings *nand_timings;
152 struct mtd_partition *partitions; 149 struct mtd_partition *partitions;
153 unsigned int nr_partitions; 150 unsigned int nr_partitions;
154 unsigned int options; 151 unsigned int options;
155 unsigned int width; 152 unsigned int width;
156 unsigned int bank; 153 unsigned int bank;
157
158 enum access_mode mode;
159
160 void (*select_bank)(uint32_t bank, uint32_t busw); 154 void (*select_bank)(uint32_t bank, uint32_t busw);
161
162 /* priv structures for dma accesses */
163 void *read_dma_priv;
164 void *write_dma_priv;
165}; 155};
166 156
167extern int __init fsmc_nor_init(struct platform_device *pdev, 157extern int __init fsmc_nor_init(struct platform_device *pdev,
diff --git a/include/linux/mtd/lpc32xx_mlc.h b/include/linux/mtd/lpc32xx_mlc.h
deleted file mode 100644
index d91b1e35631..00000000000
--- a/include/linux/mtd/lpc32xx_mlc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * Platform data for LPC32xx SoC MLC NAND controller
3 *
4 * Copyright © 2012 Roland Stigge
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __LINUX_MTD_LPC32XX_MLC_H
12#define __LINUX_MTD_LPC32XX_MLC_H
13
14#include <linux/dmaengine.h>
15
16struct lpc32xx_mlc_platform_data {
17 bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
18};
19
20#endif /* __LINUX_MTD_LPC32XX_MLC_H */
diff --git a/include/linux/mtd/lpc32xx_slc.h b/include/linux/mtd/lpc32xx_slc.h
deleted file mode 100644
index 1169548a153..00000000000
--- a/include/linux/mtd/lpc32xx_slc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * Platform data for LPC32xx SoC SLC NAND controller
3 *
4 * Copyright © 2012 Roland Stigge
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __LINUX_MTD_LPC32XX_SLC_H
12#define __LINUX_MTD_LPC32XX_SLC_H
13
14#include <linux/dmaengine.h>
15
16struct lpc32xx_slc_platform_data {
17 bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
18};
19
20#endif /* __LINUX_MTD_LPC32XX_SLC_H */
diff --git a/include/linux/mtd/map.h b/include/linux/mtd/map.h
index f6eb4332ac9..a9e6ba46865 100644
--- a/include/linux/mtd/map.h
+++ b/include/linux/mtd/map.h
@@ -26,11 +26,11 @@
26#include <linux/list.h> 26#include <linux/list.h>
27#include <linux/string.h> 27#include <linux/string.h>
28#include <linux/bug.h> 28#include <linux/bug.h>
29#include <linux/kernel.h> 29
30 30
31#include <asm/unaligned.h> 31#include <asm/unaligned.h>
32#include <asm/system.h>
32#include <asm/io.h> 33#include <asm/io.h>
33#include <asm/barrier.h>
34 34
35#ifdef CONFIG_MTD_MAP_BANK_WIDTH_1 35#ifdef CONFIG_MTD_MAP_BANK_WIDTH_1
36#define map_bankwidth(map) 1 36#define map_bankwidth(map) 1
@@ -214,7 +214,6 @@ struct map_info {
214 void __iomem *virt; 214 void __iomem *virt;
215 void *cached; 215 void *cached;
216 216
217 int swap; /* this mapping's byte-swapping requirement */
218 int bankwidth; /* in octets. This isn't necessarily the width 217 int bankwidth; /* in octets. This isn't necessarily the width
219 of actual bus cycles -- it's the repeat interval 218 of actual bus cycles -- it's the repeat interval
220 in bytes, before you are talking to the first chip again. 219 in bytes, before you are talking to the first chip again.
@@ -328,7 +327,7 @@ static inline int map_word_bitsset(struct map_info *map, map_word val1, map_word
328 327
329static inline map_word map_word_load(struct map_info *map, const void *ptr) 328static inline map_word map_word_load(struct map_info *map, const void *ptr)
330{ 329{
331 map_word r = {{0} }; 330 map_word r;
332 331
333 if (map_bankwidth_is_1(map)) 332 if (map_bankwidth_is_1(map))
334 r.x[0] = *(unsigned char *)ptr; 333 r.x[0] = *(unsigned char *)ptr;
@@ -391,7 +390,7 @@ static inline map_word map_word_ff(struct map_info *map)
391 390
392static inline map_word inline_map_read(struct map_info *map, unsigned long ofs) 391static inline map_word inline_map_read(struct map_info *map, unsigned long ofs)
393{ 392{
394 map_word uninitialized_var(r); 393 map_word r;
395 394
396 if (map_bankwidth_is_1(map)) 395 if (map_bankwidth_is_1(map))
397 r.x[0] = __raw_readb(map->virt + ofs); 396 r.x[0] = __raw_readb(map->virt + ofs);
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index f9ac2897b86..2541fb848da 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -21,6 +21,7 @@
21#define __MTD_MTD_H__ 21#define __MTD_MTD_H__
22 22
23#include <linux/types.h> 23#include <linux/types.h>
24#include <linux/module.h>
24#include <linux/uio.h> 25#include <linux/uio.h>
25#include <linux/notifier.h> 26#include <linux/notifier.h>
26#include <linux/device.h> 27#include <linux/device.h>
@@ -32,19 +33,17 @@
32#define MTD_CHAR_MAJOR 90 33#define MTD_CHAR_MAJOR 90
33#define MTD_BLOCK_MAJOR 31 34#define MTD_BLOCK_MAJOR 31
34 35
35#define MTD_ERASE_PENDING 0x01 36#define MTD_ERASE_PENDING 0x01
36#define MTD_ERASING 0x02 37#define MTD_ERASING 0x02
37#define MTD_ERASE_SUSPEND 0x04 38#define MTD_ERASE_SUSPEND 0x04
38#define MTD_ERASE_DONE 0x08 39#define MTD_ERASE_DONE 0x08
39#define MTD_ERASE_FAILED 0x10 40#define MTD_ERASE_FAILED 0x10
40 41
41#define MTD_FAIL_ADDR_UNKNOWN -1LL 42#define MTD_FAIL_ADDR_UNKNOWN -1LL
42 43
43/* 44/* If the erase fails, fail_addr might indicate exactly which block failed. If
44 * If the erase fails, fail_addr might indicate exactly which block failed. If 45 fail_addr = MTD_FAIL_ADDR_UNKNOWN, the failure was not at the device level or was not
45 * fail_addr = MTD_FAIL_ADDR_UNKNOWN, the failure was not at the device level 46 specific to any particular block. */
46 * or was not specific to any particular block.
47 */
48struct erase_info { 47struct erase_info {
49 struct mtd_info *mtd; 48 struct mtd_info *mtd;
50 uint64_t addr; 49 uint64_t addr;
@@ -61,12 +60,26 @@ struct erase_info {
61}; 60};
62 61
63struct mtd_erase_region_info { 62struct mtd_erase_region_info {
64 uint64_t offset; /* At which this region starts, from the beginning of the MTD */ 63 uint64_t offset; /* At which this region starts, from the beginning of the MTD */
65 uint32_t erasesize; /* For this region */ 64 uint32_t erasesize; /* For this region */
66 uint32_t numblocks; /* Number of blocks of erasesize in this region */ 65 uint32_t numblocks; /* Number of blocks of erasesize in this region */
67 unsigned long *lockmap; /* If keeping bitmap of locks */ 66 unsigned long *lockmap; /* If keeping bitmap of locks */
68}; 67};
69 68
69/*
70 * oob operation modes
71 *
72 * MTD_OOB_PLACE: oob data are placed at the given offset
73 * MTD_OOB_AUTO: oob data are automatically placed at the free areas
74 * which are defined by the ecclayout
75 * MTD_OOB_RAW: mode to read oob and data without doing ECC checking
76 */
77typedef enum {
78 MTD_OOB_PLACE,
79 MTD_OOB_AUTO,
80 MTD_OOB_RAW,
81} mtd_oob_mode_t;
82
70/** 83/**
71 * struct mtd_oob_ops - oob operation operands 84 * struct mtd_oob_ops - oob operation operands
72 * @mode: operation mode 85 * @mode: operation mode
@@ -78,7 +91,7 @@ struct mtd_erase_region_info {
78 * @ooblen: number of oob bytes to write/read 91 * @ooblen: number of oob bytes to write/read
79 * @oobretlen: number of oob bytes written/read 92 * @oobretlen: number of oob bytes written/read
80 * @ooboffs: offset of oob data in the oob area (only relevant when 93 * @ooboffs: offset of oob data in the oob area (only relevant when
81 * mode = MTD_OPS_PLACE_OOB or MTD_OPS_RAW) 94 * mode = MTD_OOB_PLACE)
82 * @datbuf: data buffer - if NULL only oob data are read/written 95 * @datbuf: data buffer - if NULL only oob data are read/written
83 * @oobbuf: oob data buffer 96 * @oobbuf: oob data buffer
84 * 97 *
@@ -87,7 +100,7 @@ struct mtd_erase_region_info {
87 * OOB area. 100 * OOB area.
88 */ 101 */
89struct mtd_oob_ops { 102struct mtd_oob_ops {
90 unsigned int mode; 103 mtd_oob_mode_t mode;
91 size_t len; 104 size_t len;
92 size_t retlen; 105 size_t retlen;
93 size_t ooblen; 106 size_t ooblen;
@@ -98,7 +111,7 @@ struct mtd_oob_ops {
98}; 111};
99 112
100#define MTD_MAX_OOBFREE_ENTRIES_LARGE 32 113#define MTD_MAX_OOBFREE_ENTRIES_LARGE 32
101#define MTD_MAX_ECCPOS_ENTRIES_LARGE 640 114#define MTD_MAX_ECCPOS_ENTRIES_LARGE 448
102/* 115/*
103 * Internal ECC layout control structure. For historical reasons, there is a 116 * Internal ECC layout control structure. For historical reasons, there is a
104 * similar, smaller struct nand_ecclayout_user (in mtd-abi.h) that is retained 117 * similar, smaller struct nand_ecclayout_user (in mtd-abi.h) that is retained
@@ -112,8 +125,6 @@ struct nand_ecclayout {
112 struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES_LARGE]; 125 struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES_LARGE];
113}; 126};
114 127
115struct module; /* only needed for owner field in mtd_info */
116
117struct mtd_info { 128struct mtd_info {
118 u_char type; 129 u_char type;
119 uint32_t flags; 130 uint32_t flags;
@@ -157,25 +168,13 @@ struct mtd_info {
157 unsigned int erasesize_mask; 168 unsigned int erasesize_mask;
158 unsigned int writesize_mask; 169 unsigned int writesize_mask;
159 170
160 /*
161 * read ops return -EUCLEAN if max number of bitflips corrected on any
162 * one region comprising an ecc step equals or exceeds this value.
163 * Settable by driver, else defaults to ecc_strength. User can override
164 * in sysfs. N.B. The meaning of the -EUCLEAN return code has changed;
165 * see Documentation/ABI/testing/sysfs-class-mtd for more detail.
166 */
167 unsigned int bitflip_threshold;
168
169 // Kernel-only stuff starts here. 171 // Kernel-only stuff starts here.
170 const char *name; 172 const char *name;
171 int index; 173 int index;
172 174
173 /* ECC layout structure pointer - read only! */ 175 /* ecc layout structure pointer - read only ! */
174 struct nand_ecclayout *ecclayout; 176 struct nand_ecclayout *ecclayout;
175 177
176 /* max number of correctible bit errors per ecc step */
177 unsigned int ecc_strength;
178
179 /* Data for variable erase regions. If numeraseregions is zero, 178 /* Data for variable erase regions. If numeraseregions is zero,
180 * it means that the whole device has erasesize as given above. 179 * it means that the whole device has erasesize as given above.
181 */ 180 */
@@ -183,61 +182,88 @@ struct mtd_info {
183 struct mtd_erase_region_info *eraseregions; 182 struct mtd_erase_region_info *eraseregions;
184 183
185 /* 184 /*
186 * Do not call via these pointers, use corresponding mtd_*() 185 * Erase is an asynchronous operation. Device drivers are supposed
187 * wrappers instead. 186 * to call instr->callback() whenever the operation completes, even
187 * if it completes with a failure.
188 * Callers are supposed to pass a callback function and wait for it
189 * to be called before writing to the block.
188 */ 190 */
189 int (*_erase) (struct mtd_info *mtd, struct erase_info *instr); 191 int (*erase) (struct mtd_info *mtd, struct erase_info *instr);
190 int (*_point) (struct mtd_info *mtd, loff_t from, size_t len, 192
191 size_t *retlen, void **virt, resource_size_t *phys); 193 /* This stuff for eXecute-In-Place */
192 int (*_unpoint) (struct mtd_info *mtd, loff_t from, size_t len); 194 /* phys is optional and may be set to NULL */
193 unsigned long (*_get_unmapped_area) (struct mtd_info *mtd, 195 int (*point) (struct mtd_info *mtd, loff_t from, size_t len,
194 unsigned long len, 196 size_t *retlen, void **virt, resource_size_t *phys);
195 unsigned long offset, 197
196 unsigned long flags); 198 /* We probably shouldn't allow XIP if the unpoint isn't a NULL */
197 int (*_read) (struct mtd_info *mtd, loff_t from, size_t len, 199 void (*unpoint) (struct mtd_info *mtd, loff_t from, size_t len);
198 size_t *retlen, u_char *buf); 200
199 int (*_write) (struct mtd_info *mtd, loff_t to, size_t len, 201 /* Allow NOMMU mmap() to directly map the device (if not NULL)
200 size_t *retlen, const u_char *buf); 202 * - return the address to which the offset maps
201 int (*_panic_write) (struct mtd_info *mtd, loff_t to, size_t len, 203 * - return -ENOSYS to indicate refusal to do the mapping
202 size_t *retlen, const u_char *buf);
203 int (*_read_oob) (struct mtd_info *mtd, loff_t from,
204 struct mtd_oob_ops *ops);
205 int (*_write_oob) (struct mtd_info *mtd, loff_t to,
206 struct mtd_oob_ops *ops);
207 int (*_get_fact_prot_info) (struct mtd_info *mtd, struct otp_info *buf,
208 size_t len);
209 int (*_read_fact_prot_reg) (struct mtd_info *mtd, loff_t from,
210 size_t len, size_t *retlen, u_char *buf);
211 int (*_get_user_prot_info) (struct mtd_info *mtd, struct otp_info *buf,
212 size_t len);
213 int (*_read_user_prot_reg) (struct mtd_info *mtd, loff_t from,
214 size_t len, size_t *retlen, u_char *buf);
215 int (*_write_user_prot_reg) (struct mtd_info *mtd, loff_t to,
216 size_t len, size_t *retlen, u_char *buf);
217 int (*_lock_user_prot_reg) (struct mtd_info *mtd, loff_t from,
218 size_t len);
219 int (*_writev) (struct mtd_info *mtd, const struct kvec *vecs,
220 unsigned long count, loff_t to, size_t *retlen);
221 void (*_sync) (struct mtd_info *mtd);
222 int (*_lock) (struct mtd_info *mtd, loff_t ofs, uint64_t len);
223 int (*_unlock) (struct mtd_info *mtd, loff_t ofs, uint64_t len);
224 int (*_is_locked) (struct mtd_info *mtd, loff_t ofs, uint64_t len);
225 int (*_block_isbad) (struct mtd_info *mtd, loff_t ofs);
226 int (*_block_markbad) (struct mtd_info *mtd, loff_t ofs);
227 int (*_suspend) (struct mtd_info *mtd);
228 void (*_resume) (struct mtd_info *mtd);
229 /*
230 * If the driver is something smart, like UBI, it may need to maintain
231 * its own reference counting. The below functions are only for driver.
232 */ 204 */
233 int (*_get_device) (struct mtd_info *mtd); 205 unsigned long (*get_unmapped_area) (struct mtd_info *mtd,
234 void (*_put_device) (struct mtd_info *mtd); 206 unsigned long len,
207 unsigned long offset,
208 unsigned long flags);
235 209
236 /* Backing device capabilities for this device 210 /* Backing device capabilities for this device
237 * - provides mmap capabilities 211 * - provides mmap capabilities
238 */ 212 */
239 struct backing_dev_info *backing_dev_info; 213 struct backing_dev_info *backing_dev_info;
240 214
215
216 int (*read) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
217 int (*write) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
218
219 /* In blackbox flight recorder like scenarios we want to make successful
220 writes in interrupt context. panic_write() is only intended to be
221 called when its known the kernel is about to panic and we need the
222 write to succeed. Since the kernel is not going to be running for much
223 longer, this function can break locks and delay to ensure the write
224 succeeds (but not sleep). */
225
226 int (*panic_write) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
227
228 int (*read_oob) (struct mtd_info *mtd, loff_t from,
229 struct mtd_oob_ops *ops);
230 int (*write_oob) (struct mtd_info *mtd, loff_t to,
231 struct mtd_oob_ops *ops);
232
233 /*
234 * Methods to access the protection register area, present in some
235 * flash devices. The user data is one time programmable but the
236 * factory data is read only.
237 */
238 int (*get_fact_prot_info) (struct mtd_info *mtd, struct otp_info *buf, size_t len);
239 int (*read_fact_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
240 int (*get_user_prot_info) (struct mtd_info *mtd, struct otp_info *buf, size_t len);
241 int (*read_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
242 int (*write_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
243 int (*lock_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len);
244
245 /* kvec-based read/write methods.
246 NB: The 'count' parameter is the number of _vectors_, each of
247 which contains an (ofs, len) tuple.
248 */
249 int (*writev) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, size_t *retlen);
250
251 /* Sync */
252 void (*sync) (struct mtd_info *mtd);
253
254 /* Chip-supported device locking */
255 int (*lock) (struct mtd_info *mtd, loff_t ofs, uint64_t len);
256 int (*unlock) (struct mtd_info *mtd, loff_t ofs, uint64_t len);
257 int (*is_locked) (struct mtd_info *mtd, loff_t ofs, uint64_t len);
258
259 /* Power Management functions */
260 int (*suspend) (struct mtd_info *mtd);
261 void (*resume) (struct mtd_info *mtd);
262
263 /* Bad block management functions */
264 int (*block_isbad) (struct mtd_info *mtd, loff_t ofs);
265 int (*block_markbad) (struct mtd_info *mtd, loff_t ofs);
266
241 struct notifier_block reboot_notifier; /* default mode before reboot */ 267 struct notifier_block reboot_notifier; /* default mode before reboot */
242 268
243 /* ECC status information */ 269 /* ECC status information */
@@ -250,70 +276,18 @@ struct mtd_info {
250 struct module *owner; 276 struct module *owner;
251 struct device dev; 277 struct device dev;
252 int usecount; 278 int usecount;
253};
254 279
255int mtd_erase(struct mtd_info *mtd, struct erase_info *instr); 280 /* If the driver is something smart, like UBI, it may need to maintain
256int mtd_point(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, 281 * its own reference counting. The below functions are only for driver.
257 void **virt, resource_size_t *phys); 282 * The driver may register its callbacks. These callbacks are not
258int mtd_unpoint(struct mtd_info *mtd, loff_t from, size_t len); 283 * supposed to be called by MTD users */
259unsigned long mtd_get_unmapped_area(struct mtd_info *mtd, unsigned long len, 284 int (*get_device) (struct mtd_info *mtd);
260 unsigned long offset, unsigned long flags); 285 void (*put_device) (struct mtd_info *mtd);
261int mtd_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, 286};
262 u_char *buf);
263int mtd_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen,
264 const u_char *buf);
265int mtd_panic_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen,
266 const u_char *buf);
267
268int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops);
269
270static inline int mtd_write_oob(struct mtd_info *mtd, loff_t to,
271 struct mtd_oob_ops *ops)
272{
273 ops->retlen = ops->oobretlen = 0;
274 if (!mtd->_write_oob)
275 return -EOPNOTSUPP;
276 if (!(mtd->flags & MTD_WRITEABLE))
277 return -EROFS;
278 return mtd->_write_oob(mtd, to, ops);
279}
280
281int mtd_get_fact_prot_info(struct mtd_info *mtd, struct otp_info *buf,
282 size_t len);
283int mtd_read_fact_prot_reg(struct mtd_info *mtd, loff_t from, size_t len,
284 size_t *retlen, u_char *buf);
285int mtd_get_user_prot_info(struct mtd_info *mtd, struct otp_info *buf,
286 size_t len);
287int mtd_read_user_prot_reg(struct mtd_info *mtd, loff_t from, size_t len,
288 size_t *retlen, u_char *buf);
289int mtd_write_user_prot_reg(struct mtd_info *mtd, loff_t to, size_t len,
290 size_t *retlen, u_char *buf);
291int mtd_lock_user_prot_reg(struct mtd_info *mtd, loff_t from, size_t len);
292
293int mtd_writev(struct mtd_info *mtd, const struct kvec *vecs,
294 unsigned long count, loff_t to, size_t *retlen);
295
296static inline void mtd_sync(struct mtd_info *mtd)
297{
298 if (mtd->_sync)
299 mtd->_sync(mtd);
300}
301
302int mtd_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
303int mtd_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
304int mtd_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len);
305int mtd_block_isbad(struct mtd_info *mtd, loff_t ofs);
306int mtd_block_markbad(struct mtd_info *mtd, loff_t ofs);
307
308static inline int mtd_suspend(struct mtd_info *mtd)
309{
310 return mtd->_suspend ? mtd->_suspend(mtd) : 0;
311}
312 287
313static inline void mtd_resume(struct mtd_info *mtd) 288static inline struct mtd_info *dev_to_mtd(struct device *dev)
314{ 289{
315 if (mtd->_resume) 290 return dev ? dev_get_drvdata(dev) : NULL;
316 mtd->_resume(mtd);
317} 291}
318 292
319static inline uint32_t mtd_div_by_eb(uint64_t sz, struct mtd_info *mtd) 293static inline uint32_t mtd_div_by_eb(uint64_t sz, struct mtd_info *mtd)
@@ -346,28 +320,13 @@ static inline uint32_t mtd_mod_by_ws(uint64_t sz, struct mtd_info *mtd)
346 return do_div(sz, mtd->writesize); 320 return do_div(sz, mtd->writesize);
347} 321}
348 322
349static inline int mtd_has_oob(const struct mtd_info *mtd)
350{
351 return mtd->_read_oob && mtd->_write_oob;
352}
353
354static inline int mtd_can_have_bb(const struct mtd_info *mtd)
355{
356 return !!mtd->_block_isbad;
357}
358
359 /* Kernel-side ioctl definitions */ 323 /* Kernel-side ioctl definitions */
360 324
361struct mtd_partition; 325struct mtd_partition;
362struct mtd_part_parser_data; 326
363 327extern int mtd_device_register(struct mtd_info *master,
364extern int mtd_device_parse_register(struct mtd_info *mtd, 328 const struct mtd_partition *parts,
365 const char **part_probe_types, 329 int nr_parts);
366 struct mtd_part_parser_data *parser_data,
367 const struct mtd_partition *defparts,
368 int defnr_parts);
369#define mtd_device_register(master, parts, nr_parts) \
370 mtd_device_parse_register(master, NULL, NULL, parts, nr_parts)
371extern int mtd_device_unregister(struct mtd_info *master); 330extern int mtd_device_unregister(struct mtd_info *master);
372extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num); 331extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num);
373extern int __get_mtd_device(struct mtd_info *mtd); 332extern int __get_mtd_device(struct mtd_info *mtd);
@@ -385,20 +344,38 @@ struct mtd_notifier {
385 344
386extern void register_mtd_user (struct mtd_notifier *new); 345extern void register_mtd_user (struct mtd_notifier *new);
387extern int unregister_mtd_user (struct mtd_notifier *old); 346extern int unregister_mtd_user (struct mtd_notifier *old);
388void *mtd_kmalloc_up_to(const struct mtd_info *mtd, size_t *size);
389 347
390void mtd_erase_callback(struct erase_info *instr); 348int default_mtd_writev(struct mtd_info *mtd, const struct kvec *vecs,
349 unsigned long count, loff_t to, size_t *retlen);
391 350
392static inline int mtd_is_bitflip(int err) { 351int default_mtd_readv(struct mtd_info *mtd, struct kvec *vecs,
393 return err == -EUCLEAN; 352 unsigned long count, loff_t from, size_t *retlen);
394}
395 353
396static inline int mtd_is_eccerr(int err) { 354void *mtd_kmalloc_up_to(const struct mtd_info *mtd, size_t *size);
397 return err == -EBADMSG;
398}
399 355
400static inline int mtd_is_bitflip_or_eccerr(int err) { 356void mtd_erase_callback(struct erase_info *instr);
401 return mtd_is_bitflip(err) || mtd_is_eccerr(err); 357
402} 358/*
359 * Debugging macro and defines
360 */
361#define MTD_DEBUG_LEVEL0 (0) /* Quiet */
362#define MTD_DEBUG_LEVEL1 (1) /* Audible */
363#define MTD_DEBUG_LEVEL2 (2) /* Loud */
364#define MTD_DEBUG_LEVEL3 (3) /* Noisy */
365
366#ifdef CONFIG_MTD_DEBUG
367#define DEBUG(n, args...) \
368 do { \
369 if (n <= CONFIG_MTD_DEBUG_VERBOSE) \
370 printk(KERN_INFO args); \
371 } while(0)
372#else /* CONFIG_MTD_DEBUG */
373#define DEBUG(n, args...) \
374 do { \
375 if (0) \
376 printk(KERN_INFO args); \
377 } while(0)
378
379#endif /* CONFIG_MTD_DEBUG */
403 380
404#endif /* __MTD_MTD_H__ */ 381#endif /* __MTD_MTD_H__ */
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 7ccb3c59ed6..c2b9ac4fbc4 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -42,10 +42,10 @@ extern void nand_release(struct mtd_info *mtd);
42/* Internal helper for board drivers which need to override command function */ 42/* Internal helper for board drivers which need to override command function */
43extern void nand_wait_ready(struct mtd_info *mtd); 43extern void nand_wait_ready(struct mtd_info *mtd);
44 44
45/* locks all blocks present in the device */ 45/* locks all blockes present in the device */
46extern int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len); 46extern int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
47 47
48/* unlocks specified locked blocks */ 48/* unlocks specified locked blockes */
49extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len); 49extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
50 50
51/* The maximum number of NAND chips in an array */ 51/* The maximum number of NAND chips in an array */
@@ -56,7 +56,7 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
56 * is supported now. If you add a chip with bigger oobsize/page 56 * is supported now. If you add a chip with bigger oobsize/page
57 * adjust this accordingly. 57 * adjust this accordingly.
58 */ 58 */
59#define NAND_MAX_OOBSIZE 640 59#define NAND_MAX_OOBSIZE 576
60#define NAND_MAX_PAGESIZE 8192 60#define NAND_MAX_PAGESIZE 8192
61 61
62/* 62/*
@@ -92,8 +92,6 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
92#define NAND_CMD_READID 0x90 92#define NAND_CMD_READID 0x90
93#define NAND_CMD_ERASE2 0xd0 93#define NAND_CMD_ERASE2 0xd0
94#define NAND_CMD_PARAM 0xec 94#define NAND_CMD_PARAM 0xec
95#define NAND_CMD_GET_FEATURES 0xee
96#define NAND_CMD_SET_FEATURES 0xef
97#define NAND_CMD_RESET 0xff 95#define NAND_CMD_RESET 0xff
98 96
99#define NAND_CMD_LOCK 0x2a 97#define NAND_CMD_LOCK 0x2a
@@ -152,7 +150,7 @@ typedef enum {
152#define NAND_ECC_READ 0 150#define NAND_ECC_READ 0
153/* Reset Hardware ECC for write */ 151/* Reset Hardware ECC for write */
154#define NAND_ECC_WRITE 1 152#define NAND_ECC_WRITE 1
155/* Enable Hardware ECC before syndrome is read back from flash */ 153/* Enable Hardware ECC before syndrom is read back from flash */
156#define NAND_ECC_READSYN 2 154#define NAND_ECC_READSYN 2
157 155
158/* Bit mask for flags passed to do_nand_read_ecc */ 156/* Bit mask for flags passed to do_nand_read_ecc */
@@ -163,7 +161,9 @@ typedef enum {
163 * Option constants for bizarre disfunctionality and real 161 * Option constants for bizarre disfunctionality and real
164 * features. 162 * features.
165 */ 163 */
166/* Buswidth is 16 bit */ 164/* Chip can not auto increment pages */
165#define NAND_NO_AUTOINCR 0x00000001
166/* Buswitdh is 16 bit */
167#define NAND_BUSWIDTH_16 0x00000002 167#define NAND_BUSWIDTH_16 0x00000002
168/* Device supports partial programming without padding */ 168/* Device supports partial programming without padding */
169#define NAND_NO_PADDING 0x00000004 169#define NAND_NO_PADDING 0x00000004
@@ -187,6 +187,12 @@ typedef enum {
187 * This happens with the Renesas AG-AND chips, possibly others. 187 * This happens with the Renesas AG-AND chips, possibly others.
188 */ 188 */
189#define BBT_AUTO_REFRESH 0x00000080 189#define BBT_AUTO_REFRESH 0x00000080
190/*
191 * Chip does not require ready check on read. True
192 * for all large page devices, as they do not support
193 * autoincrement.
194 */
195#define NAND_NO_READRDY 0x00000100
190/* Chip does not allow subpage writes */ 196/* Chip does not allow subpage writes */
191#define NAND_NO_SUBPAGE_WRITE 0x00000200 197#define NAND_NO_SUBPAGE_WRITE 0x00000200
192 198
@@ -196,36 +202,44 @@ typedef enum {
196/* Device behaves just like nand, but is readonly */ 202/* Device behaves just like nand, but is readonly */
197#define NAND_ROM 0x00000800 203#define NAND_ROM 0x00000800
198 204
199/* Device supports subpage reads */
200#define NAND_SUBPAGE_READ 0x00001000
201
202/* Options valid for Samsung large page devices */ 205/* Options valid for Samsung large page devices */
203#define NAND_SAMSUNG_LP_OPTIONS \ 206#define NAND_SAMSUNG_LP_OPTIONS \
204 (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK) 207 (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK)
205 208
206/* Macros to identify the above */ 209/* Macros to identify the above */
210#define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
207#define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING)) 211#define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
208#define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) 212#define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
209#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) 213#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
210#define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ)) 214/* Large page NAND with SOFT_ECC should support subpage reads */
215#define NAND_SUBPAGE_READ(chip) ((chip->ecc.mode == NAND_ECC_SOFT) \
216 && (chip->page_shift > 9))
217
218/* Mask to zero out the chip options, which come from the id table */
219#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
211 220
212/* Non chip related options */ 221/* Non chip related options */
222/*
223 * Use a flash based bad block table. OOB identifier is saved in OOB area.
224 * This option is passed to the default bad block table function.
225 */
226#define NAND_USE_FLASH_BBT 0x00010000
213/* This option skips the bbt scan during initialization. */ 227/* This option skips the bbt scan during initialization. */
214#define NAND_SKIP_BBTSCAN 0x00010000 228#define NAND_SKIP_BBTSCAN 0x00020000
215/* 229/*
216 * This option is defined if the board driver allocates its own buffers 230 * This option is defined if the board driver allocates its own buffers
217 * (e.g. because it needs them DMA-coherent). 231 * (e.g. because it needs them DMA-coherent).
218 */ 232 */
219#define NAND_OWN_BUFFERS 0x00020000 233#define NAND_OWN_BUFFERS 0x00040000
220/* Chip may not exist, so silence any errors in scan */ 234/* Chip may not exist, so silence any errors in scan */
221#define NAND_SCAN_SILENT_NODEV 0x00040000 235#define NAND_SCAN_SILENT_NODEV 0x00080000
222/* 236/*
223 * Autodetect nand buswidth with readid/onfi. 237 * If passed additionally to NAND_USE_FLASH_BBT then BBT code will not touch
224 * This suppose the driver will configure the hardware in 8 bits mode 238 * the OOB area.
225 * when calling nand_scan_ident, and update its configuration
226 * before calling nand_scan_tail.
227 */ 239 */
228#define NAND_BUSWIDTH_AUTO 0x00080000 240#define NAND_USE_FLASH_BBT_NO_OOB 0x00800000
241/* Create an empty BBT with no vendor information if the BBT is available */
242#define NAND_CREATE_EMPTY_BBT 0x01000000
229 243
230/* Options set by nand scan */ 244/* Options set by nand scan */
231/* Nand scan has allocated controller struct */ 245/* Nand scan has allocated controller struct */
@@ -238,21 +252,6 @@ typedef enum {
238/* Keep gcc happy */ 252/* Keep gcc happy */
239struct nand_chip; 253struct nand_chip;
240 254
241/* ONFI timing mode, used in both asynchronous and synchronous mode */
242#define ONFI_TIMING_MODE_0 (1 << 0)
243#define ONFI_TIMING_MODE_1 (1 << 1)
244#define ONFI_TIMING_MODE_2 (1 << 2)
245#define ONFI_TIMING_MODE_3 (1 << 3)
246#define ONFI_TIMING_MODE_4 (1 << 4)
247#define ONFI_TIMING_MODE_5 (1 << 5)
248#define ONFI_TIMING_MODE_UNKNOWN (1 << 6)
249
250/* ONFI feature address */
251#define ONFI_FEATURE_ADDR_TIMING_MODE 0x1
252
253/* ONFI subfeature parameters length */
254#define ONFI_SUBFEATURE_PARAM_LEN 4
255
256struct nand_onfi_params { 255struct nand_onfi_params {
257 /* rev info and features block */ 256 /* rev info and features block */
258 /* 'O' 'N' 'F' 'I' */ 257 /* 'O' 'N' 'F' 'I' */
@@ -332,32 +331,27 @@ struct nand_hw_control {
332}; 331};
333 332
334/** 333/**
335 * struct nand_ecc_ctrl - Control structure for ECC 334 * struct nand_ecc_ctrl - Control structure for ecc
336 * @mode: ECC mode 335 * @mode: ecc mode
337 * @steps: number of ECC steps per page 336 * @steps: number of ecc steps per page
338 * @size: data bytes per ECC step 337 * @size: data bytes per ecc step
339 * @bytes: ECC bytes per step 338 * @bytes: ecc bytes per step
340 * @strength: max number of correctible bits per ECC step 339 * @total: total number of ecc bytes per page
341 * @total: total number of ECC bytes per page 340 * @prepad: padding information for syndrome based ecc generators
342 * @prepad: padding information for syndrome based ECC generators 341 * @postpad: padding information for syndrome based ecc generators
343 * @postpad: padding information for syndrome based ECC generators
344 * @layout: ECC layout control struct pointer 342 * @layout: ECC layout control struct pointer
345 * @priv: pointer to private ECC control data 343 * @priv: pointer to private ecc control data
346 * @hwctl: function to control hardware ECC generator. Must only 344 * @hwctl: function to control hardware ecc generator. Must only
347 * be provided if an hardware ECC is available 345 * be provided if an hardware ECC is available
348 * @calculate: function for ECC calculation or readback from ECC hardware 346 * @calculate: function for ecc calculation or readback from ecc hardware
349 * @correct: function for ECC correction, matching to ECC generator (sw/hw) 347 * @correct: function for ecc correction, matching to ecc generator (sw/hw)
350 * @read_page_raw: function to read a raw page without ECC 348 * @read_page_raw: function to read a raw page without ECC
351 * @write_page_raw: function to write a raw page without ECC 349 * @write_page_raw: function to write a raw page without ECC
352 * @read_page: function to read a page according to the ECC generator 350 * @read_page: function to read a page according to the ecc generator
353 * requirements; returns maximum number of bitflips corrected in 351 * requirements.
354 * any single ECC step, 0 if bitflips uncorrectable, -EIO hw error 352 * @read_subpage: function to read parts of the page covered by ECC.
355 * @read_subpage: function to read parts of the page covered by ECC; 353 * @write_page: function to write a page according to the ecc generator
356 * returns same as read_page()
357 * @write_page: function to write a page according to the ECC generator
358 * requirements. 354 * requirements.
359 * @write_oob_raw: function to write chip OOB data without ECC
360 * @read_oob_raw: function to read chip OOB data without ECC
361 * @read_oob: function to read chip OOB data 355 * @read_oob: function to read chip OOB data
362 * @write_oob: function to write chip OOB data 356 * @write_oob: function to write chip OOB data
363 */ 357 */
@@ -367,7 +361,6 @@ struct nand_ecc_ctrl {
367 int size; 361 int size;
368 int bytes; 362 int bytes;
369 int total; 363 int total;
370 int strength;
371 int prepad; 364 int prepad;
372 int postpad; 365 int postpad;
373 struct nand_ecclayout *layout; 366 struct nand_ecclayout *layout;
@@ -378,28 +371,25 @@ struct nand_ecc_ctrl {
378 int (*correct)(struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc, 371 int (*correct)(struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc,
379 uint8_t *calc_ecc); 372 uint8_t *calc_ecc);
380 int (*read_page_raw)(struct mtd_info *mtd, struct nand_chip *chip, 373 int (*read_page_raw)(struct mtd_info *mtd, struct nand_chip *chip,
381 uint8_t *buf, int oob_required, int page); 374 uint8_t *buf, int page);
382 int (*write_page_raw)(struct mtd_info *mtd, struct nand_chip *chip, 375 void (*write_page_raw)(struct mtd_info *mtd, struct nand_chip *chip,
383 const uint8_t *buf, int oob_required); 376 const uint8_t *buf);
384 int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip, 377 int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip,
385 uint8_t *buf, int oob_required, int page); 378 uint8_t *buf, int page);
386 int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip, 379 int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip,
387 uint32_t offs, uint32_t len, uint8_t *buf); 380 uint32_t offs, uint32_t len, uint8_t *buf);
388 int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, 381 void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
389 const uint8_t *buf, int oob_required); 382 const uint8_t *buf);
390 int (*write_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip, 383 int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page,
391 int page); 384 int sndcmd);
392 int (*read_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip,
393 int page);
394 int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page);
395 int (*write_oob)(struct mtd_info *mtd, struct nand_chip *chip, 385 int (*write_oob)(struct mtd_info *mtd, struct nand_chip *chip,
396 int page); 386 int page);
397}; 387};
398 388
399/** 389/**
400 * struct nand_buffers - buffer structure for read/write 390 * struct nand_buffers - buffer structure for read/write
401 * @ecccalc: buffer for calculated ECC 391 * @ecccalc: buffer for calculated ecc
402 * @ecccode: buffer for ECC read from flash 392 * @ecccode: buffer for ecc read from flash
403 * @databuf: buffer for data - dynamically sized 393 * @databuf: buffer for data - dynamically sized
404 * 394 *
405 * Do not change the order of buffers. databuf and oobrbuf must be in 395 * Do not change the order of buffers. databuf and oobrbuf must be in
@@ -421,6 +411,8 @@ struct nand_buffers {
421 * @read_word: [REPLACEABLE] read one word from the chip 411 * @read_word: [REPLACEABLE] read one word from the chip
422 * @write_buf: [REPLACEABLE] write data from the buffer to the chip 412 * @write_buf: [REPLACEABLE] write data from the buffer to the chip
423 * @read_buf: [REPLACEABLE] read data from the chip into the buffer 413 * @read_buf: [REPLACEABLE] read data from the chip into the buffer
414 * @verify_buf: [REPLACEABLE] verify buffer contents against the chip
415 * data.
424 * @select_chip: [REPLACEABLE] select chip nr 416 * @select_chip: [REPLACEABLE] select chip nr
425 * @block_bad: [REPLACEABLE] check, if the block is bad 417 * @block_bad: [REPLACEABLE] check, if the block is bad
426 * @block_markbad: [REPLACEABLE] mark the block bad 418 * @block_markbad: [REPLACEABLE] mark the block bad
@@ -430,7 +422,7 @@ struct nand_buffers {
430 * mtd->oobsize, mtd->writesize and so on. 422 * mtd->oobsize, mtd->writesize and so on.
431 * @id_data contains the 8 bytes values of NAND_CMD_READID. 423 * @id_data contains the 8 bytes values of NAND_CMD_READID.
432 * Return with the bus width. 424 * Return with the bus width.
433 * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accessing 425 * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing
434 * device ready/busy line. If set to NULL no access to 426 * device ready/busy line. If set to NULL no access to
435 * ready/busy is available and the ready/busy information 427 * ready/busy is available and the ready/busy information
436 * is read from the chip status register. 428 * is read from the chip status register.
@@ -438,17 +430,17 @@ struct nand_buffers {
438 * commands to the chip. 430 * commands to the chip.
439 * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on 431 * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on
440 * ready. 432 * ready.
441 * @ecc: [BOARDSPECIFIC] ECC control structure 433 * @ecc: [BOARDSPECIFIC] ecc control ctructure
442 * @buffers: buffer structure for read/write 434 * @buffers: buffer structure for read/write
443 * @hwcontrol: platform-specific hardware control structure 435 * @hwcontrol: platform-specific hardware control structure
436 * @ops: oob operation operands
444 * @erase_cmd: [INTERN] erase command write function, selectable due 437 * @erase_cmd: [INTERN] erase command write function, selectable due
445 * to AND support. 438 * to AND support.
446 * @scan_bbt: [REPLACEABLE] function to scan bad block table 439 * @scan_bbt: [REPLACEABLE] function to scan bad block table
447 * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transferring 440 * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transferring
448 * data from array to read regs (tR). 441 * data from array to read regs (tR).
449 * @state: [INTERN] the current state of the NAND device 442 * @state: [INTERN] the current state of the NAND device
450 * @oob_poi: "poison value buffer," used for laying out OOB data 443 * @oob_poi: poison value buffer
451 * before writing
452 * @page_shift: [INTERN] number of address bits in a page (column 444 * @page_shift: [INTERN] number of address bits in a page (column
453 * address bits). 445 * address bits).
454 * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock 446 * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
@@ -457,30 +449,22 @@ struct nand_buffers {
457 * @options: [BOARDSPECIFIC] various chip options. They can partly 449 * @options: [BOARDSPECIFIC] various chip options. They can partly
458 * be set to inform nand_scan about special functionality. 450 * be set to inform nand_scan about special functionality.
459 * See the defines for further explanation. 451 * See the defines for further explanation.
460 * @bbt_options: [INTERN] bad block specific options. All options used
461 * here must come from bbm.h. By default, these options
462 * will be copied to the appropriate nand_bbt_descr's.
463 * @badblockpos: [INTERN] position of the bad block marker in the oob 452 * @badblockpos: [INTERN] position of the bad block marker in the oob
464 * area. 453 * area.
465 * @badblockbits: [INTERN] minimum number of set bits in a good block's 454 * @badblockbits: [INTERN] number of bits to left-shift the bad block
466 * bad block marker position; i.e., BBM == 11110111b is 455 * number
467 * not bad when badblockbits == 7
468 * @cellinfo: [INTERN] MLC/multichip data from chip ident 456 * @cellinfo: [INTERN] MLC/multichip data from chip ident
469 * @numchips: [INTERN] number of physical chips 457 * @numchips: [INTERN] number of physical chips
470 * @chipsize: [INTERN] the size of one chip for multichip arrays 458 * @chipsize: [INTERN] the size of one chip for multichip arrays
471 * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 459 * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
472 * @pagebuf: [INTERN] holds the pagenumber which is currently in 460 * @pagebuf: [INTERN] holds the pagenumber which is currently in
473 * data_buf. 461 * data_buf.
474 * @pagebuf_bitflips: [INTERN] holds the bitflip count for the page which is
475 * currently in data_buf.
476 * @subpagesize: [INTERN] holds the subpagesize 462 * @subpagesize: [INTERN] holds the subpagesize
477 * @onfi_version: [INTERN] holds the chip ONFI version (BCD encoded), 463 * @onfi_version: [INTERN] holds the chip ONFI version (BCD encoded),
478 * non 0 if ONFI supported. 464 * non 0 if ONFI supported.
479 * @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is 465 * @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is
480 * supported, 0 otherwise. 466 * supported, 0 otherwise.
481 * @onfi_set_features: [REPLACEABLE] set the features for ONFI nand 467 * @ecclayout: [REPLACEABLE] the default ecc placement scheme
482 * @onfi_get_features: [REPLACEABLE] get the features for ONFI nand
483 * @ecclayout: [REPLACEABLE] the default ECC placement scheme
484 * @bbt: [INTERN] bad block table pointer 468 * @bbt: [INTERN] bad block table pointer
485 * @bbt_td: [REPLACEABLE] bad block table descriptor for flash 469 * @bbt_td: [REPLACEABLE] bad block table descriptor for flash
486 * lookup. 470 * lookup.
@@ -488,9 +472,9 @@ struct nand_buffers {
488 * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial 472 * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial
489 * bad block scan. 473 * bad block scan.
490 * @controller: [REPLACEABLE] a pointer to a hardware controller 474 * @controller: [REPLACEABLE] a pointer to a hardware controller
491 * structure which is shared among multiple independent 475 * structure which is shared among multiple independend
492 * devices. 476 * devices.
493 * @priv: [OPTIONAL] pointer to private chip data 477 * @priv: [OPTIONAL] pointer to private chip date
494 * @errstat: [OPTIONAL] hardware specific function to perform 478 * @errstat: [OPTIONAL] hardware specific function to perform
495 * additional error status checks (determine if errors are 479 * additional error status checks (determine if errors are
496 * correctable). 480 * correctable).
@@ -505,6 +489,7 @@ struct nand_chip {
505 u16 (*read_word)(struct mtd_info *mtd); 489 u16 (*read_word)(struct mtd_info *mtd);
506 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); 490 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
507 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len); 491 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
492 int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
508 void (*select_chip)(struct mtd_info *mtd, int chip); 493 void (*select_chip)(struct mtd_info *mtd, int chip);
509 int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip); 494 int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
510 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); 495 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
@@ -520,16 +505,10 @@ struct nand_chip {
520 int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, 505 int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state,
521 int status, int page); 506 int status, int page);
522 int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, 507 int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
523 const uint8_t *buf, int oob_required, int page, 508 const uint8_t *buf, int page, int cached, int raw);
524 int cached, int raw);
525 int (*onfi_set_features)(struct mtd_info *mtd, struct nand_chip *chip,
526 int feature_addr, uint8_t *subfeature_para);
527 int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,
528 int feature_addr, uint8_t *subfeature_para);
529 509
530 int chip_delay; 510 int chip_delay;
531 unsigned int options; 511 unsigned int options;
532 unsigned int bbt_options;
533 512
534 int page_shift; 513 int page_shift;
535 int phys_erase_shift; 514 int phys_erase_shift;
@@ -539,7 +518,6 @@ struct nand_chip {
539 uint64_t chipsize; 518 uint64_t chipsize;
540 int pagemask; 519 int pagemask;
541 int pagebuf; 520 int pagebuf;
542 unsigned int pagebuf_bitflips;
543 int subpagesize; 521 int subpagesize;
544 uint8_t cellinfo; 522 uint8_t cellinfo;
545 int badblockpos; 523 int badblockpos;
@@ -558,6 +536,8 @@ struct nand_chip {
558 struct nand_buffers *buffers; 536 struct nand_buffers *buffers;
559 struct nand_hw_control hwcontrol; 537 struct nand_hw_control hwcontrol;
560 538
539 struct mtd_oob_ops ops;
540
561 uint8_t *bbt; 541 uint8_t *bbt;
562 struct nand_bbt_descr *bbt_td; 542 struct nand_bbt_descr *bbt_td;
563 struct nand_bbt_descr *bbt_md; 543 struct nand_bbt_descr *bbt_md;
@@ -579,8 +559,6 @@ struct nand_chip {
579#define NAND_MFR_HYNIX 0xad 559#define NAND_MFR_HYNIX 0xad
580#define NAND_MFR_MICRON 0x2c 560#define NAND_MFR_MICRON 0x2c
581#define NAND_MFR_AMD 0x01 561#define NAND_MFR_AMD 0x01
582#define NAND_MFR_MACRONIX 0xc2
583#define NAND_MFR_EON 0x92
584 562
585/** 563/**
586 * struct nand_flash_dev - NAND Flash Device ID Structure 564 * struct nand_flash_dev - NAND Flash Device ID Structure
@@ -633,9 +611,10 @@ extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
633 * @partitions: mtd partition list 611 * @partitions: mtd partition list
634 * @chip_delay: R/B delay value in us 612 * @chip_delay: R/B delay value in us
635 * @options: Option flags, e.g. 16bit buswidth 613 * @options: Option flags, e.g. 16bit buswidth
636 * @bbt_options: BBT option flags, e.g. NAND_BBT_USE_FLASH 614 * @ecclayout: ecc layout info structure
637 * @ecclayout: ECC layout info structure
638 * @part_probe_types: NULL-terminated array of probe types 615 * @part_probe_types: NULL-terminated array of probe types
616 * @set_parts: platform specific function to set partitions
617 * @priv: hardware controller specific settings
639 */ 618 */
640struct platform_nand_chip { 619struct platform_nand_chip {
641 int nr_chips; 620 int nr_chips;
@@ -645,8 +624,9 @@ struct platform_nand_chip {
645 struct nand_ecclayout *ecclayout; 624 struct nand_ecclayout *ecclayout;
646 int chip_delay; 625 int chip_delay;
647 unsigned int options; 626 unsigned int options;
648 unsigned int bbt_options;
649 const char **part_probe_types; 627 const char **part_probe_types;
628 void (*set_parts)(uint64_t size, struct platform_nand_chip *chip);
629 void *priv;
650}; 630};
651 631
652/* Keep gcc happy */ 632/* Keep gcc happy */
@@ -663,7 +643,6 @@ struct platform_device;
663 * ALE/CLE/nCE. Also used to write command and address 643 * ALE/CLE/nCE. Also used to write command and address
664 * @write_buf: platform specific function for write buffer 644 * @write_buf: platform specific function for write buffer
665 * @read_buf: platform specific function for read buffer 645 * @read_buf: platform specific function for read buffer
666 * @read_byte: platform specific function to read one byte from chip
667 * @priv: private data to transport driver specific settings 646 * @priv: private data to transport driver specific settings
668 * 647 *
669 * All fields are optional and depend on the hardware driver requirements 648 * All fields are optional and depend on the hardware driver requirements
@@ -677,7 +656,6 @@ struct platform_nand_ctrl {
677 void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl); 656 void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl);
678 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); 657 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
679 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len); 658 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
680 unsigned char (*read_byte)(struct mtd_info *mtd);
681 void *priv; 659 void *priv;
682}; 660};
683 661
@@ -700,20 +678,4 @@ struct platform_nand_chip *get_platform_nandchip(struct mtd_info *mtd)
700 return chip->priv; 678 return chip->priv;
701} 679}
702 680
703/* return the supported asynchronous timing mode. */
704static inline int onfi_get_async_timing_mode(struct nand_chip *chip)
705{
706 if (!chip->onfi_version)
707 return ONFI_TIMING_MODE_UNKNOWN;
708 return le16_to_cpu(chip->onfi_params.async_timing_mode);
709}
710
711/* return the supported synchronous timing mode. */
712static inline int onfi_get_sync_timing_mode(struct nand_chip *chip)
713{
714 if (!chip->onfi_version)
715 return ONFI_TIMING_MODE_UNKNOWN;
716 return le16_to_cpu(chip->onfi_params.src_sync_timing_mode);
717}
718
719#endif /* __LINUX_MTD_NAND_H */ 681#endif /* __LINUX_MTD_NAND_H */
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
index 4596503c9da..52b6f187bf4 100644
--- a/include/linux/mtd/onenand.h
+++ b/include/linux/mtd/onenand.h
@@ -184,9 +184,6 @@ struct onenand_chip {
184#define ONENAND_IS_CACHE_PROGRAM(this) \ 184#define ONENAND_IS_CACHE_PROGRAM(this) \
185 (this->options & ONENAND_HAS_CACHE_PROGRAM) 185 (this->options & ONENAND_HAS_CACHE_PROGRAM)
186 186
187#define ONENAND_IS_NOP_1(this) \
188 (this->options & ONENAND_HAS_NOP_1)
189
190/* Check byte access in OneNAND */ 187/* Check byte access in OneNAND */
191#define ONENAND_CHECK_BYTE_ACCESS(addr) (addr & 0x1) 188#define ONENAND_CHECK_BYTE_ACCESS(addr) (addr & 0x1)
192 189
@@ -198,7 +195,6 @@ struct onenand_chip {
198#define ONENAND_HAS_2PLANE (0x0004) 195#define ONENAND_HAS_2PLANE (0x0004)
199#define ONENAND_HAS_4KB_PAGE (0x0008) 196#define ONENAND_HAS_4KB_PAGE (0x0008)
200#define ONENAND_HAS_CACHE_PROGRAM (0x0010) 197#define ONENAND_HAS_CACHE_PROGRAM (0x0010)
201#define ONENAND_HAS_NOP_1 (0x0020)
202#define ONENAND_SKIP_UNLOCK_CHECK (0x0100) 198#define ONENAND_SKIP_UNLOCK_CHECK (0x0100)
203#define ONENAND_PAGEBUF_ALLOC (0x1000) 199#define ONENAND_PAGEBUF_ALLOC (0x1000)
204#define ONENAND_OOBBUF_ALLOC (0x2000) 200#define ONENAND_OOBBUF_ALLOC (0x2000)
diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h
index 1f8d24bdafd..3a6f0372fc9 100644
--- a/include/linux/mtd/partitions.h
+++ b/include/linux/mtd/partitions.h
@@ -24,9 +24,7 @@
24 * will extend to the end of the master MTD device. 24 * will extend to the end of the master MTD device.
25 * offset: absolute starting position within the master MTD device; if 25 * offset: absolute starting position within the master MTD device; if
26 * defined as MTDPART_OFS_APPEND, the partition will start where the 26 * defined as MTDPART_OFS_APPEND, the partition will start where the
27 * previous one ended; if MTDPART_OFS_NXTBLK, at the next erase block; 27 * previous one ended; if MTDPART_OFS_NXTBLK, at the next erase block.
28 * if MTDPART_OFS_RETAIN, consume as much as possible, leaving size
29 * after the end of partition.
30 * mask_flags: contains flags that have to be masked (removed) from the 28 * mask_flags: contains flags that have to be masked (removed) from the
31 * master MTD flag set for the corresponding MTD partition. 29 * master MTD flag set for the corresponding MTD partition.
32 * For example, to force a read-only partition, simply adding 30 * For example, to force a read-only partition, simply adding
@@ -44,25 +42,12 @@ struct mtd_partition {
44 struct nand_ecclayout *ecclayout; /* out of band layout for this partition (NAND only) */ 42 struct nand_ecclayout *ecclayout; /* out of band layout for this partition (NAND only) */
45}; 43};
46 44
47#define MTDPART_OFS_RETAIN (-3)
48#define MTDPART_OFS_NXTBLK (-2) 45#define MTDPART_OFS_NXTBLK (-2)
49#define MTDPART_OFS_APPEND (-1) 46#define MTDPART_OFS_APPEND (-1)
50#define MTDPART_SIZ_FULL (0) 47#define MTDPART_SIZ_FULL (0)
51 48
52 49
53struct mtd_info; 50struct mtd_info;
54struct device_node;
55
56/**
57 * struct mtd_part_parser_data - used to pass data to MTD partition parsers.
58 * @origin: for RedBoot, start address of MTD device
59 * @of_node: for OF parsers, device node containing partitioning information
60 */
61struct mtd_part_parser_data {
62 unsigned long origin;
63 struct device_node *of_node;
64};
65
66 51
67/* 52/*
68 * Functions dealing with the various ways of partitioning the space 53 * Functions dealing with the various ways of partitioning the space
@@ -72,17 +57,41 @@ struct mtd_part_parser {
72 struct list_head list; 57 struct list_head list;
73 struct module *owner; 58 struct module *owner;
74 const char *name; 59 const char *name;
75 int (*parse_fn)(struct mtd_info *, struct mtd_partition **, 60 int (*parse_fn)(struct mtd_info *, struct mtd_partition **, unsigned long);
76 struct mtd_part_parser_data *);
77}; 61};
78 62
79extern int register_mtd_parser(struct mtd_part_parser *parser); 63extern int register_mtd_parser(struct mtd_part_parser *parser);
80extern int deregister_mtd_parser(struct mtd_part_parser *parser); 64extern int deregister_mtd_parser(struct mtd_part_parser *parser);
65extern int parse_mtd_partitions(struct mtd_info *master, const char **types,
66 struct mtd_partition **pparts, unsigned long origin);
67
68#define put_partition_parser(p) do { module_put((p)->owner); } while(0)
69
70struct device;
71struct device_node;
72
73#ifdef CONFIG_MTD_OF_PARTS
74int __devinit of_mtd_parse_partitions(struct device *dev,
75 struct device_node *node,
76 struct mtd_partition **pparts);
77#else
78static inline int of_mtd_parse_partitions(struct device *dev,
79 struct device_node *node,
80 struct mtd_partition **pparts)
81{
82 return 0;
83}
84#endif
85
86#ifdef CONFIG_MTD_CMDLINE_PARTS
87static inline int mtd_has_cmdlinepart(void) { return 1; }
88#else
89static inline int mtd_has_cmdlinepart(void) { return 0; }
90#endif
81 91
82int mtd_is_partition(const struct mtd_info *mtd); 92int mtd_is_partition(struct mtd_info *mtd);
83int mtd_add_partition(struct mtd_info *master, char *name, 93int mtd_add_partition(struct mtd_info *master, char *name,
84 long long offset, long long length); 94 long long offset, long long length);
85int mtd_del_partition(struct mtd_info *master, int partno); 95int mtd_del_partition(struct mtd_info *master, int partno);
86uint64_t mtd_get_device_size(const struct mtd_info *mtd);
87 96
88#endif 97#endif
diff --git a/include/linux/mtd/physmap.h b/include/linux/mtd/physmap.h
index d2887e76b7f..e5f21d293c7 100644
--- a/include/linux/mtd/physmap.h
+++ b/include/linux/mtd/physmap.h
@@ -30,7 +30,23 @@ struct physmap_flash_data {
30 unsigned int pfow_base; 30 unsigned int pfow_base;
31 char *probe_type; 31 char *probe_type;
32 struct mtd_partition *parts; 32 struct mtd_partition *parts;
33 const char **part_probe_types;
34}; 33};
35 34
35/*
36 * Board needs to specify the exact mapping during their setup time.
37 */
38void physmap_configure(unsigned long addr, unsigned long size,
39 int bankwidth, void (*set_vpp)(struct map_info *, int) );
40
41/*
42 * Machines that wish to do flash partition may want to call this function in
43 * their setup routine.
44 *
45 * physmap_set_partitions(mypartitions, num_parts);
46 *
47 * Note that one can always override this hard-coded partition with
48 * command line partition (you need to enable CONFIG_MTD_CMDLINE_PARTS).
49 */
50void physmap_set_partitions(struct mtd_partition *parts, int num_parts);
51
36#endif /* __LINUX_MTD_PHYSMAP__ */ 52#endif /* __LINUX_MTD_PHYSMAP__ */
diff --git a/include/linux/mtd/sh_flctl.h b/include/linux/mtd/sh_flctl.h
index 1c28f8879b1..9cf4c4c7955 100644
--- a/include/linux/mtd/sh_flctl.h
+++ b/include/linux/mtd/sh_flctl.h
@@ -20,11 +20,9 @@
20#ifndef __SH_FLCTL_H__ 20#ifndef __SH_FLCTL_H__
21#define __SH_FLCTL_H__ 21#define __SH_FLCTL_H__
22 22
23#include <linux/completion.h>
24#include <linux/mtd/mtd.h> 23#include <linux/mtd/mtd.h>
25#include <linux/mtd/nand.h> 24#include <linux/mtd/nand.h>
26#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
27#include <linux/pm_qos.h>
28 26
29/* FLCTL registers */ 27/* FLCTL registers */
30#define FLCMNCR(f) (f->reg + 0x0) 28#define FLCMNCR(f) (f->reg + 0x0)
@@ -40,7 +38,6 @@
40#define FLDTFIFO(f) (f->reg + 0x24) 38#define FLDTFIFO(f) (f->reg + 0x24)
41#define FLECFIFO(f) (f->reg + 0x28) 39#define FLECFIFO(f) (f->reg + 0x28)
42#define FLTRCR(f) (f->reg + 0x2C) 40#define FLTRCR(f) (f->reg + 0x2C)
43#define FLHOLDCR(f) (f->reg + 0x38)
44#define FL4ECCRESULT0(f) (f->reg + 0x80) 41#define FL4ECCRESULT0(f) (f->reg + 0x80)
45#define FL4ECCRESULT1(f) (f->reg + 0x84) 42#define FL4ECCRESULT1(f) (f->reg + 0x84)
46#define FL4ECCRESULT2(f) (f->reg + 0x88) 43#define FL4ECCRESULT2(f) (f->reg + 0x88)
@@ -50,6 +47,7 @@
50#define FLERRADR(f) (f->reg + 0x98) 47#define FLERRADR(f) (f->reg + 0x98)
51 48
52/* FLCMNCR control bits */ 49/* FLCMNCR control bits */
50#define ECCPOS2 (0x1 << 25)
53#define _4ECCCNTEN (0x1 << 24) 51#define _4ECCCNTEN (0x1 << 24)
54#define _4ECCEN (0x1 << 23) 52#define _4ECCEN (0x1 << 23)
55#define _4ECCCORRECT (0x1 << 22) 53#define _4ECCCORRECT (0x1 << 22)
@@ -59,6 +57,9 @@
59#define QTSEL_E (0x1 << 17) 57#define QTSEL_E (0x1 << 17)
60#define ENDIAN (0x1 << 16) /* 1 = little endian */ 58#define ENDIAN (0x1 << 16) /* 1 = little endian */
61#define FCKSEL_E (0x1 << 15) 59#define FCKSEL_E (0x1 << 15)
60#define ECCPOS_00 (0x00 << 12)
61#define ECCPOS_01 (0x01 << 12)
62#define ECCPOS_02 (0x02 << 12)
62#define ACM_SACCES_MODE (0x01 << 10) 63#define ACM_SACCES_MODE (0x01 << 10)
63#define NANWF_E (0x1 << 9) 64#define NANWF_E (0x1 << 9)
64#define SE_D (0x1 << 8) /* Spare area disable */ 65#define SE_D (0x1 << 8) /* Spare area disable */
@@ -66,30 +67,6 @@
66#define CE0_ENABLE (0x1 << 3) /* Chip Enable 0 */ 67#define CE0_ENABLE (0x1 << 3) /* Chip Enable 0 */
67#define TYPESEL_SET (0x1 << 0) 68#define TYPESEL_SET (0x1 << 0)
68 69
69/*
70 * Clock settings using the PULSEx registers from FLCMNCR
71 *
72 * Some hardware uses bits called PULSEx instead of FCKSEL_E and QTSEL_E
73 * to control the clock divider used between the High-Speed Peripheral Clock
74 * and the FLCTL internal clock. If so, use CLK_8_BIT_xxx for connecting 8 bit
75 * and CLK_16_BIT_xxx for connecting 16 bit bus bandwith NAND chips. For the 16
76 * bit version the divider is seperate for the pulse width of high and low
77 * signals.
78 */
79#define PULSE3 (0x1 << 27)
80#define PULSE2 (0x1 << 17)
81#define PULSE1 (0x1 << 15)
82#define PULSE0 (0x1 << 9)
83#define CLK_8B_0_5 PULSE1
84#define CLK_8B_1 0x0
85#define CLK_8B_1_5 (PULSE1 | PULSE2)
86#define CLK_8B_2 PULSE0
87#define CLK_8B_3 (PULSE0 | PULSE1 | PULSE2)
88#define CLK_8B_4 (PULSE0 | PULSE2)
89#define CLK_16B_6L_2H PULSE0
90#define CLK_16B_9L_3H (PULSE0 | PULSE1 | PULSE2)
91#define CLK_16B_12L_4H (PULSE0 | PULSE2)
92
93/* FLCMDCR control bits */ 70/* FLCMDCR control bits */
94#define ADRCNT2_E (0x1 << 31) /* 5byte address enable */ 71#define ADRCNT2_E (0x1 << 31) /* 5byte address enable */
95#define ADRMD_E (0x1 << 26) /* Sector address access */ 72#define ADRMD_E (0x1 << 26) /* Sector address access */
@@ -104,72 +81,38 @@
104#define DOCMD2_E (0x1 << 17) /* 2nd cmd stage execute */ 81#define DOCMD2_E (0x1 << 17) /* 2nd cmd stage execute */
105#define DOCMD1_E (0x1 << 16) /* 1st cmd stage execute */ 82#define DOCMD1_E (0x1 << 16) /* 1st cmd stage execute */
106 83
107/* FLINTDMACR control bits */
108#define ESTERINTE (0x1 << 24) /* ECC error interrupt enable */
109#define AC1CLR (0x1 << 19) /* ECC FIFO clear */
110#define AC0CLR (0x1 << 18) /* Data FIFO clear */
111#define DREQ0EN (0x1 << 16) /* FLDTFIFODMA Request Enable */
112#define ECERB (0x1 << 9) /* ECC error */
113#define STERB (0x1 << 8) /* Status error */
114#define STERINTE (0x1 << 4) /* Status error enable */
115
116/* FLTRCR control bits */ 84/* FLTRCR control bits */
117#define TRSTRT (0x1 << 0) /* translation start */ 85#define TRSTRT (0x1 << 0) /* translation start */
118#define TREND (0x1 << 1) /* translation end */ 86#define TREND (0x1 << 1) /* translation end */
119 87
120/*
121 * FLHOLDCR control bits
122 *
123 * HOLDEN: Bus Occupancy Enable (inverted)
124 * Enable this bit when the external bus might be used in between transfers.
125 * If not set and the bus gets used by other modules, a deadlock occurs.
126 */
127#define HOLDEN (0x1 << 0)
128
129/* FL4ECCCR control bits */ 88/* FL4ECCCR control bits */
130#define _4ECCFA (0x1 << 2) /* 4 symbols correct fault */ 89#define _4ECCFA (0x1 << 2) /* 4 symbols correct fault */
131#define _4ECCEND (0x1 << 1) /* 4 symbols end */ 90#define _4ECCEND (0x1 << 1) /* 4 symbols end */
132#define _4ECCEXST (0x1 << 0) /* 4 symbols exist */ 91#define _4ECCEXST (0x1 << 0) /* 4 symbols exist */
133 92
93#define INIT_FL4ECCRESULT_VAL 0x03FF03FF
134#define LOOP_TIMEOUT_MAX 0x00010000 94#define LOOP_TIMEOUT_MAX 0x00010000
135 95
136enum flctl_ecc_res_t {
137 FL_SUCCESS,
138 FL_REPAIRABLE,
139 FL_ERROR,
140 FL_TIMEOUT
141};
142
143struct dma_chan;
144
145struct sh_flctl { 96struct sh_flctl {
146 struct mtd_info mtd; 97 struct mtd_info mtd;
147 struct nand_chip chip; 98 struct nand_chip chip;
148 struct platform_device *pdev; 99 struct platform_device *pdev;
149 struct dev_pm_qos_request pm_qos;
150 void __iomem *reg; 100 void __iomem *reg;
151 101
152 uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */ 102 uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */
153 int read_bytes; 103 int read_bytes;
154 unsigned int index; 104 int index;
155 int seqin_column; /* column in SEQIN cmd */ 105 int seqin_column; /* column in SEQIN cmd */
156 int seqin_page_addr; /* page_addr in SEQIN cmd */ 106 int seqin_page_addr; /* page_addr in SEQIN cmd */
157 uint32_t seqin_read_cmd; /* read cmd in SEQIN cmd */ 107 uint32_t seqin_read_cmd; /* read cmd in SEQIN cmd */
158 int erase1_page_addr; /* page_addr in ERASE1 cmd */ 108 int erase1_page_addr; /* page_addr in ERASE1 cmd */
159 uint32_t erase_ADRCNT; /* bits of FLCMDCR in ERASE1 cmd */ 109 uint32_t erase_ADRCNT; /* bits of FLCMDCR in ERASE1 cmd */
160 uint32_t rw_ADRCNT; /* bits of FLCMDCR in READ WRITE cmd */ 110 uint32_t rw_ADRCNT; /* bits of FLCMDCR in READ WRITE cmd */
161 uint32_t flcmncr_base; /* base value of FLCMNCR */ 111
162 uint32_t flintdmacr_base; /* irq enable bits */ 112 int hwecc_cant_correct[4];
163 113
164 unsigned page_size:1; /* NAND page size (0 = 512, 1 = 2048) */ 114 unsigned page_size:1; /* NAND page size (0 = 512, 1 = 2048) */
165 unsigned hwecc:1; /* Hardware ECC (0 = disabled, 1 = enabled) */ 115 unsigned hwecc:1; /* Hardware ECC (0 = disabled, 1 = enabled) */
166 unsigned holden:1; /* Hardware has FLHOLDCR and HOLDEN is set */
167 unsigned qos_request:1; /* QoS request to prevent deep power shutdown */
168
169 /* DMA related objects */
170 struct dma_chan *chan_fifo0_rx;
171 struct dma_chan *chan_fifo0_tx;
172 struct completion dma_complete;
173}; 116};
174 117
175struct sh_flctl_platform_data { 118struct sh_flctl_platform_data {
@@ -178,10 +121,6 @@ struct sh_flctl_platform_data {
178 unsigned long flcmncr_val; 121 unsigned long flcmncr_val;
179 122
180 unsigned has_hwecc:1; 123 unsigned has_hwecc:1;
181 unsigned use_holden:1;
182
183 unsigned int slave_id_fifo0_tx;
184 unsigned int slave_id_fifo0_rx;
185}; 124};
186 125
187static inline struct sh_flctl *mtd_to_flctl(struct mtd_info *mtdinfo) 126static inline struct sh_flctl *mtd_to_flctl(struct mtd_info *mtdinfo)
diff --git a/include/linux/mtd/spear_smi.h b/include/linux/mtd/spear_smi.h
deleted file mode 100644
index 8ae1726044c..00000000000
--- a/include/linux/mtd/spear_smi.h
+++ /dev/null
@@ -1,65 +0,0 @@
1/*
2 * Copyright © 2010 ST Microelectronics
3 * Shiraz Hashim <shiraz.hashim@st.com>
4 *
5 * This file is licensed under the terms of the GNU General Public
6 * License version 2. This program is licensed "as is" without any
7 * warranty of any kind, whether express or implied.
8 */
9
10#ifndef __MTD_SPEAR_SMI_H
11#define __MTD_SPEAR_SMI_H
12
13#include <linux/types.h>
14#include <linux/mtd/mtd.h>
15#include <linux/mtd/partitions.h>
16#include <linux/platform_device.h>
17#include <linux/of.h>
18
19/* max possible slots for serial-nor flash chip in the SMI controller */
20#define MAX_NUM_FLASH_CHIP 4
21
22/* macro to define partitions for flash devices */
23#define DEFINE_PARTS(n, of, s) \
24{ \
25 .name = n, \
26 .offset = of, \
27 .size = s, \
28}
29
30/**
31 * struct spear_smi_flash_info - platform structure for passing flash
32 * information
33 *
34 * name: name of the serial nor flash for identification
35 * mem_base: the memory base on which the flash is mapped
36 * size: size of the flash in bytes
37 * partitions: parition details
38 * nr_partitions: number of partitions
39 * fast_mode: whether flash supports fast mode
40 */
41
42struct spear_smi_flash_info {
43 char *name;
44 unsigned long mem_base;
45 unsigned long size;
46 struct mtd_partition *partitions;
47 int nr_partitions;
48 u8 fast_mode;
49};
50
51/**
52 * struct spear_smi_plat_data - platform structure for configuring smi
53 *
54 * clk_rate: clk rate at which SMI must operate
55 * num_flashes: number of flashes present on board
56 * board_flash_info: specific details of each flash present on board
57 */
58struct spear_smi_plat_data {
59 unsigned long clk_rate;
60 int num_flashes;
61 struct spear_smi_flash_info *board_flash_info;
62 struct device_node *np[MAX_NUM_FLASH_CHIP];
63};
64
65#endif /* __MTD_SPEAR_SMI_H */
diff --git a/include/linux/mtd/ubi.h b/include/linux/mtd/ubi.h
index c3918a0684f..db4836bed51 100644
--- a/include/linux/mtd/ubi.h
+++ b/include/linux/mtd/ubi.h
@@ -25,9 +25,6 @@
25#include <linux/types.h> 25#include <linux/types.h>
26#include <mtd/ubi-user.h> 26#include <mtd/ubi-user.h>
27 27
28/* All voumes/LEBs */
29#define UBI_ALL -1
30
31/* 28/*
32 * enum ubi_open_mode - UBI volume open mode constants. 29 * enum ubi_open_mode - UBI volume open mode constants.
33 * 30 *
@@ -211,15 +208,14 @@ void ubi_close_volume(struct ubi_volume_desc *desc);
211int ubi_leb_read(struct ubi_volume_desc *desc, int lnum, char *buf, int offset, 208int ubi_leb_read(struct ubi_volume_desc *desc, int lnum, char *buf, int offset,
212 int len, int check); 209 int len, int check);
213int ubi_leb_write(struct ubi_volume_desc *desc, int lnum, const void *buf, 210int ubi_leb_write(struct ubi_volume_desc *desc, int lnum, const void *buf,
214 int offset, int len); 211 int offset, int len, int dtype);
215int ubi_leb_change(struct ubi_volume_desc *desc, int lnum, const void *buf, 212int ubi_leb_change(struct ubi_volume_desc *desc, int lnum, const void *buf,
216 int len); 213 int len, int dtype);
217int ubi_leb_erase(struct ubi_volume_desc *desc, int lnum); 214int ubi_leb_erase(struct ubi_volume_desc *desc, int lnum);
218int ubi_leb_unmap(struct ubi_volume_desc *desc, int lnum); 215int ubi_leb_unmap(struct ubi_volume_desc *desc, int lnum);
219int ubi_leb_map(struct ubi_volume_desc *desc, int lnum); 216int ubi_leb_map(struct ubi_volume_desc *desc, int lnum, int dtype);
220int ubi_is_mapped(struct ubi_volume_desc *desc, int lnum); 217int ubi_is_mapped(struct ubi_volume_desc *desc, int lnum);
221int ubi_sync(int ubi_num); 218int ubi_sync(int ubi_num);
222int ubi_flush(int ubi_num, int vol_id, int lnum);
223 219
224/* 220/*
225 * This function is the same as the 'ubi_leb_read()' function, but it does not 221 * This function is the same as the 'ubi_leb_read()' function, but it does not
@@ -230,4 +226,25 @@ static inline int ubi_read(struct ubi_volume_desc *desc, int lnum, char *buf,
230{ 226{
231 return ubi_leb_read(desc, lnum, buf, offset, len, 0); 227 return ubi_leb_read(desc, lnum, buf, offset, len, 0);
232} 228}
229
230/*
231 * This function is the same as the 'ubi_leb_write()' functions, but it does
232 * not have the data type argument.
233 */
234static inline int ubi_write(struct ubi_volume_desc *desc, int lnum,
235 const void *buf, int offset, int len)
236{
237 return ubi_leb_write(desc, lnum, buf, offset, len, UBI_UNKNOWN);
238}
239
240/*
241 * This function is the same as the 'ubi_leb_change()' functions, but it does
242 * not have the data type argument.
243 */
244static inline int ubi_change(struct ubi_volume_desc *desc, int lnum,
245 const void *buf, int len)
246{
247 return ubi_leb_change(desc, lnum, buf, len, UBI_UNKNOWN);
248}
249
233#endif /* !__LINUX_UBI_H__ */ 250#endif /* !__LINUX_UBI_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2026-02-19 22:00:17 -0500