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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
commit8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch)
treea8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /include/linux/mmc
parent406089d01562f1e2bf9f089fd7637009ebaad589 (diff)
Patched in Tegra support.
Diffstat (limited to 'include/linux/mmc')
-rw-r--r--include/linux/mmc/card.h116
-rw-r--r--include/linux/mmc/core.h21
-rw-r--r--include/linux/mmc/dw_mmc.h38
-rw-r--r--include/linux/mmc/host.h211
-rw-r--r--include/linux/mmc/mmc.h70
-rw-r--r--include/linux/mmc/pm.h1
-rw-r--r--include/linux/mmc/sdhci-pci-data.h18
-rw-r--r--include/linux/mmc/sdhci-spear.h2
-rw-r--r--include/linux/mmc/sdhci.h92
-rw-r--r--include/linux/mmc/sdio.h24
-rw-r--r--include/linux/mmc/sdio_func.h10
-rw-r--r--include/linux/mmc/sh_mmcif.h31
-rw-r--r--include/linux/mmc/sh_mobile_sdhi.h19
-rw-r--r--include/linux/mmc/slot-gpio.h24
14 files changed, 210 insertions, 467 deletions
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index 5c69315d60c..9178aa48209 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -10,7 +10,6 @@
10#ifndef LINUX_MMC_CARD_H 10#ifndef LINUX_MMC_CARD_H
11#define LINUX_MMC_CARD_H 11#define LINUX_MMC_CARD_H
12 12
13#include <linux/device.h>
14#include <linux/mmc/core.h> 13#include <linux/mmc/core.h>
15#include <linux/mod_devicetable.h> 14#include <linux/mod_devicetable.h>
16 15
@@ -51,18 +50,9 @@ struct mmc_ext_csd {
51 u8 rel_sectors; 50 u8 rel_sectors;
52 u8 rel_param; 51 u8 rel_param;
53 u8 part_config; 52 u8 part_config;
54 u8 cache_ctrl;
55 u8 rst_n_function;
56 unsigned int part_time; /* Units: ms */ 53 unsigned int part_time; /* Units: ms */
57 unsigned int sa_timeout; /* Units: 100ns */ 54 unsigned int sa_timeout; /* Units: 100ns */
58 unsigned int generic_cmd6_time; /* Units: 10ms */
59 unsigned int power_off_longtime; /* Units: ms */
60 u8 power_off_notification; /* state */
61 unsigned int hs_max_dtr; 55 unsigned int hs_max_dtr;
62#define MMC_HIGH_26_MAX_DTR 26000000
63#define MMC_HIGH_52_MAX_DTR 52000000
64#define MMC_HIGH_DDR_MAX_DTR 52000000
65#define MMC_HS200_MAX_DTR 200000000
66 unsigned int sectors; 56 unsigned int sectors;
67 unsigned int card_type; 57 unsigned int card_type;
68 unsigned int hc_erase_size; /* In sectors */ 58 unsigned int hc_erase_size; /* In sectors */
@@ -73,23 +63,11 @@ struct mmc_ext_csd {
73 bool enhanced_area_en; /* enable bit */ 63 bool enhanced_area_en; /* enable bit */
74 unsigned long long enhanced_area_offset; /* Units: Byte */ 64 unsigned long long enhanced_area_offset; /* Units: Byte */
75 unsigned int enhanced_area_size; /* Units: KB */ 65 unsigned int enhanced_area_size; /* Units: KB */
76 unsigned int cache_size; /* Units: KB */ 66 unsigned int boot_size; /* in bytes */
77 bool hpi_en; /* HPI enablebit */
78 bool hpi; /* HPI support bit */
79 unsigned int hpi_cmd; /* cmd used as HPI */
80 bool bkops; /* background support bit */
81 bool bkops_en; /* background enable bit */
82 unsigned int data_sector_size; /* 512 bytes or 4KB */
83 unsigned int data_tag_unit_size; /* DATA TAG UNIT size */
84 unsigned int boot_ro_lock; /* ro lock support */
85 bool boot_ro_lockable;
86 u8 raw_exception_status; /* 53 */
87 u8 raw_partition_support; /* 160 */ 67 u8 raw_partition_support; /* 160 */
88 u8 raw_rpmb_size_mult; /* 168 */
89 u8 raw_erased_mem_count; /* 181 */ 68 u8 raw_erased_mem_count; /* 181 */
90 u8 raw_ext_csd_structure; /* 194 */ 69 u8 raw_ext_csd_structure; /* 194 */
91 u8 raw_card_type; /* 196 */ 70 u8 raw_card_type; /* 196 */
92 u8 out_of_int_time; /* 198 */
93 u8 raw_s_a_timeout; /* 217 */ 71 u8 raw_s_a_timeout; /* 217 */
94 u8 raw_hc_erase_gap_size; /* 221 */ 72 u8 raw_hc_erase_gap_size; /* 221 */
95 u8 raw_erase_timeout_mult; /* 223 */ 73 u8 raw_erase_timeout_mult; /* 223 */
@@ -98,11 +76,13 @@ struct mmc_ext_csd {
98 u8 raw_sec_erase_mult; /* 230 */ 76 u8 raw_sec_erase_mult; /* 230 */
99 u8 raw_sec_feature_support;/* 231 */ 77 u8 raw_sec_feature_support;/* 231 */
100 u8 raw_trim_mult; /* 232 */ 78 u8 raw_trim_mult; /* 232 */
101 u8 raw_bkops_status; /* 246 */
102 u8 raw_sectors[4]; /* 212 - 4 bytes */ 79 u8 raw_sectors[4]; /* 212 - 4 bytes */
103 80 bool hpi_en; /* HPI enablebit */
104 unsigned int feature_support; 81 bool hpi; /* HPI support bit */
105#define MMC_DISCARD_FEATURE BIT(0) /* CMD38 feature */ 82 unsigned int hpi_cmd; /* cmd used as HPI */
83 u8 out_of_int_time; /* out of int time */
84 bool bk_ops; /* BK ops support bit */
85 bool bk_ops_en; /* BK ops enable bit */
106}; 86};
107 87
108struct sd_scr { 88struct sd_scr {
@@ -125,7 +105,6 @@ struct sd_ssr {
125struct sd_switch_caps { 105struct sd_switch_caps {
126 unsigned int hs_max_dtr; 106 unsigned int hs_max_dtr;
127 unsigned int uhs_max_dtr; 107 unsigned int uhs_max_dtr;
128#define HIGH_SPEED_MAX_DTR 50000000
129#define UHS_SDR104_MAX_DTR 208000000 108#define UHS_SDR104_MAX_DTR 208000000
130#define UHS_SDR50_MAX_DTR 100000000 109#define UHS_SDR50_MAX_DTR 100000000
131#define UHS_DDR50_MAX_DTR 50000000 110#define UHS_DDR50_MAX_DTR 50000000
@@ -133,13 +112,11 @@ struct sd_switch_caps {
133#define UHS_SDR12_MAX_DTR 25000000 112#define UHS_SDR12_MAX_DTR 25000000
134 unsigned int sd3_bus_mode; 113 unsigned int sd3_bus_mode;
135#define UHS_SDR12_BUS_SPEED 0 114#define UHS_SDR12_BUS_SPEED 0
136#define HIGH_SPEED_BUS_SPEED 1
137#define UHS_SDR25_BUS_SPEED 1 115#define UHS_SDR25_BUS_SPEED 1
138#define UHS_SDR50_BUS_SPEED 2 116#define UHS_SDR50_BUS_SPEED 2
139#define UHS_SDR104_BUS_SPEED 3 117#define UHS_SDR104_BUS_SPEED 3
140#define UHS_DDR50_BUS_SPEED 4 118#define UHS_DDR50_BUS_SPEED 4
141 119
142#define SD_MODE_HIGH_SPEED (1 << HIGH_SPEED_BUS_SPEED)
143#define SD_MODE_UHS_SDR12 (1 << UHS_SDR12_BUS_SPEED) 120#define SD_MODE_UHS_SDR12 (1 << UHS_SDR12_BUS_SPEED)
144#define SD_MODE_UHS_SDR25 (1 << UHS_SDR25_BUS_SPEED) 121#define SD_MODE_UHS_SDR25 (1 << UHS_SDR25_BUS_SPEED)
145#define SD_MODE_UHS_SDR50 (1 << UHS_SDR50_BUS_SPEED) 122#define SD_MODE_UHS_SDR50 (1 << UHS_SDR50_BUS_SPEED)
@@ -155,7 +132,6 @@ struct sd_switch_caps {
155#define SD_SET_CURRENT_LIMIT_400 1 132#define SD_SET_CURRENT_LIMIT_400 1
156#define SD_SET_CURRENT_LIMIT_600 2 133#define SD_SET_CURRENT_LIMIT_600 2
157#define SD_SET_CURRENT_LIMIT_800 3 134#define SD_SET_CURRENT_LIMIT_800 3
158#define SD_SET_CURRENT_NO_CHANGE (-1)
159 135
160#define SD_MAX_CURRENT_200 (1 << SD_SET_CURRENT_LIMIT_200) 136#define SD_MAX_CURRENT_200 (1 << SD_SET_CURRENT_LIMIT_200)
161#define SD_MAX_CURRENT_400 (1 << SD_SET_CURRENT_LIMIT_400) 137#define SD_MAX_CURRENT_400 (1 << SD_SET_CURRENT_LIMIT_400)
@@ -187,29 +163,6 @@ struct sdio_func_tuple;
187 163
188#define SDIO_MAX_FUNCS 7 164#define SDIO_MAX_FUNCS 7
189 165
190/* The number of MMC physical partitions. These consist of:
191 * boot partitions (2), general purpose partitions (4) in MMC v4.4.
192 */
193#define MMC_NUM_BOOT_PARTITION 2
194#define MMC_NUM_GP_PARTITION 4
195#define MMC_NUM_PHY_PARTITION 6
196#define MAX_MMC_PART_NAME_LEN 20
197
198/*
199 * MMC Physical partitions
200 */
201struct mmc_part {
202 unsigned int size; /* partition size (in bytes) */
203 unsigned int part_cfg; /* partition type */
204 char name[MAX_MMC_PART_NAME_LEN];
205 bool force_ro; /* to make boot parts RO by default */
206 unsigned int area_type;
207#define MMC_BLK_DATA_AREA_MAIN (1<<0)
208#define MMC_BLK_DATA_AREA_BOOT (1<<1)
209#define MMC_BLK_DATA_AREA_GP (1<<2)
210#define MMC_BLK_DATA_AREA_RPMB (1<<3)
211};
212
213/* 166/*
214 * MMC device 167 * MMC device
215 */ 168 */
@@ -229,10 +182,9 @@ struct mmc_card {
229#define MMC_STATE_BLOCKADDR (1<<3) /* card uses block-addressing */ 182#define MMC_STATE_BLOCKADDR (1<<3) /* card uses block-addressing */
230#define MMC_STATE_HIGHSPEED_DDR (1<<4) /* card is in high speed mode */ 183#define MMC_STATE_HIGHSPEED_DDR (1<<4) /* card is in high speed mode */
231#define MMC_STATE_ULTRAHIGHSPEED (1<<5) /* card is in ultra high speed mode */ 184#define MMC_STATE_ULTRAHIGHSPEED (1<<5) /* card is in ultra high speed mode */
185#define MMC_STATE_DOING_BKOPS (1<<6) /* Card doing bkops */
186#define MMC_STATE_NEED_BKOPS (1<<7) /* Card needs to do bkops */
232#define MMC_CARD_SDXC (1<<6) /* card is SDXC */ 187#define MMC_CARD_SDXC (1<<6) /* card is SDXC */
233#define MMC_CARD_REMOVED (1<<7) /* card has been removed */
234#define MMC_STATE_HIGHSPEED_200 (1<<8) /* card is in HS200 mode */
235#define MMC_STATE_DOING_BKOPS (1<<10) /* card is doing BKOPS */
236 unsigned int quirks; /* card quirks */ 188 unsigned int quirks; /* card quirks */
237#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */ 189#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */
238#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */ 190#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */
@@ -244,10 +196,6 @@ struct mmc_card {
244#define MMC_QUIRK_DISABLE_CD (1<<5) /* disconnect CD/DAT[3] resistor */ 196#define MMC_QUIRK_DISABLE_CD (1<<5) /* disconnect CD/DAT[3] resistor */
245#define MMC_QUIRK_INAND_CMD38 (1<<6) /* iNAND devices have broken CMD38 */ 197#define MMC_QUIRK_INAND_CMD38 (1<<6) /* iNAND devices have broken CMD38 */
246#define MMC_QUIRK_BLK_NO_CMD23 (1<<7) /* Avoid CMD23 for regular multiblock */ 198#define MMC_QUIRK_BLK_NO_CMD23 (1<<7) /* Avoid CMD23 for regular multiblock */
247#define MMC_QUIRK_BROKEN_BYTE_MODE_512 (1<<8) /* Avoid sending 512 bytes in */
248#define MMC_QUIRK_LONG_READ_TIME (1<<9) /* Data read time > CSD says */
249#define MMC_QUIRK_SEC_ERASE_TRIM_BROKEN (1<<10) /* Skip secure for erase/trim */
250 /* byte mode */
251 199
252 unsigned int erase_size; /* erase size in sectors */ 200 unsigned int erase_size; /* erase size in sectors */
253 unsigned int erase_shift; /* if erase unit is power 2 */ 201 unsigned int erase_shift; /* if erase unit is power 2 */
@@ -276,26 +224,9 @@ struct mmc_card {
276 unsigned int sd_bus_speed; /* Bus Speed Mode set for the card */ 224 unsigned int sd_bus_speed; /* Bus Speed Mode set for the card */
277 225
278 struct dentry *debugfs_root; 226 struct dentry *debugfs_root;
279 struct mmc_part part[MMC_NUM_PHY_PARTITION]; /* physical partitions */
280 unsigned int nr_parts;
281}; 227};
282 228
283/* 229/*
284 * This function fill contents in mmc_part.
285 */
286static inline void mmc_part_add(struct mmc_card *card, unsigned int size,
287 unsigned int part_cfg, char *name, int idx, bool ro,
288 int area_type)
289{
290 card->part[card->nr_parts].size = size;
291 card->part[card->nr_parts].part_cfg = part_cfg;
292 sprintf(card->part[card->nr_parts].name, name, idx);
293 card->part[card->nr_parts].force_ro = ro;
294 card->part[card->nr_parts].area_type = area_type;
295 card->nr_parts++;
296}
297
298/*
299 * The world is not perfect and supplies us with broken mmc/sdio devices. 230 * The world is not perfect and supplies us with broken mmc/sdio devices.
300 * For at least some of these bugs we need a work-around. 231 * For at least some of these bugs we need a work-around.
301 */ 232 */
@@ -387,27 +318,19 @@ static inline void __maybe_unused remove_quirk(struct mmc_card *card, int data)
387#define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT) 318#define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT)
388#define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) 319#define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY)
389#define mmc_card_highspeed(c) ((c)->state & MMC_STATE_HIGHSPEED) 320#define mmc_card_highspeed(c) ((c)->state & MMC_STATE_HIGHSPEED)
390#define mmc_card_hs200(c) ((c)->state & MMC_STATE_HIGHSPEED_200)
391#define mmc_card_blockaddr(c) ((c)->state & MMC_STATE_BLOCKADDR) 321#define mmc_card_blockaddr(c) ((c)->state & MMC_STATE_BLOCKADDR)
392#define mmc_card_ddr_mode(c) ((c)->state & MMC_STATE_HIGHSPEED_DDR) 322#define mmc_card_ddr_mode(c) ((c)->state & MMC_STATE_HIGHSPEED_DDR)
393#define mmc_card_uhs(c) ((c)->state & MMC_STATE_ULTRAHIGHSPEED)
394#define mmc_sd_card_uhs(c) ((c)->state & MMC_STATE_ULTRAHIGHSPEED) 323#define mmc_sd_card_uhs(c) ((c)->state & MMC_STATE_ULTRAHIGHSPEED)
395#define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC) 324#define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC)
396#define mmc_card_removed(c) ((c) && ((c)->state & MMC_CARD_REMOVED)) 325#define mmc_card_doing_bkops(c) ((c)->state & MMC_STATE_DOING_BKOPS)
397#define mmc_card_doing_bkops(c) ((c)->state & MMC_STATE_DOING_BKOPS) 326#define mmc_card_need_bkops(c) ((c)->state & MMC_STATE_NEED_BKOPS)
398
399#define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT) 327#define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT)
400#define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) 328#define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY)
401#define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED) 329#define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED)
402#define mmc_card_set_hs200(c) ((c)->state |= MMC_STATE_HIGHSPEED_200)
403#define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR) 330#define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR)
404#define mmc_card_set_ddr_mode(c) ((c)->state |= MMC_STATE_HIGHSPEED_DDR) 331#define mmc_card_set_ddr_mode(c) ((c)->state |= MMC_STATE_HIGHSPEED_DDR)
405#define mmc_card_set_uhs(c) ((c)->state |= MMC_STATE_ULTRAHIGHSPEED)
406#define mmc_sd_card_set_uhs(c) ((c)->state |= MMC_STATE_ULTRAHIGHSPEED) 332#define mmc_sd_card_set_uhs(c) ((c)->state |= MMC_STATE_ULTRAHIGHSPEED)
407#define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC) 333#define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC)
408#define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED)
409#define mmc_card_set_doing_bkops(c) ((c)->state |= MMC_STATE_DOING_BKOPS)
410#define mmc_card_clr_doing_bkops(c) ((c)->state &= ~MMC_STATE_DOING_BKOPS)
411 334
412/* 335/*
413 * Quirk add/remove for MMC products. 336 * Quirk add/remove for MMC products.
@@ -442,6 +365,11 @@ static inline void __maybe_unused remove_quirk_sd(struct mmc_card *card,
442 if (mmc_card_sd(card)) 365 if (mmc_card_sd(card))
443 card->quirks &= ~data; 366 card->quirks &= ~data;
444} 367}
368#define mmc_card_set_doing_bkops(c) ((c)->state |= MMC_STATE_DOING_BKOPS)
369#define mmc_card_set_need_bkops(c) ((c)->state |= MMC_STATE_NEED_BKOPS)
370
371#define mmc_card_clr_doing_bkops(c) ((c)->state &= ~MMC_STATE_DOING_BKOPS)
372#define mmc_card_clr_need_bkops(c) ((c)->state &= ~MMC_STATE_NEED_BKOPS)
445 373
446static inline int mmc_card_lenient_fn0(const struct mmc_card *c) 374static inline int mmc_card_lenient_fn0(const struct mmc_card *c)
447{ 375{
@@ -463,16 +391,6 @@ static inline int mmc_card_nonstd_func_interface(const struct mmc_card *c)
463 return c->quirks & MMC_QUIRK_NONSTD_FUNC_IF; 391 return c->quirks & MMC_QUIRK_NONSTD_FUNC_IF;
464} 392}
465 393
466static inline int mmc_card_broken_byte_mode_512(const struct mmc_card *c)
467{
468 return c->quirks & MMC_QUIRK_BROKEN_BYTE_MODE_512;
469}
470
471static inline int mmc_card_long_read_time(const struct mmc_card *c)
472{
473 return c->quirks & MMC_QUIRK_LONG_READ_TIME;
474}
475
476#define mmc_card_name(c) ((c)->cid.prod_name) 394#define mmc_card_name(c) ((c)->cid.prod_name)
477#define mmc_card_id(c) (dev_name(&(c)->dev)) 395#define mmc_card_id(c) (dev_name(&(c)->dev))
478 396
@@ -489,7 +407,7 @@ struct mmc_driver {
489 struct device_driver drv; 407 struct device_driver drv;
490 int (*probe)(struct mmc_card *); 408 int (*probe)(struct mmc_card *);
491 void (*remove)(struct mmc_card *); 409 void (*remove)(struct mmc_card *);
492 int (*suspend)(struct mmc_card *); 410 int (*suspend)(struct mmc_card *, pm_message_t);
493 int (*resume)(struct mmc_card *); 411 int (*resume)(struct mmc_card *);
494}; 412};
495 413
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index 5bf7c2274fc..c3e55fa63fb 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -9,7 +9,7 @@
9#define LINUX_MMC_CORE_H 9#define LINUX_MMC_CORE_H
10 10
11#include <linux/interrupt.h> 11#include <linux/interrupt.h>
12#include <linux/completion.h> 12#include <linux/device.h>
13 13
14struct request; 14struct request;
15struct mmc_data; 15struct mmc_data;
@@ -134,24 +134,21 @@ struct mmc_host;
134struct mmc_card; 134struct mmc_card;
135struct mmc_async_req; 135struct mmc_async_req;
136 136
137extern int mmc_stop_bkops(struct mmc_card *);
138extern int mmc_read_bkops_status(struct mmc_card *);
139extern struct mmc_async_req *mmc_start_req(struct mmc_host *, 137extern struct mmc_async_req *mmc_start_req(struct mmc_host *,
140 struct mmc_async_req *, int *); 138 struct mmc_async_req *, int *);
141extern int mmc_interrupt_hpi(struct mmc_card *); 139extern int mmc_interrupt_hpi(struct mmc_card *);
140extern int mmc_bkops_start(struct mmc_card *card, bool is_synchronous);
141
142extern void mmc_wait_for_req(struct mmc_host *, struct mmc_request *); 142extern void mmc_wait_for_req(struct mmc_host *, struct mmc_request *);
143extern int mmc_wait_for_cmd(struct mmc_host *, struct mmc_command *, int); 143extern int mmc_wait_for_cmd(struct mmc_host *, struct mmc_command *, int);
144extern int mmc_app_cmd(struct mmc_host *, struct mmc_card *); 144extern int mmc_app_cmd(struct mmc_host *, struct mmc_card *);
145extern int mmc_wait_for_app_cmd(struct mmc_host *, struct mmc_card *, 145extern int mmc_wait_for_app_cmd(struct mmc_host *, struct mmc_card *,
146 struct mmc_command *, int); 146 struct mmc_command *, int);
147extern void mmc_start_bkops(struct mmc_card *card, bool from_exception);
148extern int __mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int, bool);
149extern int mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int); 147extern int mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int);
150 148
151#define MMC_ERASE_ARG 0x00000000 149#define MMC_ERASE_ARG 0x00000000
152#define MMC_SECURE_ERASE_ARG 0x80000000 150#define MMC_SECURE_ERASE_ARG 0x80000000
153#define MMC_TRIM_ARG 0x00000001 151#define MMC_TRIM_ARG 0x00000001
154#define MMC_DISCARD_ARG 0x00000003
155#define MMC_SECURE_TRIM1_ARG 0x80000001 152#define MMC_SECURE_TRIM1_ARG 0x80000001
156#define MMC_SECURE_TRIM2_ARG 0x80008000 153#define MMC_SECURE_TRIM2_ARG 0x80008000
157 154
@@ -162,31 +159,21 @@ extern int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr,
162 unsigned int arg); 159 unsigned int arg);
163extern int mmc_can_erase(struct mmc_card *card); 160extern int mmc_can_erase(struct mmc_card *card);
164extern int mmc_can_trim(struct mmc_card *card); 161extern int mmc_can_trim(struct mmc_card *card);
165extern int mmc_can_discard(struct mmc_card *card);
166extern int mmc_can_sanitize(struct mmc_card *card);
167extern int mmc_can_secure_erase_trim(struct mmc_card *card); 162extern int mmc_can_secure_erase_trim(struct mmc_card *card);
168extern int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, 163extern int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from,
169 unsigned int nr); 164 unsigned int nr);
170extern unsigned int mmc_calc_max_discard(struct mmc_card *card); 165extern unsigned int mmc_calc_max_discard(struct mmc_card *card);
171 166
172extern int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen); 167extern int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen);
173extern int mmc_set_blockcount(struct mmc_card *card, unsigned int blockcount,
174 bool is_rel_write);
175extern int mmc_hw_reset(struct mmc_host *host);
176extern int mmc_hw_reset_check(struct mmc_host *host);
177extern int mmc_can_reset(struct mmc_card *card);
178 168
179extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *); 169extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *);
180extern unsigned int mmc_align_data_size(struct mmc_card *, unsigned int); 170extern unsigned int mmc_align_data_size(struct mmc_card *, unsigned int);
181 171
182extern int __mmc_claim_host(struct mmc_host *host, atomic_t *abort); 172extern int __mmc_claim_host(struct mmc_host *host, atomic_t *abort);
183extern void mmc_release_host(struct mmc_host *host); 173extern void mmc_release_host(struct mmc_host *host);
174extern void mmc_do_release_host(struct mmc_host *host);
184extern int mmc_try_claim_host(struct mmc_host *host); 175extern int mmc_try_claim_host(struct mmc_host *host);
185 176
186extern int mmc_flush_cache(struct mmc_card *);
187
188extern int mmc_detect_card_removed(struct mmc_host *host);
189
190/** 177/**
191 * mmc_claim_host - exclusively claim a host 178 * mmc_claim_host - exclusively claim a host
192 * @host: mmc host to claim 179 * @host: mmc host to claim
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index 34be4f47293..6b46819705d 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -14,8 +14,6 @@
14#ifndef LINUX_MMC_DW_MMC_H 14#ifndef LINUX_MMC_DW_MMC_H
15#define LINUX_MMC_DW_MMC_H 15#define LINUX_MMC_DW_MMC_H
16 16
17#include <linux/scatterlist.h>
18
19#define MAX_MCI_SLOTS 2 17#define MAX_MCI_SLOTS 2
20 18
21enum dw_mci_state { 19enum dw_mci_state {
@@ -42,7 +40,7 @@ struct mmc_data;
42 * @lock: Spinlock protecting the queue and associated data. 40 * @lock: Spinlock protecting the queue and associated data.
43 * @regs: Pointer to MMIO registers. 41 * @regs: Pointer to MMIO registers.
44 * @sg: Scatterlist entry currently being processed by PIO code, if any. 42 * @sg: Scatterlist entry currently being processed by PIO code, if any.
45 * @sg_miter: PIO mapping scatterlist iterator. 43 * @pio_offset: Offset into the current scatterlist entry.
46 * @cur_slot: The slot which is currently using the controller. 44 * @cur_slot: The slot which is currently using the controller.
47 * @mrq: The request currently being processed on @cur_slot, 45 * @mrq: The request currently being processed on @cur_slot,
48 * or NULL if the controller is idle. 46 * or NULL if the controller is idle.
@@ -74,14 +72,8 @@ struct mmc_data;
74 * rate and timeout calculations. 72 * rate and timeout calculations.
75 * @current_speed: Configured rate of the controller. 73 * @current_speed: Configured rate of the controller.
76 * @num_slots: Number of slots available. 74 * @num_slots: Number of slots available.
77 * @verid: Denote Version ID. 75 * @pdev: Platform device associated with the MMC controller.
78 * @data_offset: Set the offset of DATA register according to VERID.
79 * @dev: Device associated with the MMC controller.
80 * @pdata: Platform data associated with the MMC controller. 76 * @pdata: Platform data associated with the MMC controller.
81 * @drv_data: Driver specific data for identified variant of the controller
82 * @priv: Implementation defined private data.
83 * @biu_clk: Pointer to bus interface unit clock instance.
84 * @ciu_clk: Pointer to card interface unit clock instance.
85 * @slot: Slots sharing this MMC controller. 77 * @slot: Slots sharing this MMC controller.
86 * @fifo_depth: depth of FIFO. 78 * @fifo_depth: depth of FIFO.
87 * @data_shift: log2 of FIFO item size. 79 * @data_shift: log2 of FIFO item size.
@@ -91,8 +83,6 @@ struct mmc_data;
91 * @push_data: Pointer to FIFO push function. 83 * @push_data: Pointer to FIFO push function.
92 * @pull_data: Pointer to FIFO pull function. 84 * @pull_data: Pointer to FIFO pull function.
93 * @quirks: Set of quirks that apply to specific versions of the IP. 85 * @quirks: Set of quirks that apply to specific versions of the IP.
94 * @irq_flags: The flags to be passed to request_irq.
95 * @irq: The irq value to be passed to request_irq.
96 * 86 *
97 * Locking 87 * Locking
98 * ======= 88 * =======
@@ -123,13 +113,12 @@ struct dw_mci {
123 void __iomem *regs; 113 void __iomem *regs;
124 114
125 struct scatterlist *sg; 115 struct scatterlist *sg;
126 struct sg_mapping_iter sg_miter; 116 unsigned int pio_offset;
127 117
128 struct dw_mci_slot *cur_slot; 118 struct dw_mci_slot *cur_slot;
129 struct mmc_request *mrq; 119 struct mmc_request *mrq;
130 struct mmc_command *cmd; 120 struct mmc_command *cmd;
131 struct mmc_data *data; 121 struct mmc_data *data;
132 struct workqueue_struct *card_workqueue;
133 122
134 /* DMA interface members*/ 123 /* DMA interface members*/
135 int use_dma; 124 int use_dma;
@@ -137,7 +126,7 @@ struct dw_mci {
137 126
138 dma_addr_t sg_dma; 127 dma_addr_t sg_dma;
139 void *sg_cpu; 128 void *sg_cpu;
140 const struct dw_mci_dma_ops *dma_ops; 129 struct dw_mci_dma_ops *dma_ops;
141#ifdef CONFIG_MMC_DW_IDMAC 130#ifdef CONFIG_MMC_DW_IDMAC
142 unsigned int ring_size; 131 unsigned int ring_size;
143#else 132#else
@@ -158,14 +147,8 @@ struct dw_mci {
158 u32 current_speed; 147 u32 current_speed;
159 u32 num_slots; 148 u32 num_slots;
160 u32 fifoth_val; 149 u32 fifoth_val;
161 u16 verid; 150 struct platform_device *pdev;
162 u16 data_offset;
163 struct device *dev;
164 struct dw_mci_board *pdata; 151 struct dw_mci_board *pdata;
165 const struct dw_mci_drv_data *drv_data;
166 void *priv;
167 struct clk *biu_clk;
168 struct clk *ciu_clk;
169 struct dw_mci_slot *slot[MAX_MCI_SLOTS]; 152 struct dw_mci_slot *slot[MAX_MCI_SLOTS];
170 153
171 /* FIFO push and pull */ 154 /* FIFO push and pull */
@@ -185,8 +168,6 @@ struct dw_mci {
185 u32 quirks; 168 u32 quirks;
186 169
187 struct regulator *vmmc; /* Power regulator */ 170 struct regulator *vmmc; /* Power regulator */
188 unsigned long irq_flags; /* IRQ flags */
189 int irq;
190}; 171};
191 172
192/* DMA ops for Internal/External DMAC interface */ 173/* DMA ops for Internal/External DMAC interface */
@@ -209,8 +190,7 @@ struct dw_mci_dma_ops {
209#define DW_MCI_QUIRK_HIGHSPEED BIT(2) 190#define DW_MCI_QUIRK_HIGHSPEED BIT(2)
210/* Unreliable card detection */ 191/* Unreliable card detection */
211#define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(3) 192#define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(3)
212/* Write Protect detection not available */ 193
213#define DW_MCI_QUIRK_NO_WRITE_PROTECT BIT(4)
214 194
215struct dma_pdata; 195struct dma_pdata;
216 196
@@ -227,11 +207,9 @@ struct dw_mci_board {
227 u32 num_slots; 207 u32 num_slots;
228 208
229 u32 quirks; /* Workaround / Quirk flags */ 209 u32 quirks; /* Workaround / Quirk flags */
230 unsigned int bus_hz; /* Clock speed at the cclk_in pad */ 210 unsigned int bus_hz; /* Bus speed */
231 211
232 u32 caps; /* Capabilities */ 212 unsigned int caps; /* Capabilities */
233 u32 caps2; /* More capabilities */
234 u32 pm_caps; /* PM capabilities */
235 /* 213 /*
236 * Override fifo depth. If 0, autodetect it from the FIFOTH register, 214 * Override fifo depth. If 0, autodetect it from the FIFOTH register,
237 * but note that this may not be reliable after a bootloader has used 215 * but note that this may not be reliable after a bootloader has used
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 61a10c17aab..8c0bf3f2a36 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -11,10 +11,8 @@
11#define LINUX_MMC_HOST_H 11#define LINUX_MMC_HOST_H
12 12
13#include <linux/leds.h> 13#include <linux/leds.h>
14#include <linux/mutex.h>
15#include <linux/sched.h> 14#include <linux/sched.h>
16#include <linux/device.h> 15#include <linux/wakelock.h>
17#include <linux/fault-inject.h>
18 16
19#include <linux/mmc/core.h> 17#include <linux/mmc/core.h>
20#include <linux/mmc/pm.h> 18#include <linux/mmc/pm.h>
@@ -53,18 +51,15 @@ struct mmc_ios {
53#define MMC_TIMING_LEGACY 0 51#define MMC_TIMING_LEGACY 0
54#define MMC_TIMING_MMC_HS 1 52#define MMC_TIMING_MMC_HS 1
55#define MMC_TIMING_SD_HS 2 53#define MMC_TIMING_SD_HS 2
56#define MMC_TIMING_UHS_SDR12 3 54#define MMC_TIMING_UHS_SDR12 MMC_TIMING_LEGACY
57#define MMC_TIMING_UHS_SDR25 4 55#define MMC_TIMING_UHS_SDR25 MMC_TIMING_SD_HS
58#define MMC_TIMING_UHS_SDR50 5 56#define MMC_TIMING_UHS_SDR50 3
59#define MMC_TIMING_UHS_SDR104 6 57#define MMC_TIMING_UHS_SDR104 4
60#define MMC_TIMING_UHS_DDR50 7 58#define MMC_TIMING_UHS_DDR50 5
61#define MMC_TIMING_MMC_HS200 8
62 59
63#define MMC_SDR_MODE 0 60#define MMC_SDR_MODE 0
64#define MMC_1_2V_DDR_MODE 1 61#define MMC_1_2V_DDR_MODE 1
65#define MMC_1_8V_DDR_MODE 2 62#define MMC_1_8V_DDR_MODE 2
66#define MMC_1_2V_SDR_MODE 3
67#define MMC_1_8V_SDR_MODE 4
68 63
69 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */ 64 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
70 65
@@ -82,18 +77,38 @@ struct mmc_ios {
82 77
83struct mmc_host_ops { 78struct mmc_host_ops {
84 /* 79 /*
85 * 'enable' is called when the host is claimed and 'disable' is called 80 * Hosts that support power saving can use the 'enable' and 'disable'
86 * when the host is released. 'enable' and 'disable' are deprecated. 81 * methods to exit and enter power saving states. 'enable' is called
82 * when the host is claimed and 'disable' is called (or scheduled with
83 * a delay) when the host is released. The 'disable' is scheduled if
84 * the disable delay set by 'mmc_set_disable_delay()' is non-zero,
85 * otherwise 'disable' is called immediately. 'disable' may be
86 * scheduled repeatedly, to permit ever greater power saving at the
87 * expense of ever greater latency to re-enable. Rescheduling is
88 * determined by the return value of the 'disable' method. A positive
89 * value gives the delay in milliseconds.
90 *
91 * In the case where a host function (like set_ios) may be called
92 * with or without the host claimed, enabling and disabling can be
93 * done directly and will nest correctly. Call 'mmc_host_enable()' and
94 * 'mmc_host_lazy_disable()' for this purpose, but note that these
95 * functions must be paired.
96 *
97 * Alternatively, 'mmc_host_enable()' may be paired with
98 * 'mmc_host_disable()' which calls 'disable' immediately. In this
99 * case the 'disable' method will be called with 'lazy' set to 0.
100 * This is mainly useful for error paths.
101 *
102 * Because lazy disable may be called from a work queue, the 'disable'
103 * method must claim the host when 'lazy' != 0, which will work
104 * correctly because recursion is detected and handled.
87 */ 105 */
88 int (*enable)(struct mmc_host *host); 106 int (*enable)(struct mmc_host *host);
89 int (*disable)(struct mmc_host *host); 107 int (*disable)(struct mmc_host *host, int lazy);
90 /* 108 /*
91 * It is optional for the host to implement pre_req and post_req in 109 * It is optional for the host to implement pre_req and post_req in
92 * order to support double buffering of requests (prepare one 110 * order to support double buffering of requests (prepare one
93 * request while another request is active). 111 * request while another request is active).
94 * pre_req() must always be followed by a post_req().
95 * To undo a call made to pre_req(), call post_req() with
96 * a nonzero err condition.
97 */ 112 */
98 void (*post_req)(struct mmc_host *host, struct mmc_request *req, 113 void (*post_req)(struct mmc_host *host, struct mmc_request *req,
99 int err); 114 int err);
@@ -130,13 +145,9 @@ struct mmc_host_ops {
130 void (*init_card)(struct mmc_host *host, struct mmc_card *card); 145 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
131 146
132 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios); 147 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
133 148 int (*execute_tuning)(struct mmc_host *host);
134 /* The tuning command opcode value is different for SD and eMMC cards */
135 int (*execute_tuning)(struct mmc_host *host, u32 opcode);
136 void (*enable_preset_value)(struct mmc_host *host, bool enable); 149 void (*enable_preset_value)(struct mmc_host *host, bool enable);
137 int (*select_drive_strength)(unsigned int max_dtr, int host_drv, int card_drv); 150 int (*select_drive_strength)(unsigned int max_dtr, int host_drv, int card_drv);
138 void (*hw_reset)(struct mmc_host *host);
139 void (*card_event)(struct mmc_host *host);
140}; 151};
141 152
142struct mmc_card; 153struct mmc_card;
@@ -152,31 +163,6 @@ struct mmc_async_req {
152 int (*err_check) (struct mmc_card *, struct mmc_async_req *); 163 int (*err_check) (struct mmc_card *, struct mmc_async_req *);
153}; 164};
154 165
155/**
156 * struct mmc_slot - MMC slot functions
157 *
158 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL
159 * @lock: protect the @handler_priv pointer
160 * @handler_priv: MMC/SD-card slot context
161 *
162 * Some MMC/SD host controllers implement slot-functions like card and
163 * write-protect detection natively. However, a large number of controllers
164 * leave these functions to the CPU. This struct provides a hook to attach
165 * such slot-function drivers.
166 */
167struct mmc_slot {
168 int cd_irq;
169 struct mutex lock;
170 void *handler_priv;
171};
172
173struct regulator;
174
175struct mmc_supply {
176 struct regulator *vmmc; /* Card power supply */
177 struct regulator *vqmmc; /* Optional Vccq supply */
178};
179
180struct mmc_host { 166struct mmc_host {
181 struct device *parent; 167 struct device *parent;
182 struct device class_dev; 168 struct device class_dev;
@@ -190,9 +176,6 @@ struct mmc_host {
190 u32 ocr_avail_sd; /* SD-specific OCR */ 176 u32 ocr_avail_sd; /* SD-specific OCR */
191 u32 ocr_avail_mmc; /* MMC-specific OCR */ 177 u32 ocr_avail_mmc; /* MMC-specific OCR */
192 struct notifier_block pm_notify; 178 struct notifier_block pm_notify;
193 u32 max_current_330;
194 u32 max_current_300;
195 u32 max_current_180;
196 179
197#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ 180#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
198#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ 181#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
@@ -212,7 +195,7 @@ struct mmc_host {
212#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ 195#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
213#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ 196#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
214 197
215 u32 caps; /* Host capabilities */ 198 unsigned long caps; /* Host capabilities */
216 199
217#define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */ 200#define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
218#define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */ 201#define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */
@@ -221,7 +204,7 @@ struct mmc_host {
221#define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */ 204#define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
222#define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */ 205#define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
223#define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */ 206#define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
224 207#define MMC_CAP_DISABLE (1 << 7) /* Can the host be disabled */
225#define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */ 208#define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
226#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */ 209#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
227#define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */ 210#define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */
@@ -236,28 +219,18 @@ struct mmc_host {
236#define MMC_CAP_UHS_SDR50 (1 << 17) /* Host supports UHS SDR50 mode */ 219#define MMC_CAP_UHS_SDR50 (1 << 17) /* Host supports UHS SDR50 mode */
237#define MMC_CAP_UHS_SDR104 (1 << 18) /* Host supports UHS SDR104 mode */ 220#define MMC_CAP_UHS_SDR104 (1 << 18) /* Host supports UHS SDR104 mode */
238#define MMC_CAP_UHS_DDR50 (1 << 19) /* Host supports UHS DDR50 mode */ 221#define MMC_CAP_UHS_DDR50 (1 << 19) /* Host supports UHS DDR50 mode */
222#define MMC_CAP_SET_XPC_330 (1 << 20) /* Host supports >150mA current at 3.3V */
223#define MMC_CAP_SET_XPC_300 (1 << 21) /* Host supports >150mA current at 3.0V */
224#define MMC_CAP_SET_XPC_180 (1 << 22) /* Host supports >150mA current at 1.8V */
239#define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */ 225#define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
240#define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */ 226#define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
241#define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */ 227#define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
228#define MMC_CAP_MAX_CURRENT_200 (1 << 26) /* Host max current limit is 200mA */
229#define MMC_CAP_MAX_CURRENT_400 (1 << 27) /* Host max current limit is 400mA */
230#define MMC_CAP_MAX_CURRENT_600 (1 << 28) /* Host max current limit is 600mA */
231#define MMC_CAP_MAX_CURRENT_800 (1 << 29) /* Host max current limit is 800mA */
242#define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */ 232#define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
243#define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */ 233#define MMC_CAP_BKOPS (1 << 31) /* Host supports BKOPS */
244
245 u32 caps2; /* More host capabilities */
246
247#define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */
248#define MMC_CAP2_CACHE_CTRL (1 << 1) /* Allow cache control */
249#define MMC_CAP2_POWEROFF_NOTIFY (1 << 2) /* Notify poweroff supported */
250#define MMC_CAP2_NO_MULTI_READ (1 << 3) /* Multiblock reads don't work */
251#define MMC_CAP2_NO_SLEEP_CMD (1 << 4) /* Don't allow sleep command */
252#define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
253#define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
254#define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
255 MMC_CAP2_HS200_1_2V_SDR)
256#define MMC_CAP2_BROKEN_VOLTAGE (1 << 7) /* Use the broken voltage */
257#define MMC_CAP2_DETECT_ON_ERR (1 << 8) /* On I/O err check card removal */
258#define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */
259#define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */
260#define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */
261 234
262 mmc_pm_flag_t pm_caps; /* supported pm features */ 235 mmc_pm_flag_t pm_caps; /* supported pm features */
263 236
@@ -265,12 +238,10 @@ struct mmc_host {
265 int clk_requests; /* internal reference counter */ 238 int clk_requests; /* internal reference counter */
266 unsigned int clk_delay; /* number of MCI clk hold cycles */ 239 unsigned int clk_delay; /* number of MCI clk hold cycles */
267 bool clk_gated; /* clock gated */ 240 bool clk_gated; /* clock gated */
268 struct delayed_work clk_gate_work; /* delayed clock gate */ 241 struct work_struct clk_gate_work; /* delayed clock gate */
269 unsigned int clk_old; /* old clock value cache */ 242 unsigned int clk_old; /* old clock value cache */
270 spinlock_t clk_lock; /* lock for clk fields */ 243 spinlock_t clk_lock; /* lock for clk fields */
271 struct mutex clk_gate_mutex; /* mutex for clock gating */ 244 struct mutex clk_gate_mutex; /* mutex for clock gating */
272 struct device_attribute clkgate_delay_attr;
273 unsigned long clkgate_delay;
274#endif 245#endif
275 246
276 /* host specific block data */ 247 /* host specific block data */
@@ -296,8 +267,13 @@ struct mmc_host {
296 unsigned int removed:1; /* host is being removed */ 267 unsigned int removed:1; /* host is being removed */
297#endif 268#endif
298 269
270 /* Only used with MMC_CAP_DISABLE */
271 int enabled; /* host is enabled */
299 int rescan_disable; /* disable card detection */ 272 int rescan_disable; /* disable card detection */
300 int rescan_entered; /* used with nonremovable devices */ 273 int nesting_cnt; /* "enable" nesting count */
274 int en_dis_recurs; /* detect recursion */
275 unsigned int disable_delay; /* disable delay in msecs */
276 struct delayed_work disable; /* disabling work */
301 277
302 struct mmc_card *card; /* device attached to this host */ 278 struct mmc_card *card; /* device attached to this host */
303 279
@@ -306,15 +282,17 @@ struct mmc_host {
306 int claim_cnt; /* "claim" nesting count */ 282 int claim_cnt; /* "claim" nesting count */
307 283
308 struct delayed_work detect; 284 struct delayed_work detect;
309 int detect_change; /* card detect flag */ 285 struct wake_lock detect_wake_lock;
310 struct mmc_slot slot;
311 286
312 const struct mmc_bus_ops *bus_ops; /* current bus driver */ 287 const struct mmc_bus_ops *bus_ops; /* current bus driver */
313 unsigned int bus_refs; /* reference counter */ 288 unsigned int bus_refs; /* reference counter */
314 289
290 unsigned int bus_resume_flags;
291#define MMC_BUSRESUME_MANUAL_RESUME (1 << 0)
292#define MMC_BUSRESUME_NEEDS_RESUME (1 << 1)
293
315 unsigned int sdio_irqs; 294 unsigned int sdio_irqs;
316 struct task_struct *sdio_irq_thread; 295 struct task_struct *sdio_irq_thread;
317 bool sdio_irq_pending;
318 atomic_t sdio_irq_thread_abort; 296 atomic_t sdio_irq_thread_abort;
319 297
320 mmc_pm_flag_t pm_flags; /* requested pm features */ 298 mmc_pm_flag_t pm_flags; /* requested pm features */
@@ -326,18 +304,20 @@ struct mmc_host {
326#ifdef CONFIG_REGULATOR 304#ifdef CONFIG_REGULATOR
327 bool regulator_enabled; /* regulator state */ 305 bool regulator_enabled; /* regulator state */
328#endif 306#endif
329 struct mmc_supply supply;
330 307
331 struct dentry *debugfs_root; 308 struct dentry *debugfs_root;
332 309
333 struct mmc_async_req *areq; /* active async req */ 310 struct mmc_async_req *areq; /* active async req */
334 311
335#ifdef CONFIG_FAIL_MMC_REQUEST 312#ifdef CONFIG_MMC_EMBEDDED_SDIO
336 struct fault_attr fail_mmc_request; 313 struct {
314 struct sdio_cis *cis;
315 struct sdio_cccr *cccr;
316 struct sdio_embedded_func *funcs;
317 int num_funcs;
318 } embedded_sdio_data;
337#endif 319#endif
338 320
339 unsigned int actual_clock; /* Actual HC clock rate */
340
341 unsigned long private[0] ____cacheline_aligned; 321 unsigned long private[0] ____cacheline_aligned;
342}; 322};
343 323
@@ -346,6 +326,14 @@ extern int mmc_add_host(struct mmc_host *);
346extern void mmc_remove_host(struct mmc_host *); 326extern void mmc_remove_host(struct mmc_host *);
347extern void mmc_free_host(struct mmc_host *); 327extern void mmc_free_host(struct mmc_host *);
348 328
329#ifdef CONFIG_MMC_EMBEDDED_SDIO
330extern void mmc_set_embedded_sdio_data(struct mmc_host *host,
331 struct sdio_cis *cis,
332 struct sdio_cccr *cccr,
333 struct sdio_embedded_func *funcs,
334 int num_funcs);
335#endif
336
349static inline void *mmc_priv(struct mmc_host *host) 337static inline void *mmc_priv(struct mmc_host *host)
350{ 338{
351 return (void *)host->private; 339 return (void *)host->private;
@@ -356,6 +344,18 @@ static inline void *mmc_priv(struct mmc_host *host)
356#define mmc_dev(x) ((x)->parent) 344#define mmc_dev(x) ((x)->parent)
357#define mmc_classdev(x) (&(x)->class_dev) 345#define mmc_classdev(x) (&(x)->class_dev)
358#define mmc_hostname(x) (dev_name(&(x)->class_dev)) 346#define mmc_hostname(x) (dev_name(&(x)->class_dev))
347#define mmc_bus_needs_resume(host) ((host)->bus_resume_flags & MMC_BUSRESUME_NEEDS_RESUME)
348#define mmc_bus_manual_resume(host) ((host)->bus_resume_flags & MMC_BUSRESUME_MANUAL_RESUME)
349
350static inline void mmc_set_bus_resume_policy(struct mmc_host *host, int manual)
351{
352 if (manual)
353 host->bus_resume_flags |= MMC_BUSRESUME_MANUAL_RESUME;
354 else
355 host->bus_resume_flags &= ~MMC_BUSRESUME_MANUAL_RESUME;
356}
357
358extern int mmc_resume_bus(struct mmc_host *host);
359 359
360extern int mmc_suspend_host(struct mmc_host *); 360extern int mmc_suspend_host(struct mmc_host *);
361extern int mmc_resume_host(struct mmc_host *); 361extern int mmc_resume_host(struct mmc_host *);
@@ -366,21 +366,19 @@ extern int mmc_power_restore_host(struct mmc_host *host);
366extern void mmc_detect_change(struct mmc_host *, unsigned long delay); 366extern void mmc_detect_change(struct mmc_host *, unsigned long delay);
367extern void mmc_request_done(struct mmc_host *, struct mmc_request *); 367extern void mmc_request_done(struct mmc_host *, struct mmc_request *);
368 368
369extern int mmc_cache_ctrl(struct mmc_host *, u8);
370
371static inline void mmc_signal_sdio_irq(struct mmc_host *host) 369static inline void mmc_signal_sdio_irq(struct mmc_host *host)
372{ 370{
373 host->ops->enable_sdio_irq(host, 0); 371 host->ops->enable_sdio_irq(host, 0);
374 host->sdio_irq_pending = true;
375 wake_up_process(host->sdio_irq_thread); 372 wake_up_process(host->sdio_irq_thread);
376} 373}
377 374
375struct regulator;
376
378#ifdef CONFIG_REGULATOR 377#ifdef CONFIG_REGULATOR
379int mmc_regulator_get_ocrmask(struct regulator *supply); 378int mmc_regulator_get_ocrmask(struct regulator *supply);
380int mmc_regulator_set_ocr(struct mmc_host *mmc, 379int mmc_regulator_set_ocr(struct mmc_host *mmc,
381 struct regulator *supply, 380 struct regulator *supply,
382 unsigned short vdd_bit); 381 unsigned short vdd_bit);
383int mmc_regulator_get_supply(struct mmc_host *mmc);
384#else 382#else
385static inline int mmc_regulator_get_ocrmask(struct regulator *supply) 383static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
386{ 384{
@@ -393,21 +391,25 @@ static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
393{ 391{
394 return 0; 392 return 0;
395} 393}
396
397static inline int mmc_regulator_get_supply(struct mmc_host *mmc)
398{
399 return 0;
400}
401#endif 394#endif
402 395
403int mmc_card_awake(struct mmc_host *host); 396int mmc_card_awake(struct mmc_host *host);
404int mmc_card_sleep(struct mmc_host *host); 397int mmc_card_sleep(struct mmc_host *host);
405int mmc_card_can_sleep(struct mmc_host *host); 398int mmc_card_can_sleep(struct mmc_host *host);
406 399
400int mmc_host_enable(struct mmc_host *host);
401int mmc_host_disable(struct mmc_host *host);
402int mmc_host_lazy_disable(struct mmc_host *host);
407int mmc_pm_notify(struct notifier_block *notify_block, unsigned long, void *); 403int mmc_pm_notify(struct notifier_block *notify_block, unsigned long, void *);
408 404
405static inline void mmc_set_disable_delay(struct mmc_host *host,
406 unsigned int disable_delay)
407{
408 host->disable_delay = disable_delay;
409}
410
409/* Module parameter */ 411/* Module parameter */
410extern bool mmc_assume_removable; 412extern int mmc_assume_removable;
411 413
412static inline int mmc_card_is_removable(struct mmc_host *host) 414static inline int mmc_card_is_removable(struct mmc_host *host)
413{ 415{
@@ -428,29 +430,4 @@ static inline int mmc_host_cmd23(struct mmc_host *host)
428{ 430{
429 return host->caps & MMC_CAP_CMD23; 431 return host->caps & MMC_CAP_CMD23;
430} 432}
431
432static inline int mmc_boot_partition_access(struct mmc_host *host)
433{
434 return !(host->caps2 & MMC_CAP2_BOOTPART_NOACC);
435}
436
437#ifdef CONFIG_MMC_CLKGATE
438void mmc_host_clk_hold(struct mmc_host *host);
439void mmc_host_clk_release(struct mmc_host *host);
440unsigned int mmc_host_clk_rate(struct mmc_host *host);
441
442#else
443static inline void mmc_host_clk_hold(struct mmc_host *host)
444{
445}
446
447static inline void mmc_host_clk_release(struct mmc_host *host)
448{
449}
450
451static inline unsigned int mmc_host_clk_rate(struct mmc_host *host)
452{
453 return host->ios.clock;
454}
455#endif
456#endif /* LINUX_MMC_HOST_H */ 433#endif /* LINUX_MMC_HOST_H */
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index 94d532e41c6..2bb1dfd4cf1 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -51,7 +51,6 @@
51#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */ 51#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
52#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */ 52#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
53#define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */ 53#define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
54#define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
55 54
56 /* class 3 */ 55 /* class 3 */
57#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */ 56#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
@@ -139,7 +138,7 @@ static inline bool mmc_op_multi(u32 opcode)
139#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */ 138#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
140#define R1_READY_FOR_DATA (1 << 8) /* sx, a */ 139#define R1_READY_FOR_DATA (1 << 8) /* sx, a */
141#define R1_SWITCH_ERROR (1 << 7) /* sx, c */ 140#define R1_SWITCH_ERROR (1 << 7) /* sx, c */
142#define R1_EXCEPTION_EVENT (1 << 6) /* sx, a */ 141#define R1_URGENT_BKOPS (1 << 6) /* sr, a */
143#define R1_APP_CMD (1 << 5) /* sr, c */ 142#define R1_APP_CMD (1 << 5) /* sr, c */
144 143
145#define R1_STATE_IDLE 0 144#define R1_STATE_IDLE 0
@@ -272,37 +271,22 @@ struct _mmc_csd {
272 * EXT_CSD fields 271 * EXT_CSD fields
273 */ 272 */
274 273
275#define EXT_CSD_FLUSH_CACHE 32 /* W */
276#define EXT_CSD_CACHE_CTRL 33 /* R/W */
277#define EXT_CSD_POWER_OFF_NOTIFICATION 34 /* R/W */
278#define EXT_CSD_EXP_EVENTS_STATUS 54 /* RO */
279#define EXT_CSD_DATA_SECTOR_SIZE 61 /* R */
280#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
281#define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */ 274#define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */
282#define EXT_CSD_PARTITION_SUPPORT 160 /* RO */ 275#define EXT_CSD_PARTITION_SUPPORT 160 /* RO */
283#define EXT_CSD_HPI_MGMT 161 /* R/W */ 276#define EXT_CSD_HPI_MGMT 161 /* R/W */
284#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
285#define EXT_CSD_BKOPS_EN 163 /* R/W */ 277#define EXT_CSD_BKOPS_EN 163 /* R/W */
286#define EXT_CSD_BKOPS_START 164 /* W */ 278#define EXT_CSD_BKOPS_START 164 /* R/W */
287#define EXT_CSD_SANITIZE_START 165 /* W */
288#define EXT_CSD_WR_REL_PARAM 166 /* RO */ 279#define EXT_CSD_WR_REL_PARAM 166 /* RO */
289#define EXT_CSD_RPMB_MULT 168 /* RO */
290#define EXT_CSD_BOOT_WP 173 /* R/W */
291#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ 280#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
292#define EXT_CSD_PART_CONFIG 179 /* R/W */ 281#define EXT_CSD_PART_CONFIG 179 /* R/W */
293#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */ 282#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */
294#define EXT_CSD_BUS_WIDTH 183 /* R/W */ 283#define EXT_CSD_BUS_WIDTH 183 /* R/W */
295#define EXT_CSD_HS_TIMING 185 /* R/W */ 284#define EXT_CSD_HS_TIMING 185 /* R/W */
296#define EXT_CSD_POWER_CLASS 187 /* R/W */
297#define EXT_CSD_REV 192 /* RO */ 285#define EXT_CSD_REV 192 /* RO */
298#define EXT_CSD_STRUCTURE 194 /* RO */ 286#define EXT_CSD_STRUCTURE 194 /* RO */
299#define EXT_CSD_CARD_TYPE 196 /* RO */ 287#define EXT_CSD_CARD_TYPE 196 /* RO */
300#define EXT_CSD_OUT_OF_INTERRUPT_TIME 198 /* RO */ 288#define EXT_CSD_OUT_OF_INTERRUPT_TIME 198 /* RO */
301#define EXT_CSD_PART_SWITCH_TIME 199 /* RO */ 289#define EXT_CSD_PART_SWITCH_TIME 199 /* RO */
302#define EXT_CSD_PWR_CL_52_195 200 /* RO */
303#define EXT_CSD_PWR_CL_26_195 201 /* RO */
304#define EXT_CSD_PWR_CL_52_360 202 /* RO */
305#define EXT_CSD_PWR_CL_26_360 203 /* RO */
306#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ 290#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
307#define EXT_CSD_S_A_TIMEOUT 217 /* RO */ 291#define EXT_CSD_S_A_TIMEOUT 217 /* RO */
308#define EXT_CSD_REL_WR_SEC_C 222 /* RO */ 292#define EXT_CSD_REL_WR_SEC_C 222 /* RO */
@@ -314,16 +298,7 @@ struct _mmc_csd {
314#define EXT_CSD_SEC_ERASE_MULT 230 /* RO */ 298#define EXT_CSD_SEC_ERASE_MULT 230 /* RO */
315#define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */ 299#define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */
316#define EXT_CSD_TRIM_MULT 232 /* RO */ 300#define EXT_CSD_TRIM_MULT 232 /* RO */
317#define EXT_CSD_PWR_CL_200_195 236 /* RO */
318#define EXT_CSD_PWR_CL_200_360 237 /* RO */
319#define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */
320#define EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */
321#define EXT_CSD_BKOPS_STATUS 246 /* RO */ 301#define EXT_CSD_BKOPS_STATUS 246 /* RO */
322#define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */
323#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */
324#define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */
325#define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */
326#define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */
327#define EXT_CSD_BKOPS_SUPPORT 502 /* RO */ 302#define EXT_CSD_BKOPS_SUPPORT 502 /* RO */
328#define EXT_CSD_HPI_FEATURES 503 /* RO */ 303#define EXT_CSD_HPI_FEATURES 503 /* RO */
329 304
@@ -333,17 +308,9 @@ struct _mmc_csd {
333 308
334#define EXT_CSD_WR_REL_PARAM_EN (1<<2) 309#define EXT_CSD_WR_REL_PARAM_EN (1<<2)
335 310
336#define EXT_CSD_BOOT_WP_B_PWR_WP_DIS (0x40)
337#define EXT_CSD_BOOT_WP_B_PERM_WP_DIS (0x10)
338#define EXT_CSD_BOOT_WP_B_PERM_WP_EN (0x04)
339#define EXT_CSD_BOOT_WP_B_PWR_WP_EN (0x01)
340
341#define EXT_CSD_PART_CONFIG_ACC_MASK (0x7) 311#define EXT_CSD_PART_CONFIG_ACC_MASK (0x7)
342#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1) 312#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1)
343#define EXT_CSD_PART_CONFIG_ACC_RPMB (0x3) 313#define EXT_CSD_PART_CONFIG_ACC_BOOT1 (0x2)
344#define EXT_CSD_PART_CONFIG_ACC_GP0 (0x4)
345
346#define EXT_CSD_PART_SUPPORT_PART_EN (0x1)
347 314
348#define EXT_CSD_CMD_SET_NORMAL (1<<0) 315#define EXT_CSD_CMD_SET_NORMAL (1<<0)
349#define EXT_CSD_CMD_SET_SECURE (1<<1) 316#define EXT_CSD_CMD_SET_SECURE (1<<1)
@@ -351,16 +318,13 @@ struct _mmc_csd {
351 318
352#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ 319#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
353#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ 320#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
354#define EXT_CSD_CARD_TYPE_MASK 0x3F /* Mask out reserved bits */ 321#define EXT_CSD_CARD_TYPE_MASK 0xF /* Mask out reserved bits */
355#define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */ 322#define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */
356 /* DDR mode @1.8V or 3V I/O */ 323 /* DDR mode @1.8V or 3V I/O */
357#define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */ 324#define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */
358 /* DDR mode @1.2V I/O */ 325 /* DDR mode @1.2V I/O */
359#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ 326#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
360 | EXT_CSD_CARD_TYPE_DDR_1_2V) 327 | EXT_CSD_CARD_TYPE_DDR_1_2V)
361#define EXT_CSD_CARD_TYPE_SDR_1_8V (1<<4) /* Card can run at 200MHz */
362#define EXT_CSD_CARD_TYPE_SDR_1_2V (1<<5) /* Card can run at 200MHz */
363 /* SDR mode @1.2V I/O */
364 328
365#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ 329#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
366#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ 330#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
@@ -371,32 +335,6 @@ struct _mmc_csd {
371#define EXT_CSD_SEC_ER_EN BIT(0) 335#define EXT_CSD_SEC_ER_EN BIT(0)
372#define EXT_CSD_SEC_BD_BLK_EN BIT(2) 336#define EXT_CSD_SEC_BD_BLK_EN BIT(2)
373#define EXT_CSD_SEC_GB_CL_EN BIT(4) 337#define EXT_CSD_SEC_GB_CL_EN BIT(4)
374#define EXT_CSD_SEC_SANITIZE BIT(6) /* v4.5 only */
375
376#define EXT_CSD_RST_N_EN_MASK 0x3
377#define EXT_CSD_RST_N_ENABLED 1 /* RST_n is enabled on card */
378
379#define EXT_CSD_NO_POWER_NOTIFICATION 0
380#define EXT_CSD_POWER_ON 1
381#define EXT_CSD_POWER_OFF_SHORT 2
382#define EXT_CSD_POWER_OFF_LONG 3
383
384#define EXT_CSD_PWR_CL_8BIT_MASK 0xF0 /* 8 bit PWR CLS */
385#define EXT_CSD_PWR_CL_4BIT_MASK 0x0F /* 8 bit PWR CLS */
386#define EXT_CSD_PWR_CL_8BIT_SHIFT 4
387#define EXT_CSD_PWR_CL_4BIT_SHIFT 0
388/*
389 * EXCEPTION_EVENT_STATUS field
390 */
391#define EXT_CSD_URGENT_BKOPS BIT(0)
392#define EXT_CSD_DYNCAP_NEEDED BIT(1)
393#define EXT_CSD_SYSPOOL_EXHAUSTED BIT(2)
394#define EXT_CSD_PACKED_FAILURE BIT(3)
395
396/*
397 * BKOPS status level
398 */
399#define EXT_CSD_BKOPS_LEVEL_2 0x2
400 338
401/* 339/*
402 * MMC_SWITCH access modes 340 * MMC_SWITCH access modes
diff --git a/include/linux/mmc/pm.h b/include/linux/mmc/pm.h
index 4a139204c20..6e2d6a135c7 100644
--- a/include/linux/mmc/pm.h
+++ b/include/linux/mmc/pm.h
@@ -26,5 +26,6 @@ typedef unsigned int mmc_pm_flag_t;
26 26
27#define MMC_PM_KEEP_POWER (1 << 0) /* preserve card power during suspend */ 27#define MMC_PM_KEEP_POWER (1 << 0) /* preserve card power during suspend */
28#define MMC_PM_WAKE_SDIO_IRQ (1 << 1) /* wake up host system on SDIO IRQ assertion */ 28#define MMC_PM_WAKE_SDIO_IRQ (1 << 1) /* wake up host system on SDIO IRQ assertion */
29#define MMC_PM_IGNORE_PM_NOTIFY (1 << 2) /* ignore mmc pm notify */
29 30
30#endif /* LINUX_MMC_PM_H */ 31#endif /* LINUX_MMC_PM_H */
diff --git a/include/linux/mmc/sdhci-pci-data.h b/include/linux/mmc/sdhci-pci-data.h
deleted file mode 100644
index 8959604a13d..00000000000
--- a/include/linux/mmc/sdhci-pci-data.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef LINUX_MMC_SDHCI_PCI_DATA_H
2#define LINUX_MMC_SDHCI_PCI_DATA_H
3
4struct pci_dev;
5
6struct sdhci_pci_data {
7 struct pci_dev *pdev;
8 int slotno;
9 int rst_n_gpio; /* Set to -EINVAL if unused */
10 int cd_gpio; /* Set to -EINVAL if unused */
11 int (*setup)(struct sdhci_pci_data *data);
12 void (*cleanup)(struct sdhci_pci_data *data);
13};
14
15extern struct sdhci_pci_data *(*sdhci_pci_get_data)(struct pci_dev *pdev,
16 int slotno);
17
18#endif
diff --git a/include/linux/mmc/sdhci-spear.h b/include/linux/mmc/sdhci-spear.h
index e78c0e236e9..5cdc96da9dd 100644
--- a/include/linux/mmc/sdhci-spear.h
+++ b/include/linux/mmc/sdhci-spear.h
@@ -4,7 +4,7 @@
4 * SDHCI declarations specific to ST SPEAr platform 4 * SDHCI declarations specific to ST SPEAr platform
5 * 5 *
6 * Copyright (C) 2010 ST Microelectronics 6 * Copyright (C) 2010 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com> 7 * Viresh Kumar<viresh.kumar@st.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index 4bbc3301fbb..5ee48390dec 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -21,87 +21,85 @@ struct sdhci_host {
21 /* Data set by hardware interface driver */ 21 /* Data set by hardware interface driver */
22 const char *hw_name; /* Hardware bus name */ 22 const char *hw_name; /* Hardware bus name */
23 23
24 unsigned int quirks; /* Deviations from spec. */ 24 u64 quirks; /* Deviations from spec. */
25 25
26/* Controller doesn't honor resets unless we touch the clock register */ 26/* Controller doesn't honor resets unless we touch the clock register */
27#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0) 27#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1ULL<<0)
28/* Controller has bad caps bits, but really supports DMA */ 28/* Controller has bad caps bits, but really supports DMA */
29#define SDHCI_QUIRK_FORCE_DMA (1<<1) 29#define SDHCI_QUIRK_FORCE_DMA (1ULL<<1)
30/* Controller doesn't like to be reset when there is no card inserted. */ 30/* Controller doesn't like to be reset when there is no card inserted. */
31#define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2) 31#define SDHCI_QUIRK_NO_CARD_NO_RESET (1ULL<<2)
32/* Controller doesn't like clearing the power reg before a change */ 32/* Controller doesn't like clearing the power reg before a change */
33#define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3) 33#define SDHCI_QUIRK_SINGLE_POWER_WRITE (1ULL<<3)
34/* Controller has flaky internal state so reset it on each ios change */ 34/* Controller has flaky internal state so reset it on each ios change */
35#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4) 35#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1ULL<<4)
36/* Controller has an unusable DMA engine */ 36/* Controller has an unusable DMA engine */
37#define SDHCI_QUIRK_BROKEN_DMA (1<<5) 37#define SDHCI_QUIRK_BROKEN_DMA (1ULL<<5)
38/* Controller has an unusable ADMA engine */ 38/* Controller has an unusable ADMA engine */
39#define SDHCI_QUIRK_BROKEN_ADMA (1<<6) 39#define SDHCI_QUIRK_BROKEN_ADMA (1ULL<<6)
40/* Controller can only DMA from 32-bit aligned addresses */ 40/* Controller can only DMA from 32-bit aligned addresses */
41#define SDHCI_QUIRK_32BIT_DMA_ADDR (1<<7) 41#define SDHCI_QUIRK_32BIT_DMA_ADDR (1ULL<<7)
42/* Controller can only DMA chunk sizes that are a multiple of 32 bits */ 42/* Controller can only DMA chunk sizes that are a multiple of 32 bits */
43#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<8) 43#define SDHCI_QUIRK_32BIT_DMA_SIZE (1ULL<<8)
44/* Controller can only ADMA chunks that are a multiple of 32 bits */ 44/* Controller can only ADMA chunks that are a multiple of 32 bits */
45#define SDHCI_QUIRK_32BIT_ADMA_SIZE (1<<9) 45#define SDHCI_QUIRK_32BIT_ADMA_SIZE (1ULL<<9)
46/* Controller needs to be reset after each request to stay stable */ 46/* Controller needs to be reset after each request to stay stable */
47#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<10) 47#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1ULL<<10)
48/* Controller needs voltage and power writes to happen separately */ 48/* Controller needs voltage and power writes to happen separately */
49#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1<<11) 49#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1ULL<<11)
50/* Controller provides an incorrect timeout value for transfers */ 50/* Controller provides an incorrect timeout value for transfers */
51#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<12) 51#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1ULL<<12)
52/* Controller has an issue with buffer bits for small transfers */ 52/* Controller has an issue with buffer bits for small transfers */
53#define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13) 53#define SDHCI_QUIRK_BROKEN_SMALL_PIO (1ULL<<13)
54/* Controller does not provide transfer-complete interrupt when not busy */ 54/* Controller does not provide transfer-complete interrupt when not busy */
55#define SDHCI_QUIRK_NO_BUSY_IRQ (1<<14) 55#define SDHCI_QUIRK_NO_BUSY_IRQ (1ULL<<14)
56/* Controller has unreliable card detection */ 56/* Controller has unreliable card detection */
57#define SDHCI_QUIRK_BROKEN_CARD_DETECTION (1<<15) 57#define SDHCI_QUIRK_BROKEN_CARD_DETECTION (1ULL<<15)
58/* Controller reports inverted write-protect state */ 58/* Controller reports inverted write-protect state */
59#define SDHCI_QUIRK_INVERTED_WRITE_PROTECT (1<<16) 59#define SDHCI_QUIRK_INVERTED_WRITE_PROTECT (1ULL<<16)
60/* Controller has nonstandard clock management */ 60/* Controller has nonstandard clock management */
61#define SDHCI_QUIRK_NONSTANDARD_CLOCK (1<<17) 61#define SDHCI_QUIRK_NONSTANDARD_CLOCK (1ULL<<17)
62/* Controller does not like fast PIO transfers */ 62/* Controller does not like fast PIO transfers */
63#define SDHCI_QUIRK_PIO_NEEDS_DELAY (1<<18) 63#define SDHCI_QUIRK_PIO_NEEDS_DELAY (1ULL<<18)
64/* Controller losing signal/interrupt enable states after reset */ 64/* Controller losing signal/interrupt enable states after reset */
65#define SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET (1<<19) 65#define SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET (1ULL<<19)
66/* Controller has to be forced to use block size of 2048 bytes */ 66/* Controller has to be forced to use block size of 2048 bytes */
67#define SDHCI_QUIRK_FORCE_BLK_SZ_2048 (1<<20) 67#define SDHCI_QUIRK_FORCE_BLK_SZ_2048 (1ULL<<20)
68/* Controller cannot do multi-block transfers */ 68/* Controller cannot do multi-block transfers */
69#define SDHCI_QUIRK_NO_MULTIBLOCK (1<<21) 69#define SDHCI_QUIRK_NO_MULTIBLOCK (1ULL<<21)
70/* Controller can only handle 1-bit data transfers */ 70/* Controller can only handle 1-bit data transfers */
71#define SDHCI_QUIRK_FORCE_1_BIT_DATA (1<<22) 71#define SDHCI_QUIRK_FORCE_1_BIT_DATA (1ULL<<22)
72/* Controller needs 10ms delay between applying power and clock */ 72/* Controller needs 10ms delay between applying power and clock */
73#define SDHCI_QUIRK_DELAY_AFTER_POWER (1<<23) 73#define SDHCI_QUIRK_DELAY_AFTER_POWER (1ULL<<23)
74/* Controller uses SDCLK instead of TMCLK for data timeouts */ 74/* Controller uses SDCLK instead of TMCLK for data timeouts */
75#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK (1<<24) 75#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK (1ULL<<24)
76/* Controller reports wrong base clock capability */ 76/* Controller reports wrong base clock capability */
77#define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN (1<<25) 77#define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN (1ULL<<25)
78/* Controller cannot support End Attribute in NOP ADMA descriptor */ 78/* Controller cannot support End Attribute in NOP ADMA descriptor */
79#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC (1<<26) 79#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC (1ULL<<26)
80/* Controller is missing device caps. Use caps provided by host */ 80/* Controller is missing device caps. Use caps provided by host */
81#define SDHCI_QUIRK_MISSING_CAPS (1<<27) 81#define SDHCI_QUIRK_MISSING_CAPS (1ULL<<27)
82/* Controller uses Auto CMD12 command to stop the transfer */ 82/* Controller uses Auto CMD12 command to stop the transfer */
83#define SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 (1<<28) 83#define SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 (1ULL<<28)
84/* Controller doesn't have HISPD bit field in HI-SPEED SD card */ 84/* Controller doesn't have HISPD bit field in HI-SPEED SD card */
85#define SDHCI_QUIRK_NO_HISPD_BIT (1<<29) 85#define SDHCI_QUIRK_NO_HISPD_BIT (1ULL<<29)
86/* Controller treats ADMA descriptors with length 0000h incorrectly */ 86/* Controller treats ADMA descriptors with length 0000h incorrectly */
87#define SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC (1<<30) 87#define SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC (1ULL<<30)
88/* The read-only detection via SDHCI_PRESENT_STATE register is unstable */ 88/* The read-only detection via SDHCI_PRESENT_STATE register is unstable */
89#define SDHCI_QUIRK_UNSTABLE_RO_DETECT (1<<31) 89#define SDHCI_QUIRK_UNSTABLE_RO_DETECT (1ULL<<31)
90 90/* Controller cannot report the line status in present state register */
91 unsigned int quirks2; /* More deviations from spec. */ 91#define SDHCI_QUIRK_NON_STD_VOLTAGE_SWITCHING (1ULL<<32)
92 92/* Controller doesn't follow the standard frequency tuning procedure */
93#define SDHCI_QUIRK2_HOST_OFF_CARD_ON (1<<0) 93#define SDHCI_QUIRK_NON_STANDARD_TUNING (1ULL<<33)
94#define SDHCI_QUIRK2_HOST_NO_CMD23 (1<<1) 94/* Controller doesn't calculate max_discard_to */
95/* The system physically doesn't support 1.8v, even if the host does */ 95#define SDHCI_QUIRK_NO_CALC_MAX_DISCARD_TO (1ULL<<34)
96#define SDHCI_QUIRK2_NO_1_8_V (1<<2)
97 96
98 int irq; /* Device IRQ */ 97 int irq; /* Device IRQ */
99 void __iomem *ioaddr; /* Mapped address */ 98 void __iomem *ioaddr; /* Mapped address */
100 99
101 const struct sdhci_ops *ops; /* Low level hw interface */ 100 const struct sdhci_ops *ops; /* Low level hw interface */
102 101
103 struct regulator *vmmc; /* Power regulator (vmmc) */ 102 struct regulator *vmmc; /* Power regulator */
104 struct regulator *vqmmc; /* Signaling regulator (vccq) */
105 103
106 /* Internal data */ 104 /* Internal data */
107 struct mmc_host *mmc; /* MMC structure */ 105 struct mmc_host *mmc; /* MMC structure */
@@ -123,10 +121,6 @@ struct sdhci_host {
123#define SDHCI_NEEDS_RETUNING (1<<5) /* Host needs retuning */ 121#define SDHCI_NEEDS_RETUNING (1<<5) /* Host needs retuning */
124#define SDHCI_AUTO_CMD12 (1<<6) /* Auto CMD12 support */ 122#define SDHCI_AUTO_CMD12 (1<<6) /* Auto CMD12 support */
125#define SDHCI_AUTO_CMD23 (1<<7) /* Auto CMD23 support */ 123#define SDHCI_AUTO_CMD23 (1<<7) /* Auto CMD23 support */
126#define SDHCI_PV_ENABLED (1<<8) /* Preset value enabled */
127#define SDHCI_SDIO_IRQ_ENABLED (1<<9) /* SDIO irq enabled */
128#define SDHCI_HS200_NEEDS_TUNING (1<<10) /* HS200 needs tuning */
129#define SDHCI_USING_RETUNING_TIMER (1<<11) /* Host is using a retuning timer for the card */
130 124
131 unsigned int version; /* SDHCI spec. version */ 125 unsigned int version; /* SDHCI spec. version */
132 126
@@ -137,8 +131,6 @@ struct sdhci_host {
137 unsigned int clock; /* Current clock (MHz) */ 131 unsigned int clock; /* Current clock (MHz) */
138 u8 pwr; /* Current voltage */ 132 u8 pwr; /* Current voltage */
139 133
140 bool runtime_suspended; /* Host is runtime suspended */
141
142 struct mmc_request *mrq; /* Current request */ 134 struct mmc_request *mrq; /* Current request */
143 struct mmc_command *cmd; /* Current command */ 135 struct mmc_command *cmd; /* Current command */
144 struct mmc_data *data; /* Current data request */ 136 struct mmc_data *data; /* Current data request */
@@ -159,9 +151,9 @@ struct sdhci_host {
159 struct tasklet_struct finish_tasklet; 151 struct tasklet_struct finish_tasklet;
160 152
161 struct timer_list timer; /* Timer for timeouts */ 153 struct timer_list timer; /* Timer for timeouts */
154 unsigned int card_int_set; /* card int status */
162 155
163 u32 caps; /* Alternative CAPABILITY_0 */ 156 unsigned int caps; /* Alternative capabilities */
164 u32 caps1; /* Alternative CAPABILITY_1 */
165 157
166 unsigned int ocr_avail_sdio; /* OCR bit masks */ 158 unsigned int ocr_avail_sdio; /* OCR bit masks */
167 unsigned int ocr_avail_sd; 159 unsigned int ocr_avail_sd;
diff --git a/include/linux/mmc/sdio.h b/include/linux/mmc/sdio.h
index 17446d3c360..666ff6b0aea 100644
--- a/include/linux/mmc/sdio.h
+++ b/include/linux/mmc/sdio.h
@@ -38,8 +38,8 @@
38 * [8:0] Byte/block count 38 * [8:0] Byte/block count
39 */ 39 */
40 40
41#define R4_18V_PRESENT (1<<24) 41#define R4_18V_PRESENT BIT(24)
42#define R4_MEMORY_PRESENT (1 << 27) 42#define R4_MEMORY_PRESENT BIT(27)
43 43
44/* 44/*
45 SDIO status in R5 45 SDIO status in R5
@@ -98,9 +98,7 @@
98 98
99#define SDIO_CCCR_IF 0x07 /* bus interface controls */ 99#define SDIO_CCCR_IF 0x07 /* bus interface controls */
100 100
101#define SDIO_BUS_WIDTH_MASK 0x03 /* data bus width setting */
102#define SDIO_BUS_WIDTH_1BIT 0x00 101#define SDIO_BUS_WIDTH_1BIT 0x00
103#define SDIO_BUS_WIDTH_RESERVED 0x01
104#define SDIO_BUS_WIDTH_4BIT 0x02 102#define SDIO_BUS_WIDTH_4BIT 0x02
105#define SDIO_BUS_ECSI 0x20 /* Enable continuous SPI interrupt */ 103#define SDIO_BUS_ECSI 0x20 /* Enable continuous SPI interrupt */
106#define SDIO_BUS_SCSI 0x40 /* Support continuous SPI interrupt */ 104#define SDIO_BUS_SCSI 0x40 /* Support continuous SPI interrupt */
@@ -139,12 +137,12 @@
139 137
140#define SDIO_SPEED_SHS 0x01 /* Supports High-Speed mode */ 138#define SDIO_SPEED_SHS 0x01 /* Supports High-Speed mode */
141#define SDIO_SPEED_BSS_SHIFT 1 139#define SDIO_SPEED_BSS_SHIFT 1
142#define SDIO_SPEED_BSS_MASK (7<<SDIO_SPEED_BSS_SHIFT) 140#define SDIO_SPEED_BSS_MASK (7 << SDIO_SPEED_BSS_SHIFT)
143#define SDIO_SPEED_SDR12 (0<<SDIO_SPEED_BSS_SHIFT) 141#define SDIO_SPEED_SDR12 (0 << SDIO_SPEED_BSS_SHIFT)
144#define SDIO_SPEED_SDR25 (1<<SDIO_SPEED_BSS_SHIFT) 142#define SDIO_SPEED_SDR25 (1 << SDIO_SPEED_BSS_SHIFT)
145#define SDIO_SPEED_SDR50 (2<<SDIO_SPEED_BSS_SHIFT) 143#define SDIO_SPEED_SDR50 (2 << SDIO_SPEED_BSS_SHIFT)
146#define SDIO_SPEED_SDR104 (3<<SDIO_SPEED_BSS_SHIFT) 144#define SDIO_SPEED_SDR104 (3 << SDIO_SPEED_BSS_SHIFT)
147#define SDIO_SPEED_DDR50 (4<<SDIO_SPEED_BSS_SHIFT) 145#define SDIO_SPEED_DDR50 (4 << SDIO_SPEED_BSS_SHIFT)
148#define SDIO_SPEED_EHS SDIO_SPEED_SDR25 /* Enable High-Speed */ 146#define SDIO_SPEED_EHS SDIO_SPEED_SDR25 /* Enable High-Speed */
149 147
150#define SDIO_CCCR_UHS 0x14 148#define SDIO_CCCR_UHS 0x14
@@ -154,9 +152,9 @@
154 152
155#define SDIO_CCCR_DRIVE_STRENGTH 0x15 153#define SDIO_CCCR_DRIVE_STRENGTH 0x15
156#define SDIO_SDTx_MASK 0x07 154#define SDIO_SDTx_MASK 0x07
157#define SDIO_DRIVE_SDTA (1<<0) 155#define SDIO_DRIVE_SDTA (1 << 0)
158#define SDIO_DRIVE_SDTC (1<<1) 156#define SDIO_DRIVE_SDTC (1 << 1)
159#define SDIO_DRIVE_SDTD (1<<2) 157#define SDIO_DRIVE_SDTD (1 << 2)
160#define SDIO_DRIVE_DTSx_MASK 0x03 158#define SDIO_DRIVE_DTSx_MASK 0x03
161#define SDIO_DRIVE_DTSx_SHIFT 4 159#define SDIO_DRIVE_DTSx_SHIFT 4
162#define SDIO_DTSx_SET_TYPE_B (0 << SDIO_DRIVE_DTSx_SHIFT) 160#define SDIO_DTSx_SET_TYPE_B (0 << SDIO_DRIVE_DTSx_SHIFT)
diff --git a/include/linux/mmc/sdio_func.h b/include/linux/mmc/sdio_func.h
index 50f0bc95232..dc680c4b50d 100644
--- a/include/linux/mmc/sdio_func.h
+++ b/include/linux/mmc/sdio_func.h
@@ -23,6 +23,14 @@ struct sdio_func;
23typedef void (sdio_irq_handler_t)(struct sdio_func *); 23typedef void (sdio_irq_handler_t)(struct sdio_func *);
24 24
25/* 25/*
26 * Structure used to hold embedded SDIO device data from platform layer
27 */
28struct sdio_embedded_func {
29 uint8_t f_class;
30 uint32_t f_maxblksize;
31};
32
33/*
26 * SDIO function CIS tuple (unknown to the core) 34 * SDIO function CIS tuple (unknown to the core)
27 */ 35 */
28struct sdio_func_tuple { 36struct sdio_func_tuple {
@@ -130,6 +138,8 @@ extern int sdio_release_irq(struct sdio_func *func);
130extern unsigned int sdio_align_size(struct sdio_func *func, unsigned int sz); 138extern unsigned int sdio_align_size(struct sdio_func *func, unsigned int sz);
131 139
132extern u8 sdio_readb(struct sdio_func *func, unsigned int addr, int *err_ret); 140extern u8 sdio_readb(struct sdio_func *func, unsigned int addr, int *err_ret);
141extern u8 sdio_readb_ext(struct sdio_func *func, unsigned int addr, int *err_ret,
142 unsigned in);
133extern u16 sdio_readw(struct sdio_func *func, unsigned int addr, int *err_ret); 143extern u16 sdio_readw(struct sdio_func *func, unsigned int addr, int *err_ret);
134extern u32 sdio_readl(struct sdio_func *func, unsigned int addr, int *err_ret); 144extern u32 sdio_readl(struct sdio_func *func, unsigned int addr, int *err_ret);
135 145
diff --git a/include/linux/mmc/sh_mmcif.h b/include/linux/mmc/sh_mmcif.h
index e7d5dd67bb7..0222cd8ebe7 100644
--- a/include/linux/mmc/sh_mmcif.h
+++ b/include/linux/mmc/sh_mmcif.h
@@ -32,14 +32,16 @@
32 * 1111 : Peripheral clock (sup_pclk set '1') 32 * 1111 : Peripheral clock (sup_pclk set '1')
33 */ 33 */
34 34
35struct sh_mmcif_dma {
36 struct sh_dmae_slave chan_priv_tx;
37 struct sh_dmae_slave chan_priv_rx;
38};
39
35struct sh_mmcif_plat_data { 40struct sh_mmcif_plat_data {
36 void (*set_pwr)(struct platform_device *pdev, int state); 41 void (*set_pwr)(struct platform_device *pdev, int state);
37 void (*down_pwr)(struct platform_device *pdev); 42 void (*down_pwr)(struct platform_device *pdev);
38 int (*get_cd)(struct platform_device *pdef); 43 int (*get_cd)(struct platform_device *pdef);
39 unsigned int slave_id_tx; /* embedded slave_id_[tr]x */ 44 struct sh_mmcif_dma *dma;
40 unsigned int slave_id_rx;
41 bool use_cd_gpio : 1;
42 unsigned int cd_gpio;
43 u8 sup_pclk; /* 1 :SH7757, 0: SH7724/SH7372 */ 45 u8 sup_pclk; /* 1 :SH7757, 0: SH7724/SH7372 */
44 unsigned long caps; 46 unsigned long caps;
45 u32 ocr; 47 u32 ocr;
@@ -73,15 +75,18 @@ struct sh_mmcif_plat_data {
73 75
74/* CE_CLK_CTRL */ 76/* CE_CLK_CTRL */
75#define CLK_ENABLE (1 << 24) /* 1: output mmc clock */ 77#define CLK_ENABLE (1 << 24) /* 1: output mmc clock */
76#define CLK_CLEAR (0xf << 16) 78#define CLK_CLEAR ((1 << 19) | (1 << 18) | (1 << 17) | (1 << 16))
77#define CLK_SUP_PCLK (0xf << 16) 79#define CLK_SUP_PCLK ((1 << 19) | (1 << 18) | (1 << 17) | (1 << 16))
78#define CLKDIV_4 (1 << 16) /* mmc clock frequency. 80#define CLKDIV_4 (1<<16) /* mmc clock frequency.
79 * n: bus clock/(2^(n+1)) */ 81 * n: bus clock/(2^(n+1)) */
80#define CLKDIV_256 (7 << 16) /* mmc clock frequency. (see above) */ 82#define CLKDIV_256 (7<<16) /* mmc clock frequency. (see above) */
81#define SRSPTO_256 (2 << 12) /* resp timeout */ 83#define SRSPTO_256 ((1 << 13) | (0 << 12)) /* resp timeout */
82#define SRBSYTO_29 (0xf << 8) /* resp busy timeout */ 84#define SRBSYTO_29 ((1 << 11) | (1 << 10) | \
83#define SRWDTO_29 (0xf << 4) /* read/write timeout */ 85 (1 << 9) | (1 << 8)) /* resp busy timeout */
84#define SCCSTO_29 (0xf << 0) /* ccs timeout */ 86#define SRWDTO_29 ((1 << 7) | (1 << 6) | \
87 (1 << 5) | (1 << 4)) /* read/write timeout */
88#define SCCSTO_29 ((1 << 3) | (1 << 2) | \
89 (1 << 1) | (1 << 0)) /* ccs timeout */
85 90
86/* CE_VERSION */ 91/* CE_VERSION */
87#define SOFT_RST_ON (1 << 31) 92#define SOFT_RST_ON (1 << 31)
diff --git a/include/linux/mmc/sh_mobile_sdhi.h b/include/linux/mmc/sh_mobile_sdhi.h
index b65679ffa88..bd50b365167 100644
--- a/include/linux/mmc/sh_mobile_sdhi.h
+++ b/include/linux/mmc/sh_mobile_sdhi.h
@@ -6,34 +6,15 @@
6struct platform_device; 6struct platform_device;
7struct tmio_mmc_data; 7struct tmio_mmc_data;
8 8
9#define SH_MOBILE_SDHI_IRQ_CARD_DETECT "card_detect"
10#define SH_MOBILE_SDHI_IRQ_SDCARD "sdcard"
11#define SH_MOBILE_SDHI_IRQ_SDIO "sdio"
12
13/**
14 * struct sh_mobile_sdhi_ops - SDHI driver callbacks
15 * @cd_wakeup: trigger a card-detection run
16 */
17struct sh_mobile_sdhi_ops {
18 void (*cd_wakeup)(const struct platform_device *pdev);
19};
20
21struct sh_mobile_sdhi_info { 9struct sh_mobile_sdhi_info {
22 int dma_slave_tx; 10 int dma_slave_tx;
23 int dma_slave_rx; 11 int dma_slave_rx;
24 unsigned long tmio_flags; 12 unsigned long tmio_flags;
25 unsigned long tmio_caps; 13 unsigned long tmio_caps;
26 unsigned long tmio_caps2;
27 u32 tmio_ocr_mask; /* available MMC voltages */ 14 u32 tmio_ocr_mask; /* available MMC voltages */
28 unsigned int cd_gpio;
29 struct tmio_mmc_data *pdata; 15 struct tmio_mmc_data *pdata;
30 void (*set_pwr)(struct platform_device *pdev, int state); 16 void (*set_pwr)(struct platform_device *pdev, int state);
31 int (*get_cd)(struct platform_device *pdev); 17 int (*get_cd)(struct platform_device *pdev);
32
33 /* callbacks for board specific setup code */
34 int (*init)(struct platform_device *pdev,
35 const struct sh_mobile_sdhi_ops *ops);
36 void (*cleanup)(struct platform_device *pdev);
37}; 18};
38 19
39#endif /* LINUX_MMC_SH_MOBILE_SDHI_H */ 20#endif /* LINUX_MMC_SH_MOBILE_SDHI_H */
diff --git a/include/linux/mmc/slot-gpio.h b/include/linux/mmc/slot-gpio.h
deleted file mode 100644
index 7d88d27bfaf..00000000000
--- a/include/linux/mmc/slot-gpio.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * Generic GPIO card-detect helper header
3 *
4 * Copyright (C) 2011, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef MMC_SLOT_GPIO_H
12#define MMC_SLOT_GPIO_H
13
14struct mmc_host;
15
16int mmc_gpio_get_ro(struct mmc_host *host);
17int mmc_gpio_request_ro(struct mmc_host *host, unsigned int gpio);
18void mmc_gpio_free_ro(struct mmc_host *host);
19
20int mmc_gpio_get_cd(struct mmc_host *host);
21int mmc_gpio_request_cd(struct mmc_host *host, unsigned int gpio);
22void mmc_gpio_free_cd(struct mmc_host *host);
23
24#endif