diff options
| author | Mattias Nilsson <mattias.i.nilsson@stericsson.com> | 2012-01-13 10:20:20 -0500 |
|---|---|---|
| committer | Samuel Ortiz <sameo@linux.intel.com> | 2012-03-06 12:46:32 -0500 |
| commit | 0508901ca794d411efb09befb88b8194d8387428 (patch) | |
| tree | 44539901a5db5a28955cf62c03860d073fa8a82d /include/linux/mfd | |
| parent | b58d12fe6ccd16030e1a69b5c443075f7bed0f6d (diff) | |
mfd: Update abstract dbx500 interface
This prefixes a number of accessor functions with db8500_* since
they are DB8500-specific and we need to move to this naming
scheme.
We also replace numerous instances of machine_is() with cpu_is()
which covers the right type of ASICs rather than entire machines
i.e. boards.
Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/db8500-prcmu.h | 61 | ||||
| -rw-r--r-- | include/linux/mfd/dbx500-prcmu.h | 175 |
2 files changed, 183 insertions, 53 deletions
diff --git a/include/linux/mfd/db8500-prcmu.h b/include/linux/mfd/db8500-prcmu.h index 18959171f44..c5028f1246f 100644 --- a/include/linux/mfd/db8500-prcmu.h +++ b/include/linux/mfd/db8500-prcmu.h | |||
| @@ -512,13 +512,9 @@ int prcmu_set_rc_a2p(enum romcode_write); | |||
| 512 | enum romcode_read prcmu_get_rc_p2a(void); | 512 | enum romcode_read prcmu_get_rc_p2a(void); |
| 513 | enum ap_pwrst prcmu_get_xp70_current_state(void); | 513 | enum ap_pwrst prcmu_get_xp70_current_state(void); |
| 514 | bool prcmu_has_arm_maxopp(void); | 514 | bool prcmu_has_arm_maxopp(void); |
| 515 | int prcmu_set_ape_opp(u8 opp); | ||
| 516 | int prcmu_get_ape_opp(void); | ||
| 517 | struct prcmu_fw_version *prcmu_get_fw_version(void); | 515 | struct prcmu_fw_version *prcmu_get_fw_version(void); |
| 518 | int prcmu_request_ape_opp_100_voltage(bool enable); | 516 | int prcmu_request_ape_opp_100_voltage(bool enable); |
| 519 | int prcmu_release_usb_wakeup_state(void); | 517 | int prcmu_release_usb_wakeup_state(void); |
| 520 | int prcmu_set_ddr_opp(u8 opp); | ||
| 521 | int prcmu_get_ddr_opp(void); | ||
| 522 | /* NOTE! Use regulator framework instead */ | 518 | /* NOTE! Use regulator framework instead */ |
| 523 | int prcmu_set_hwacc(u16 hw_acc_dev, u8 state); | 519 | int prcmu_set_hwacc(u16 hw_acc_dev, u8 state); |
| 524 | void prcmu_configure_auto_pm(struct prcmu_auto_pm_config *sleep, | 520 | void prcmu_configure_auto_pm(struct prcmu_auto_pm_config *sleep, |
| @@ -527,24 +523,24 @@ bool prcmu_is_auto_pm_enabled(void); | |||
| 527 | 523 | ||
| 528 | int prcmu_config_clkout(u8 clkout, u8 source, u8 div); | 524 | int prcmu_config_clkout(u8 clkout, u8 source, u8 div); |
| 529 | int prcmu_set_clock_divider(u8 clock, u8 divider); | 525 | int prcmu_set_clock_divider(u8 clock, u8 divider); |
| 530 | int prcmu_config_hotdog(u8 threshold); | 526 | int db8500_prcmu_config_hotdog(u8 threshold); |
| 531 | int prcmu_config_hotmon(u8 low, u8 high); | 527 | int db8500_prcmu_config_hotmon(u8 low, u8 high); |
| 532 | int prcmu_start_temp_sense(u16 cycles32k); | 528 | int db8500_prcmu_start_temp_sense(u16 cycles32k); |
| 533 | int prcmu_stop_temp_sense(void); | 529 | int db8500_prcmu_stop_temp_sense(void); |
| 534 | int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size); | 530 | int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size); |
| 535 | int prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size); | 531 | int prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size); |
| 536 | 532 | ||
| 537 | void prcmu_ac_wake_req(void); | 533 | void prcmu_ac_wake_req(void); |
| 538 | void prcmu_ac_sleep_req(void); | 534 | void prcmu_ac_sleep_req(void); |
| 539 | void prcmu_modem_reset(void); | 535 | void db8500_prcmu_modem_reset(void); |
| 540 | void prcmu_enable_spi2(void); | 536 | void prcmu_enable_spi2(void); |
| 541 | void prcmu_disable_spi2(void); | 537 | void prcmu_disable_spi2(void); |
| 542 | 538 | ||
| 543 | int prcmu_config_a9wdog(u8 num, bool sleep_auto_off); | 539 | int db8500_prcmu_config_a9wdog(u8 num, bool sleep_auto_off); |
| 544 | int prcmu_enable_a9wdog(u8 id); | 540 | int db8500_prcmu_enable_a9wdog(u8 id); |
| 545 | int prcmu_disable_a9wdog(u8 id); | 541 | int db8500_prcmu_disable_a9wdog(u8 id); |
| 546 | int prcmu_kick_a9wdog(u8 id); | 542 | int db8500_prcmu_kick_a9wdog(u8 id); |
| 547 | int prcmu_load_a9wdog(u8 id, u32 val); | 543 | int db8500_prcmu_load_a9wdog(u8 id, u32 val); |
| 548 | 544 | ||
| 549 | void db8500_prcmu_system_reset(u16 reset_code); | 545 | void db8500_prcmu_system_reset(u16 reset_code); |
| 550 | int db8500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, bool keep_ap_pll); | 546 | int db8500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, bool keep_ap_pll); |
| @@ -561,6 +557,10 @@ u16 db8500_prcmu_get_reset_code(void); | |||
| 561 | bool db8500_prcmu_is_ac_wake_requested(void); | 557 | bool db8500_prcmu_is_ac_wake_requested(void); |
| 562 | int db8500_prcmu_set_arm_opp(u8 opp); | 558 | int db8500_prcmu_set_arm_opp(u8 opp); |
| 563 | int db8500_prcmu_get_arm_opp(void); | 559 | int db8500_prcmu_get_arm_opp(void); |
| 560 | int db8500_prcmu_set_ape_opp(u8 opp); | ||
| 561 | int db8500_prcmu_get_ape_opp(void); | ||
| 562 | int db8500_prcmu_set_ddr_opp(u8 opp); | ||
| 563 | int db8500_prcmu_get_ddr_opp(void); | ||
| 564 | 564 | ||
| 565 | #else /* !CONFIG_MFD_DB8500_PRCMU */ | 565 | #else /* !CONFIG_MFD_DB8500_PRCMU */ |
| 566 | 566 | ||
| @@ -591,12 +591,12 @@ static inline struct prcmu_fw_version *prcmu_get_fw_version(void) | |||
| 591 | return NULL; | 591 | return NULL; |
| 592 | } | 592 | } |
| 593 | 593 | ||
| 594 | static inline int prcmu_set_ape_opp(u8 opp) | 594 | static inline int db8500_prcmu_set_ape_opp(u8 opp) |
| 595 | { | 595 | { |
| 596 | return 0; | 596 | return 0; |
| 597 | } | 597 | } |
| 598 | 598 | ||
| 599 | static inline int prcmu_get_ape_opp(void) | 599 | static inline int db8500_prcmu_get_ape_opp(void) |
| 600 | { | 600 | { |
| 601 | return APE_100_OPP; | 601 | return APE_100_OPP; |
| 602 | } | 602 | } |
| @@ -611,12 +611,12 @@ static inline int prcmu_release_usb_wakeup_state(void) | |||
| 611 | return 0; | 611 | return 0; |
| 612 | } | 612 | } |
| 613 | 613 | ||
| 614 | static inline int prcmu_set_ddr_opp(u8 opp) | 614 | static inline int db8500_prcmu_set_ddr_opp(u8 opp) |
| 615 | { | 615 | { |
| 616 | return 0; | 616 | return 0; |
| 617 | } | 617 | } |
| 618 | 618 | ||
| 619 | static inline int prcmu_get_ddr_opp(void) | 619 | static inline int db8500_prcmu_get_ddr_opp(void) |
| 620 | { | 620 | { |
| 621 | return DDR_100_OPP; | 621 | return DDR_100_OPP; |
| 622 | } | 622 | } |
| @@ -625,7 +625,6 @@ static inline int prcmu_set_hwacc(u16 hw_acc_dev, u8 state) | |||
| 625 | { | 625 | { |
| 626 | return 0; | 626 | return 0; |
| 627 | } | 627 | } |
| 628 | |||
| 629 | static inline void prcmu_configure_auto_pm(struct prcmu_auto_pm_config *sleep, | 628 | static inline void prcmu_configure_auto_pm(struct prcmu_auto_pm_config *sleep, |
| 630 | struct prcmu_auto_pm_config *idle) | 629 | struct prcmu_auto_pm_config *idle) |
| 631 | { | 630 | { |
| @@ -646,22 +645,22 @@ static inline int prcmu_set_clock_divider(u8 clock, u8 divider) | |||
| 646 | return 0; | 645 | return 0; |
| 647 | } | 646 | } |
| 648 | 647 | ||
| 649 | static inline int prcmu_config_hotdog(u8 threshold) | 648 | static inline int db8500_prcmu_config_hotdog(u8 threshold) |
| 650 | { | 649 | { |
| 651 | return 0; | 650 | return 0; |
| 652 | } | 651 | } |
| 653 | 652 | ||
| 654 | static inline int prcmu_config_hotmon(u8 low, u8 high) | 653 | static inline int db8500_prcmu_config_hotmon(u8 low, u8 high) |
| 655 | { | 654 | { |
| 656 | return 0; | 655 | return 0; |
| 657 | } | 656 | } |
| 658 | 657 | ||
| 659 | static inline int prcmu_start_temp_sense(u16 cycles32k) | 658 | static inline int db8500_prcmu_start_temp_sense(u16 cycles32k) |
| 660 | { | 659 | { |
| 661 | return 0; | 660 | return 0; |
| 662 | } | 661 | } |
| 663 | 662 | ||
| 664 | static inline int prcmu_stop_temp_sense(void) | 663 | static inline int db8500_prcmu_stop_temp_sense(void) |
| 665 | { | 664 | { |
| 666 | return 0; | 665 | return 0; |
| 667 | } | 666 | } |
| @@ -680,7 +679,9 @@ static inline void prcmu_ac_wake_req(void) {} | |||
| 680 | 679 | ||
| 681 | static inline void prcmu_ac_sleep_req(void) {} | 680 | static inline void prcmu_ac_sleep_req(void) {} |
| 682 | 681 | ||
| 683 | static inline void prcmu_modem_reset(void) {} | 682 | static inline void db8500_prcmu_modem_reset(void) {} |
| 683 | |||
| 684 | static inline void db8500_prcmu_system_reset(u16 reset_code) {} | ||
| 684 | 685 | ||
| 685 | static inline int prcmu_enable_spi2(void) | 686 | static inline int prcmu_enable_spi2(void) |
| 686 | { | 687 | { |
| @@ -692,8 +693,6 @@ static inline int prcmu_disable_spi2(void) | |||
| 692 | return 0; | 693 | return 0; |
| 693 | } | 694 | } |
| 694 | 695 | ||
| 695 | static inline void db8500_prcmu_system_reset(u16 reset_code) {} | ||
| 696 | |||
| 697 | static inline int db8500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, | 696 | static inline int db8500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, |
| 698 | bool keep_ap_pll) | 697 | bool keep_ap_pll) |
| 699 | { | 698 | { |
| @@ -741,27 +740,27 @@ static inline u16 db8500_prcmu_get_reset_code(void) | |||
| 741 | return 0; | 740 | return 0; |
| 742 | } | 741 | } |
| 743 | 742 | ||
| 744 | static inline int prcmu_config_a9wdog(u8 num, bool sleep_auto_off) | 743 | static inline int db8500_prcmu_config_a9wdog(u8 num, bool sleep_auto_off) |
| 745 | { | 744 | { |
| 746 | return 0; | 745 | return 0; |
| 747 | } | 746 | } |
| 748 | 747 | ||
| 749 | static inline int prcmu_enable_a9wdog(u8 id) | 748 | static inline int db8500_prcmu_enable_a9wdog(u8 id) |
| 750 | { | 749 | { |
| 751 | return 0; | 750 | return 0; |
| 752 | } | 751 | } |
| 753 | 752 | ||
| 754 | static inline int prcmu_disable_a9wdog(u8 id) | 753 | static inline int db8500_prcmu_disable_a9wdog(u8 id) |
| 755 | { | 754 | { |
| 756 | return 0; | 755 | return 0; |
| 757 | } | 756 | } |
| 758 | 757 | ||
| 759 | static inline int prcmu_kick_a9wdog(u8 id) | 758 | static inline int db8500_prcmu_kick_a9wdog(u8 id) |
| 760 | { | 759 | { |
| 761 | return 0; | 760 | return 0; |
| 762 | } | 761 | } |
| 763 | 762 | ||
| 764 | static inline int prcmu_load_a9wdog(u8 id, u32 val) | 763 | static inline int db8500_prcmu_load_a9wdog(u8 id, u32 val) |
| 765 | { | 764 | { |
| 766 | return 0; | 765 | return 0; |
| 767 | } | 766 | } |
diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index bac942f959c..f73b9d9d2a2 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h | |||
| @@ -10,7 +10,7 @@ | |||
| 10 | 10 | ||
| 11 | #include <linux/interrupt.h> | 11 | #include <linux/interrupt.h> |
| 12 | #include <linux/notifier.h> | 12 | #include <linux/notifier.h> |
| 13 | #include <asm/mach-types.h> | 13 | #include <linux/err.h> |
| 14 | 14 | ||
| 15 | /* PRCMU Wakeup defines */ | 15 | /* PRCMU Wakeup defines */ |
| 16 | enum prcmu_wakeup_index { | 16 | enum prcmu_wakeup_index { |
| @@ -218,9 +218,11 @@ enum ddr_pwrst { | |||
| 218 | 218 | ||
| 219 | #if defined(CONFIG_UX500_SOC_DB8500) || defined(CONFIG_UX500_SOC_DB5500) | 219 | #if defined(CONFIG_UX500_SOC_DB8500) || defined(CONFIG_UX500_SOC_DB5500) |
| 220 | 220 | ||
| 221 | #include <mach/id.h> | ||
| 222 | |||
| 221 | static inline void __init prcmu_early_init(void) | 223 | static inline void __init prcmu_early_init(void) |
| 222 | { | 224 | { |
| 223 | if (machine_is_u5500()) | 225 | if (cpu_is_u5500()) |
| 224 | return db5500_prcmu_early_init(); | 226 | return db5500_prcmu_early_init(); |
| 225 | else | 227 | else |
| 226 | return db8500_prcmu_early_init(); | 228 | return db8500_prcmu_early_init(); |
| @@ -229,7 +231,7 @@ static inline void __init prcmu_early_init(void) | |||
| 229 | static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk, | 231 | static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk, |
| 230 | bool keep_ap_pll) | 232 | bool keep_ap_pll) |
| 231 | { | 233 | { |
| 232 | if (machine_is_u5500()) | 234 | if (cpu_is_u5500()) |
| 233 | return db5500_prcmu_set_power_state(state, keep_ulp_clk, | 235 | return db5500_prcmu_set_power_state(state, keep_ulp_clk, |
| 234 | keep_ap_pll); | 236 | keep_ap_pll); |
| 235 | else | 237 | else |
| @@ -239,7 +241,7 @@ static inline int prcmu_set_power_state(u8 state, bool keep_ulp_clk, | |||
| 239 | 241 | ||
| 240 | static inline int prcmu_set_epod(u16 epod_id, u8 epod_state) | 242 | static inline int prcmu_set_epod(u16 epod_id, u8 epod_state) |
| 241 | { | 243 | { |
| 242 | if (machine_is_u5500()) | 244 | if (cpu_is_u5500()) |
| 243 | return -EINVAL; | 245 | return -EINVAL; |
| 244 | else | 246 | else |
| 245 | return db8500_prcmu_set_epod(epod_id, epod_state); | 247 | return db8500_prcmu_set_epod(epod_id, epod_state); |
| @@ -247,7 +249,7 @@ static inline int prcmu_set_epod(u16 epod_id, u8 epod_state) | |||
| 247 | 249 | ||
| 248 | static inline void prcmu_enable_wakeups(u32 wakeups) | 250 | static inline void prcmu_enable_wakeups(u32 wakeups) |
| 249 | { | 251 | { |
| 250 | if (machine_is_u5500()) | 252 | if (cpu_is_u5500()) |
| 251 | db5500_prcmu_enable_wakeups(wakeups); | 253 | db5500_prcmu_enable_wakeups(wakeups); |
| 252 | else | 254 | else |
| 253 | db8500_prcmu_enable_wakeups(wakeups); | 255 | db8500_prcmu_enable_wakeups(wakeups); |
| @@ -260,7 +262,7 @@ static inline void prcmu_disable_wakeups(void) | |||
| 260 | 262 | ||
| 261 | static inline void prcmu_config_abb_event_readout(u32 abb_events) | 263 | static inline void prcmu_config_abb_event_readout(u32 abb_events) |
| 262 | { | 264 | { |
| 263 | if (machine_is_u5500()) | 265 | if (cpu_is_u5500()) |
| 264 | db5500_prcmu_config_abb_event_readout(abb_events); | 266 | db5500_prcmu_config_abb_event_readout(abb_events); |
| 265 | else | 267 | else |
| 266 | db8500_prcmu_config_abb_event_readout(abb_events); | 268 | db8500_prcmu_config_abb_event_readout(abb_events); |
| @@ -268,7 +270,7 @@ static inline void prcmu_config_abb_event_readout(u32 abb_events) | |||
| 268 | 270 | ||
| 269 | static inline void prcmu_get_abb_event_buffer(void __iomem **buf) | 271 | static inline void prcmu_get_abb_event_buffer(void __iomem **buf) |
| 270 | { | 272 | { |
| 271 | if (machine_is_u5500()) | 273 | if (cpu_is_u5500()) |
| 272 | db5500_prcmu_get_abb_event_buffer(buf); | 274 | db5500_prcmu_get_abb_event_buffer(buf); |
| 273 | else | 275 | else |
| 274 | db8500_prcmu_get_abb_event_buffer(buf); | 276 | db8500_prcmu_get_abb_event_buffer(buf); |
| @@ -281,20 +283,34 @@ int prcmu_config_clkout(u8 clkout, u8 source, u8 div); | |||
| 281 | 283 | ||
| 282 | static inline int prcmu_request_clock(u8 clock, bool enable) | 284 | static inline int prcmu_request_clock(u8 clock, bool enable) |
| 283 | { | 285 | { |
| 284 | if (machine_is_u5500()) | 286 | if (cpu_is_u5500()) |
| 285 | return db5500_prcmu_request_clock(clock, enable); | 287 | return db5500_prcmu_request_clock(clock, enable); |
| 286 | else | 288 | else |
| 287 | return db8500_prcmu_request_clock(clock, enable); | 289 | return db8500_prcmu_request_clock(clock, enable); |
| 288 | } | 290 | } |
| 289 | 291 | ||
| 290 | int prcmu_set_ape_opp(u8 opp); | 292 | unsigned long prcmu_clock_rate(u8 clock); |
| 291 | int prcmu_get_ape_opp(void); | 293 | long prcmu_round_clock_rate(u8 clock, unsigned long rate); |
| 292 | int prcmu_set_ddr_opp(u8 opp); | 294 | int prcmu_set_clock_rate(u8 clock, unsigned long rate); |
| 293 | int prcmu_get_ddr_opp(void); | 295 | |
| 296 | static inline int prcmu_set_ddr_opp(u8 opp) | ||
| 297 | { | ||
| 298 | if (cpu_is_u5500()) | ||
| 299 | return -EINVAL; | ||
| 300 | else | ||
| 301 | return db8500_prcmu_set_ddr_opp(opp); | ||
| 302 | } | ||
| 303 | static inline int prcmu_get_ddr_opp(void) | ||
| 304 | { | ||
| 305 | if (cpu_is_u5500()) | ||
| 306 | return -EINVAL; | ||
| 307 | else | ||
| 308 | return db8500_prcmu_get_ddr_opp(); | ||
| 309 | } | ||
| 294 | 310 | ||
| 295 | static inline int prcmu_set_arm_opp(u8 opp) | 311 | static inline int prcmu_set_arm_opp(u8 opp) |
| 296 | { | 312 | { |
| 297 | if (machine_is_u5500()) | 313 | if (cpu_is_u5500()) |
| 298 | return -EINVAL; | 314 | return -EINVAL; |
| 299 | else | 315 | else |
| 300 | return db8500_prcmu_set_arm_opp(opp); | 316 | return db8500_prcmu_set_arm_opp(opp); |
| @@ -302,15 +318,31 @@ static inline int prcmu_set_arm_opp(u8 opp) | |||
| 302 | 318 | ||
| 303 | static inline int prcmu_get_arm_opp(void) | 319 | static inline int prcmu_get_arm_opp(void) |
| 304 | { | 320 | { |
| 305 | if (machine_is_u5500()) | 321 | if (cpu_is_u5500()) |
| 306 | return -EINVAL; | 322 | return -EINVAL; |
| 307 | else | 323 | else |
| 308 | return db8500_prcmu_get_arm_opp(); | 324 | return db8500_prcmu_get_arm_opp(); |
| 309 | } | 325 | } |
| 310 | 326 | ||
| 327 | static inline int prcmu_set_ape_opp(u8 opp) | ||
| 328 | { | ||
| 329 | if (cpu_is_u5500()) | ||
| 330 | return -EINVAL; | ||
| 331 | else | ||
| 332 | return db8500_prcmu_set_ape_opp(opp); | ||
| 333 | } | ||
| 334 | |||
| 335 | static inline int prcmu_get_ape_opp(void) | ||
| 336 | { | ||
| 337 | if (cpu_is_u5500()) | ||
| 338 | return -EINVAL; | ||
| 339 | else | ||
| 340 | return db8500_prcmu_get_ape_opp(); | ||
| 341 | } | ||
| 342 | |||
| 311 | static inline void prcmu_system_reset(u16 reset_code) | 343 | static inline void prcmu_system_reset(u16 reset_code) |
| 312 | { | 344 | { |
| 313 | if (machine_is_u5500()) | 345 | if (cpu_is_u5500()) |
| 314 | return db5500_prcmu_system_reset(reset_code); | 346 | return db5500_prcmu_system_reset(reset_code); |
| 315 | else | 347 | else |
| 316 | return db8500_prcmu_system_reset(reset_code); | 348 | return db8500_prcmu_system_reset(reset_code); |
| @@ -318,7 +350,7 @@ static inline void prcmu_system_reset(u16 reset_code) | |||
| 318 | 350 | ||
| 319 | static inline u16 prcmu_get_reset_code(void) | 351 | static inline u16 prcmu_get_reset_code(void) |
| 320 | { | 352 | { |
| 321 | if (machine_is_u5500()) | 353 | if (cpu_is_u5500()) |
| 322 | return db5500_prcmu_get_reset_code(); | 354 | return db5500_prcmu_get_reset_code(); |
| 323 | else | 355 | else |
| 324 | return db8500_prcmu_get_reset_code(); | 356 | return db8500_prcmu_get_reset_code(); |
| @@ -326,10 +358,17 @@ static inline u16 prcmu_get_reset_code(void) | |||
| 326 | 358 | ||
| 327 | void prcmu_ac_wake_req(void); | 359 | void prcmu_ac_wake_req(void); |
| 328 | void prcmu_ac_sleep_req(void); | 360 | void prcmu_ac_sleep_req(void); |
| 329 | void prcmu_modem_reset(void); | 361 | static inline void prcmu_modem_reset(void) |
| 362 | { | ||
| 363 | if (cpu_is_u5500()) | ||
| 364 | return; | ||
| 365 | else | ||
| 366 | return db8500_prcmu_modem_reset(); | ||
| 367 | } | ||
| 368 | |||
| 330 | static inline bool prcmu_is_ac_wake_requested(void) | 369 | static inline bool prcmu_is_ac_wake_requested(void) |
| 331 | { | 370 | { |
| 332 | if (machine_is_u5500()) | 371 | if (cpu_is_u5500()) |
| 333 | return db5500_prcmu_is_ac_wake_requested(); | 372 | return db5500_prcmu_is_ac_wake_requested(); |
| 334 | else | 373 | else |
| 335 | return db8500_prcmu_is_ac_wake_requested(); | 374 | return db8500_prcmu_is_ac_wake_requested(); |
| @@ -337,7 +376,7 @@ static inline bool prcmu_is_ac_wake_requested(void) | |||
| 337 | 376 | ||
| 338 | static inline int prcmu_set_display_clocks(void) | 377 | static inline int prcmu_set_display_clocks(void) |
| 339 | { | 378 | { |
| 340 | if (machine_is_u5500()) | 379 | if (cpu_is_u5500()) |
| 341 | return db5500_prcmu_set_display_clocks(); | 380 | return db5500_prcmu_set_display_clocks(); |
| 342 | else | 381 | else |
| 343 | return db8500_prcmu_set_display_clocks(); | 382 | return db8500_prcmu_set_display_clocks(); |
| @@ -345,7 +384,7 @@ static inline int prcmu_set_display_clocks(void) | |||
| 345 | 384 | ||
| 346 | static inline int prcmu_disable_dsipll(void) | 385 | static inline int prcmu_disable_dsipll(void) |
| 347 | { | 386 | { |
| 348 | if (machine_is_u5500()) | 387 | if (cpu_is_u5500()) |
| 349 | return db5500_prcmu_disable_dsipll(); | 388 | return db5500_prcmu_disable_dsipll(); |
| 350 | else | 389 | else |
| 351 | return db8500_prcmu_disable_dsipll(); | 390 | return db8500_prcmu_disable_dsipll(); |
| @@ -353,7 +392,7 @@ static inline int prcmu_disable_dsipll(void) | |||
| 353 | 392 | ||
| 354 | static inline int prcmu_enable_dsipll(void) | 393 | static inline int prcmu_enable_dsipll(void) |
| 355 | { | 394 | { |
| 356 | if (machine_is_u5500()) | 395 | if (cpu_is_u5500()) |
| 357 | return db5500_prcmu_enable_dsipll(); | 396 | return db5500_prcmu_enable_dsipll(); |
| 358 | else | 397 | else |
| 359 | return db8500_prcmu_enable_dsipll(); | 398 | return db8500_prcmu_enable_dsipll(); |
| @@ -361,11 +400,83 @@ static inline int prcmu_enable_dsipll(void) | |||
| 361 | 400 | ||
| 362 | static inline int prcmu_config_esram0_deep_sleep(u8 state) | 401 | static inline int prcmu_config_esram0_deep_sleep(u8 state) |
| 363 | { | 402 | { |
| 364 | if (machine_is_u5500()) | 403 | if (cpu_is_u5500()) |
| 365 | return -EINVAL; | 404 | return -EINVAL; |
| 366 | else | 405 | else |
| 367 | return db8500_prcmu_config_esram0_deep_sleep(state); | 406 | return db8500_prcmu_config_esram0_deep_sleep(state); |
| 368 | } | 407 | } |
| 408 | |||
| 409 | static inline int prcmu_config_hotdog(u8 threshold) | ||
| 410 | { | ||
| 411 | if (cpu_is_u5500()) | ||
| 412 | return -EINVAL; | ||
| 413 | else | ||
| 414 | return db8500_prcmu_config_hotdog(threshold); | ||
| 415 | } | ||
| 416 | |||
| 417 | static inline int prcmu_config_hotmon(u8 low, u8 high) | ||
| 418 | { | ||
| 419 | if (cpu_is_u5500()) | ||
| 420 | return -EINVAL; | ||
| 421 | else | ||
| 422 | return db8500_prcmu_config_hotmon(low, high); | ||
| 423 | } | ||
| 424 | |||
| 425 | static inline int prcmu_start_temp_sense(u16 cycles32k) | ||
| 426 | { | ||
| 427 | if (cpu_is_u5500()) | ||
| 428 | return -EINVAL; | ||
| 429 | else | ||
| 430 | return db8500_prcmu_start_temp_sense(cycles32k); | ||
| 431 | } | ||
| 432 | |||
| 433 | static inline int prcmu_stop_temp_sense(void) | ||
| 434 | { | ||
| 435 | if (cpu_is_u5500()) | ||
| 436 | return -EINVAL; | ||
| 437 | else | ||
| 438 | return db8500_prcmu_stop_temp_sense(); | ||
| 439 | } | ||
| 440 | |||
| 441 | static inline int prcmu_enable_a9wdog(u8 id) | ||
| 442 | { | ||
| 443 | if (cpu_is_u5500()) | ||
| 444 | return -EINVAL; | ||
| 445 | else | ||
| 446 | return db8500_prcmu_enable_a9wdog(id); | ||
| 447 | } | ||
| 448 | |||
| 449 | static inline int prcmu_disable_a9wdog(u8 id) | ||
| 450 | { | ||
| 451 | if (cpu_is_u5500()) | ||
| 452 | return -EINVAL; | ||
| 453 | else | ||
| 454 | return db8500_prcmu_disable_a9wdog(id); | ||
| 455 | } | ||
| 456 | |||
| 457 | static inline int prcmu_kick_a9wdog(u8 id) | ||
| 458 | { | ||
| 459 | if (cpu_is_u5500()) | ||
| 460 | return -EINVAL; | ||
| 461 | else | ||
| 462 | return db8500_prcmu_kick_a9wdog(id); | ||
| 463 | } | ||
| 464 | |||
| 465 | static inline int prcmu_load_a9wdog(u8 id, u32 timeout) | ||
| 466 | { | ||
| 467 | if (cpu_is_u5500()) | ||
| 468 | return -EINVAL; | ||
| 469 | else | ||
| 470 | return db8500_prcmu_load_a9wdog(id, timeout); | ||
| 471 | } | ||
| 472 | |||
| 473 | static inline int prcmu_config_a9wdog(u8 num, bool sleep_auto_off) | ||
| 474 | { | ||
| 475 | if (cpu_is_u5500()) | ||
| 476 | return -EINVAL; | ||
| 477 | else | ||
| 478 | return db8500_prcmu_config_a9wdog(num, sleep_auto_off); | ||
| 479 | } | ||
| 369 | #else | 480 | #else |
| 370 | 481 | ||
| 371 | static inline void __init prcmu_early_init(void) {} | 482 | static inline void __init prcmu_early_init(void) {} |
| @@ -480,6 +591,26 @@ static inline void prcmu_get_abb_event_buffer(void __iomem **buf) | |||
| 480 | *buf = NULL; | 591 | *buf = NULL; |
| 481 | } | 592 | } |
| 482 | 593 | ||
| 594 | static inline int prcmu_config_hotdog(u8 threshold) | ||
| 595 | { | ||
| 596 | return 0; | ||
| 597 | } | ||
| 598 | |||
| 599 | static inline int prcmu_config_hotmon(u8 low, u8 high) | ||
| 600 | { | ||
| 601 | return 0; | ||
| 602 | } | ||
| 603 | |||
| 604 | static inline int prcmu_start_temp_sense(u16 cycles32k) | ||
| 605 | { | ||
| 606 | return 0; | ||
| 607 | } | ||
| 608 | |||
| 609 | static inline int prcmu_stop_temp_sense(void) | ||
| 610 | { | ||
| 611 | return 0; | ||
| 612 | } | ||
| 613 | |||
| 483 | #endif | 614 | #endif |
| 484 | 615 | ||
| 485 | /* PRCMU QoS APE OPP class */ | 616 | /* PRCMU QoS APE OPP class */ |
