diff options
author | David Woodhouse <dwmw2@shinybook.infradead.org> | 2006-04-30 15:34:39 -0400 |
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committer | David Woodhouse <dwmw2@infradead.org> | 2006-04-30 15:34:39 -0400 |
commit | b07019f29328ebb1b48d3faf952b84f07ec9b973 (patch) | |
tree | 99fbd8379fb9fe17c5b06c74871f71207ebb072e /include/asm-ppc | |
parent | c3ce7e203af5d8eab7c3390fc991a1fcb152f741 (diff) | |
parent | e0a515bc6a2188f02916e976f419a8640312e32a (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'include/asm-ppc')
-rw-r--r-- | include/asm-ppc/ppc_sys.h | 2 | ||||
-rw-r--r-- | include/asm-ppc/reg_booke.h | 1 |
2 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h index 4b94f7059eb..40f197af650 100644 --- a/include/asm-ppc/ppc_sys.h +++ b/include/asm-ppc/ppc_sys.h | |||
@@ -39,6 +39,8 @@ | |||
39 | #error "need definition of ppc_sys_devices" | 39 | #error "need definition of ppc_sys_devices" |
40 | #endif | 40 | #endif |
41 | 41 | ||
42 | #define PPC_SYS_IORESOURCE_FIXUPPED 0x00000001 | ||
43 | |||
42 | struct ppc_sys_spec { | 44 | struct ppc_sys_spec { |
43 | /* PPC sys is matched via (ID & mask) == value, id could be | 45 | /* PPC sys is matched via (ID & mask) == value, id could be |
44 | * PVR, SVR, IMMR, * etc. */ | 46 | * PVR, SVR, IMMR, * etc. */ |
diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h index 00ad9c754c7..4944c0fb8be 100644 --- a/include/asm-ppc/reg_booke.h +++ b/include/asm-ppc/reg_booke.h | |||
@@ -237,6 +237,7 @@ do { \ | |||
237 | #endif | 237 | #endif |
238 | 238 | ||
239 | /* Bit definitions for CCR1. */ | 239 | /* Bit definitions for CCR1. */ |
240 | #define CCR1_DPC 0x00000100 /* Disable L1 I-Cache/D-Cache parity checking */ | ||
240 | #define CCR1_TCS 0x00000080 /* Timer Clock Select */ | 241 | #define CCR1_TCS 0x00000080 /* Timer Clock Select */ |
241 | 242 | ||
242 | /* Bit definitions for the MCSR. */ | 243 | /* Bit definitions for the MCSR. */ |