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authorH. J. Lu <hjl@lucon.org>2005-09-06 18:16:49 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-09-07 19:57:21 -0400
commit36d57ac4a818cb4aa3edbdf63ad2ebc31106f925 (patch)
tree445eda00ee5974a65e21152cd240fb604c6d112d /include/asm-ppc64
parent32605a18152b246df483fadc1c23854addde8755 (diff)
[PATCH] auxiliary vector cleanups
The size of auxiliary vector is fixed at 42 in linux/sched.h. But it isn't very obvious when looking at linux/elf.h. This patch adds AT_VECTOR_SIZE so that we can change it if necessary when a new vector is added. Because of include file ordering problems, doing this necessitated the extraction of the AT_* symbols into a standalone header file. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-ppc64')
-rw-r--r--include/asm-ppc64/auxvec.h19
-rw-r--r--include/asm-ppc64/elf.h16
2 files changed, 20 insertions, 15 deletions
diff --git a/include/asm-ppc64/auxvec.h b/include/asm-ppc64/auxvec.h
new file mode 100644
index 00000000000..ac6381a106e
--- /dev/null
+++ b/include/asm-ppc64/auxvec.h
@@ -0,0 +1,19 @@
1#ifndef __PPC64_AUXVEC_H
2#define __PPC64_AUXVEC_H
3
4/*
5 * We need to put in some extra aux table entries to tell glibc what
6 * the cache block size is, so it can use the dcbz instruction safely.
7 */
8#define AT_DCACHEBSIZE 19
9#define AT_ICACHEBSIZE 20
10#define AT_UCACHEBSIZE 21
11/* A special ignored type value for PPC, for glibc compatibility. */
12#define AT_IGNOREPPC 22
13
14/* The vDSO location. We have to use the same value as x86 for glibc's
15 * sake :-)
16 */
17#define AT_SYSINFO_EHDR 33
18
19#endif /* __PPC64_AUXVEC_H */
diff --git a/include/asm-ppc64/elf.h b/include/asm-ppc64/elf.h
index 085eedb956f..c919a89343d 100644
--- a/include/asm-ppc64/elf.h
+++ b/include/asm-ppc64/elf.h
@@ -4,6 +4,7 @@
4#include <asm/types.h> 4#include <asm/types.h>
5#include <asm/ptrace.h> 5#include <asm/ptrace.h>
6#include <asm/cputable.h> 6#include <asm/cputable.h>
7#include <asm/auxvec.h>
7 8
8/* PowerPC relocations defined by the ABIs */ 9/* PowerPC relocations defined by the ABIs */
9#define R_PPC_NONE 0 10#define R_PPC_NONE 0
@@ -237,21 +238,6 @@ do { \
237 238
238#endif 239#endif
239 240
240/*
241 * We need to put in some extra aux table entries to tell glibc what
242 * the cache block size is, so it can use the dcbz instruction safely.
243 */
244#define AT_DCACHEBSIZE 19
245#define AT_ICACHEBSIZE 20
246#define AT_UCACHEBSIZE 21
247/* A special ignored type value for PPC, for glibc compatibility. */
248#define AT_IGNOREPPC 22
249
250/* The vDSO location. We have to use the same value as x86 for glibc's
251 * sake :-)
252 */
253#define AT_SYSINFO_EHDR 33
254
255extern int dcache_bsize; 241extern int dcache_bsize;
256extern int icache_bsize; 242extern int icache_bsize;
257extern int ucache_bsize; 243extern int ucache_bsize;