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authorRalf Baechle <ralf@linux-mips.org>2007-10-17 10:38:30 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-17 13:28:48 -0400
commit9d360ab4a7568a8d177280f651a8a772ae52b9b9 (patch)
tree39a7d2791d3ed0fd5b3369064265834e6397ecf2 /include/asm-mips/mach-db1x00
parent820b2d853bfa431c0c2ccba5adbae621b0303c42 (diff)
[MIPS] Alchemy: Renumber interrupts so irq_cpu can work.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-db1x00')
-rw-r--r--include/asm-mips/mach-db1x00/db1200.h49
1 files changed, 27 insertions, 22 deletions
diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h
index 647fdb54cc1..050eae87ff0 100644
--- a/include/asm-mips/mach-db1x00/db1200.h
+++ b/include/asm-mips/mach-db1x00/db1200.h
@@ -181,29 +181,34 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
181#define NAND_PHYS_ADDR 0x20000000 181#define NAND_PHYS_ADDR 0x20000000
182 182
183/* 183/*
184 * External Interrupts for Pb1200 as of 8/6/2004. 184 * External Interrupts for Pb1200 as of 8/6/2004.
185 * Bit positions in the CPLD registers can be calculated by taking 185 * Bit positions in the CPLD registers can be calculated by taking
186 * the interrupt define and subtracting the DB1200_INT_BEGIN value. 186 * the interrupt define and subtracting the DB1200_INT_BEGIN value.
187 * *example: IDE bis pos is = 64 - 64 187 *
188 ETH bit pos is = 65 - 64 188 * Example: IDE bis pos is = 64 - 64
189 * ETH bit pos is = 65 - 64
189 */ 190 */
190#define DB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1) 191enum external_pb1200_ints {
191#define DB1200_IDE_INT (DB1200_INT_BEGIN + 0) 192 DB1200_INT_BEGIN = AU1000_MAX_INTR + 1,
192#define DB1200_ETH_INT (DB1200_INT_BEGIN + 1) 193
193#define DB1200_PC0_INT (DB1200_INT_BEGIN + 2) 194 DB1200_IDE_INT = DB1200_INT_BEGIN,
194#define DB1200_PC0_STSCHG_INT (DB1200_INT_BEGIN + 3) 195 DB1200_ETH_INT,
195#define DB1200_PC1_INT (DB1200_INT_BEGIN + 4) 196 DB1200_PC0_INT,
196#define DB1200_PC1_STSCHG_INT (DB1200_INT_BEGIN + 5) 197 DB1200_PC0_STSCHG_INT,
197#define DB1200_DC_INT (DB1200_INT_BEGIN + 6) 198 DB1200_PC1_INT,
198#define DB1200_FLASHBUSY_INT (DB1200_INT_BEGIN + 7) 199 DB1200_PC1_STSCHG_INT,
199#define DB1200_PC0_INSERT_INT (DB1200_INT_BEGIN + 8) 200 DB1200_DC_INT,
200#define DB1200_PC0_EJECT_INT (DB1200_INT_BEGIN + 9) 201 DB1200_FLASHBUSY_INT,
201#define DB1200_PC1_INSERT_INT (DB1200_INT_BEGIN + 10) 202 DB1200_PC0_INSERT_INT,
202#define DB1200_PC1_EJECT_INT (DB1200_INT_BEGIN + 11) 203 DB1200_PC0_EJECT_INT,
203#define DB1200_SD0_INSERT_INT (DB1200_INT_BEGIN + 12) 204 DB1200_PC1_INSERT_INT,
204#define DB1200_SD0_EJECT_INT (DB1200_INT_BEGIN + 13) 205 DB1200_PC1_EJECT_INT,
205 206 DB1200_SD0_INSERT_INT,
206#define DB1200_INT_END (DB1200_INT_BEGIN + 15) 207 DB1200_SD0_EJECT_INT,
208
209 DB1200_INT_END = DB1200_INT_BEGIN + 15,
210};
211
207 212
208/* For drivers/pcmcia/au1000_db1x00.c */ 213/* For drivers/pcmcia/au1000_db1x00.c */
209 214