Linux-2.6.12-rc2

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!

1 files changed, 67 insertions, 0 deletions

diff --git a/include/asm-mips/i8259.h b/include/asm-mips/i8259.h
new file mode 100644
index 00000000000..0214abe3f0a
--- /dev/null
+++ b/include/asm-mips/i8259.h
@@ -0,0 +1,67 @@
+/*
+ *      include/asm-mips/i8259.h
+ *
+ *      i8259A interrupt definitions.
+ *
+ *      Copyright (C) 2003  Maciej W. Rozycki
+ *      Copyright (C) 2003  Ralf Baechle <ralf@linux-mips.org>
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ */
+#ifndef _ASM_I8259_H
+#define _ASM_I8259_H
+
+#include <linux/compiler.h>
+#include <linux/spinlock.h>
+
+#include <asm/io.h>
+
+extern spinlock_t i8259A_lock;
+
+extern void init_i8259_irqs(void);
+
+/*
+ * Do the traditional i8259 interrupt polling thing.  This is for the few
+ * cases where no better interrupt acknowledge method is available and we
+ * absolutely must touch the i8259.
+ */
+static inline int i8259_irq(void)
+{
+        int irq;
+
+        spin_lock(&i8259A_lock);
+
+        /* Perform an interrupt acknowledge cycle on controller 1. */
+        outb(0x0C, 0x20);               /* prepare for poll */
+        irq = inb(0x20) & 7;
+        if (irq == 2) {
+                /*
+                 * Interrupt is cascaded so perform interrupt
+                 * acknowledge on controller 2.
+                 */
+                outb(0x0C, 0xA0);               /* prepare for poll */
+                irq = (inb(0xA0) & 7) + 8;
+        }
+
+        if (unlikely(irq == 7)) {
+                /*
+                 * This may be a spurious interrupt.
+                 *
+                 * Read the interrupt status register (ISR). If the most
+                 * significant bit is not set then there is no valid
+                 * interrupt.
+                 */
+                outb(0x0B, 0x20);               /* ISR register */
+                if(~inb(0x20) & 0x80)
+                        irq = -1;
+        }
+
+        spin_unlock(&i8259A_lock);
+
+        return irq;
+}
+
+#endif /* _ASM_I8259_H */