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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 10:48:13 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 10:48:13 -0400
commitc87d5d594736dd8b56df67e31846c7d7b8c41a8f (patch)
treea4496b74b932e55b544d040af2668e68abcb1e56 /include/asm-generic
parent094803e0aab3fe75bbf8202a8f4b5280eaade375 (diff)
parent4e29198e1cd7728c30c96a8483a6068c71b34e4e (diff)
Merge Qualcom Hexagon architecture
This is the fifth version of the patchset (with one tiny whitespace fix) to the Linux kernel to support the Qualcomm Hexagon architecture. Between now and the next pull requests, Richard Kuo should have his key signed, etc., and should be back on kernel.org. In the meantime, this got merged as a emailed patch-series. * Hexagon: (36 commits) Add extra arch overrides to asm-generic/checksum.h Hexagon: Add self to MAINTAINERS Hexagon: Add basic stacktrace functionality for Hexagon architecture. Hexagon: Add configuration and makefiles for the Hexagon architecture. Hexagon: Comet platform support Hexagon: kgdb support files Hexagon: Add page-fault support. Hexagon: Add page table header files & etc. Hexagon: Add ioremap support Hexagon: Provide DMA implementation Hexagon: Implement basic TLB management routines for Hexagon. Hexagon: Implement basic cache-flush support Hexagon: Provide basic implementation and/or stubs for I/O routines. Hexagon: Add user access functions Hexagon: Add locking types and functions Hexagon: Add SMP support Hexagon: Provide basic debugging and system trap support. Hexagon: Add ptrace support Hexagon: Add time and timer functions Hexagon: Add interrupts ...
Diffstat (limited to 'include/asm-generic')
-rw-r--r--include/asm-generic/checksum.h4
-rw-r--r--include/asm-generic/rwsem.h132
2 files changed, 136 insertions, 0 deletions
diff --git a/include/asm-generic/checksum.h b/include/asm-generic/checksum.h
index 4647c762d97..c084767c88b 100644
--- a/include/asm-generic/checksum.h
+++ b/include/asm-generic/checksum.h
@@ -33,8 +33,10 @@ extern __wsum csum_partial_copy(const void *src, void *dst, int len, __wsum sum)
33extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst, 33extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
34 int len, __wsum sum, int *csum_err); 34 int len, __wsum sum, int *csum_err);
35 35
36#ifndef csum_partial_copy_nocheck
36#define csum_partial_copy_nocheck(src, dst, len, sum) \ 37#define csum_partial_copy_nocheck(src, dst, len, sum) \
37 csum_partial_copy((src), (dst), (len), (sum)) 38 csum_partial_copy((src), (dst), (len), (sum))
39#endif
38 40
39/* 41/*
40 * This is a version of ip_compute_csum() optimized for IP headers, 42 * This is a version of ip_compute_csum() optimized for IP headers,
@@ -63,12 +65,14 @@ csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
63 unsigned short proto, __wsum sum); 65 unsigned short proto, __wsum sum);
64#endif 66#endif
65 67
68#ifndef csum_tcpudp_magic
66static inline __sum16 69static inline __sum16
67csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, 70csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
68 unsigned short proto, __wsum sum) 71 unsigned short proto, __wsum sum)
69{ 72{
70 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum)); 73 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
71} 74}
75#endif
72 76
73/* 77/*
74 * this routine is used for miscellaneous IP-like checksums, mainly 78 * this routine is used for miscellaneous IP-like checksums, mainly
diff --git a/include/asm-generic/rwsem.h b/include/asm-generic/rwsem.h
new file mode 100644
index 00000000000..bb1e2cdeb9b
--- /dev/null
+++ b/include/asm-generic/rwsem.h
@@ -0,0 +1,132 @@
1#ifndef _ASM_POWERPC_RWSEM_H
2#define _ASM_POWERPC_RWSEM_H
3
4#ifndef _LINUX_RWSEM_H
5#error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
6#endif
7
8#ifdef __KERNEL__
9
10/*
11 * R/W semaphores for PPC using the stuff in lib/rwsem.c.
12 * Adapted largely from include/asm-i386/rwsem.h
13 * by Paul Mackerras <paulus@samba.org>.
14 */
15
16/*
17 * the semaphore definition
18 */
19#ifdef CONFIG_PPC64
20# define RWSEM_ACTIVE_MASK 0xffffffffL
21#else
22# define RWSEM_ACTIVE_MASK 0x0000ffffL
23#endif
24
25#define RWSEM_UNLOCKED_VALUE 0x00000000L
26#define RWSEM_ACTIVE_BIAS 0x00000001L
27#define RWSEM_WAITING_BIAS (-RWSEM_ACTIVE_MASK-1)
28#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
29#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
30
31/*
32 * lock for reading
33 */
34static inline void __down_read(struct rw_semaphore *sem)
35{
36 if (unlikely(atomic_long_inc_return((atomic_long_t *)&sem->count) <= 0))
37 rwsem_down_read_failed(sem);
38}
39
40static inline int __down_read_trylock(struct rw_semaphore *sem)
41{
42 long tmp;
43
44 while ((tmp = sem->count) >= 0) {
45 if (tmp == cmpxchg(&sem->count, tmp,
46 tmp + RWSEM_ACTIVE_READ_BIAS)) {
47 return 1;
48 }
49 }
50 return 0;
51}
52
53/*
54 * lock for writing
55 */
56static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
57{
58 long tmp;
59
60 tmp = atomic_long_add_return(RWSEM_ACTIVE_WRITE_BIAS,
61 (atomic_long_t *)&sem->count);
62 if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS))
63 rwsem_down_write_failed(sem);
64}
65
66static inline void __down_write(struct rw_semaphore *sem)
67{
68 __down_write_nested(sem, 0);
69}
70
71static inline int __down_write_trylock(struct rw_semaphore *sem)
72{
73 long tmp;
74
75 tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
76 RWSEM_ACTIVE_WRITE_BIAS);
77 return tmp == RWSEM_UNLOCKED_VALUE;
78}
79
80/*
81 * unlock after reading
82 */
83static inline void __up_read(struct rw_semaphore *sem)
84{
85 long tmp;
86
87 tmp = atomic_long_dec_return((atomic_long_t *)&sem->count);
88 if (unlikely(tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0))
89 rwsem_wake(sem);
90}
91
92/*
93 * unlock after writing
94 */
95static inline void __up_write(struct rw_semaphore *sem)
96{
97 if (unlikely(atomic_long_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
98 (atomic_long_t *)&sem->count) < 0))
99 rwsem_wake(sem);
100}
101
102/*
103 * implement atomic add functionality
104 */
105static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)
106{
107 atomic_long_add(delta, (atomic_long_t *)&sem->count);
108}
109
110/*
111 * downgrade write lock to read lock
112 */
113static inline void __downgrade_write(struct rw_semaphore *sem)
114{
115 long tmp;
116
117 tmp = atomic_long_add_return(-RWSEM_WAITING_BIAS,
118 (atomic_long_t *)&sem->count);
119 if (tmp < 0)
120 rwsem_downgrade_wake(sem);
121}
122
123/*
124 * implement exchange and add functionality
125 */
126static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
127{
128 return atomic_long_add_return(delta, (atomic_long_t *)&sem->count);
129}
130
131#endif /* __KERNEL__ */
132#endif /* _ASM_POWERPC_RWSEM_H */