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authorChris Wilson <chris@chris-wilson.co.uk>2010-07-20 18:44:45 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2010-09-18 10:46:19 -0400
commitf899fc64cda8569d0529452aafc0da31c042df2e (patch)
tree61b6d32abe3524b83abc9d8b9382e3f82225cd64 /drivers
parent373a3cf744c774478f44921c50011b896ab08f9d (diff)
drm/i915: use GMBUS to manage i2c links
Use the GMBUS interface rather than direct bit banging to grab the EDID over DDC (and for other forms of auxiliary communication with external display controllers). The hope is that this method will be much faster and more reliable than bit banging for fetching EDIDs from buggy monitors or through switches, though we still preserve the bit banging as a fallback in case GMBUS fails. Based on an original patch by Jesse Barnes. Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/drm_edid.c1
-rw-r--r--drivers/gpu/drm/i915/dvo_ch7017.c9
-rw-r--r--drivers/gpu/drm/i915/dvo_ch7xxx.c10
-rw-r--r--drivers/gpu/drm/i915/dvo_ivch.c10
-rw-r--r--drivers/gpu/drm/i915/dvo_sil164.c10
-rw-r--r--drivers/gpu/drm/i915/dvo_tfp410.c10
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c2
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h14
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h51
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c4
-rw-r--r--drivers/gpu/drm/i915/intel_bios.c16
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c48
-rw-r--r--drivers/gpu/drm/i915/intel_display.c6
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c3
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h19
-rw-r--r--drivers/gpu/drm/i915/intel_dvo.c33
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c38
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c381
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c16
-rw-r--r--drivers/gpu/drm/i915/intel_modes.c16
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c163
21 files changed, 441 insertions, 419 deletions
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 96e96310822..fd033ebbdf8 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -30,7 +30,6 @@
30#include <linux/kernel.h> 30#include <linux/kernel.h>
31#include <linux/slab.h> 31#include <linux/slab.h>
32#include <linux/i2c.h> 32#include <linux/i2c.h>
33#include <linux/i2c-algo-bit.h>
34#include "drmP.h" 33#include "drmP.h"
35#include "drm_edid.h" 34#include "drm_edid.h"
36#include "drm_edid_modes.h" 35#include "drm_edid_modes.h"
diff --git a/drivers/gpu/drm/i915/dvo_ch7017.c b/drivers/gpu/drm/i915/dvo_ch7017.c
index 14d59804acd..0bc8ce1ad9a 100644
--- a/drivers/gpu/drm/i915/dvo_ch7017.c
+++ b/drivers/gpu/drm/i915/dvo_ch7017.c
@@ -168,7 +168,6 @@ static void ch7017_dpms(struct intel_dvo_device *dvo, int mode);
168static bool ch7017_read(struct intel_dvo_device *dvo, int addr, uint8_t *val) 168static bool ch7017_read(struct intel_dvo_device *dvo, int addr, uint8_t *val)
169{ 169{
170 struct i2c_adapter *adapter = dvo->i2c_bus; 170 struct i2c_adapter *adapter = dvo->i2c_bus;
171 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
172 u8 out_buf[2]; 171 u8 out_buf[2];
173 u8 in_buf[2]; 172 u8 in_buf[2];
174 173
@@ -190,7 +189,7 @@ static bool ch7017_read(struct intel_dvo_device *dvo, int addr, uint8_t *val)
190 out_buf[0] = addr; 189 out_buf[0] = addr;
191 out_buf[1] = 0; 190 out_buf[1] = 0;
192 191
193 if (i2c_transfer(&i2cbus->adapter, msgs, 2) == 2) { 192 if (i2c_transfer(adapter, msgs, 2) == 2) {
194 *val= in_buf[0]; 193 *val= in_buf[0];
195 return true; 194 return true;
196 }; 195 };
@@ -201,7 +200,6 @@ static bool ch7017_read(struct intel_dvo_device *dvo, int addr, uint8_t *val)
201static bool ch7017_write(struct intel_dvo_device *dvo, int addr, uint8_t val) 200static bool ch7017_write(struct intel_dvo_device *dvo, int addr, uint8_t val)
202{ 201{
203 struct i2c_adapter *adapter = dvo->i2c_bus; 202 struct i2c_adapter *adapter = dvo->i2c_bus;
204 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
205 uint8_t out_buf[2]; 203 uint8_t out_buf[2];
206 struct i2c_msg msg = { 204 struct i2c_msg msg = {
207 .addr = dvo->slave_addr, 205 .addr = dvo->slave_addr,
@@ -213,7 +211,7 @@ static bool ch7017_write(struct intel_dvo_device *dvo, int addr, uint8_t val)
213 out_buf[0] = addr; 211 out_buf[0] = addr;
214 out_buf[1] = val; 212 out_buf[1] = val;
215 213
216 if (i2c_transfer(&i2cbus->adapter, &msg, 1) == 1) 214 if (i2c_transfer(adapter, &msg, 1) == 1)
217 return true; 215 return true;
218 216
219 return false; 217 return false;
@@ -223,7 +221,6 @@ static bool ch7017_write(struct intel_dvo_device *dvo, int addr, uint8_t val)
223static bool ch7017_init(struct intel_dvo_device *dvo, 221static bool ch7017_init(struct intel_dvo_device *dvo,
224 struct i2c_adapter *adapter) 222 struct i2c_adapter *adapter)
225{ 223{
226 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
227 struct ch7017_priv *priv; 224 struct ch7017_priv *priv;
228 uint8_t val; 225 uint8_t val;
229 226
@@ -242,7 +239,7 @@ static bool ch7017_init(struct intel_dvo_device *dvo,
242 val != CH7019_DEVICE_ID_VALUE) { 239 val != CH7019_DEVICE_ID_VALUE) {
243 DRM_DEBUG_KMS("ch701x not detected, got %d: from %s " 240 DRM_DEBUG_KMS("ch701x not detected, got %d: from %s "
244 "Slave %d.\n", 241 "Slave %d.\n",
245 val, i2cbus->adapter.name,dvo->slave_addr); 242 val, adapter->name,dvo->slave_addr);
246 goto fail; 243 goto fail;
247 } 244 }
248 245
diff --git a/drivers/gpu/drm/i915/dvo_ch7xxx.c b/drivers/gpu/drm/i915/dvo_ch7xxx.c
index 6f1944b2444..7eaa94e4ff0 100644
--- a/drivers/gpu/drm/i915/dvo_ch7xxx.c
+++ b/drivers/gpu/drm/i915/dvo_ch7xxx.c
@@ -113,7 +113,6 @@ static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
113{ 113{
114 struct ch7xxx_priv *ch7xxx= dvo->dev_priv; 114 struct ch7xxx_priv *ch7xxx= dvo->dev_priv;
115 struct i2c_adapter *adapter = dvo->i2c_bus; 115 struct i2c_adapter *adapter = dvo->i2c_bus;
116 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
117 u8 out_buf[2]; 116 u8 out_buf[2];
118 u8 in_buf[2]; 117 u8 in_buf[2];
119 118
@@ -135,14 +134,14 @@ static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
135 out_buf[0] = addr; 134 out_buf[0] = addr;
136 out_buf[1] = 0; 135 out_buf[1] = 0;
137 136
138 if (i2c_transfer(&i2cbus->adapter, msgs, 2) == 2) { 137 if (i2c_transfer(adapter, msgs, 2) == 2) {
139 *ch = in_buf[0]; 138 *ch = in_buf[0];
140 return true; 139 return true;
141 }; 140 };
142 141
143 if (!ch7xxx->quiet) { 142 if (!ch7xxx->quiet) {
144 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n", 143 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
145 addr, i2cbus->adapter.name, dvo->slave_addr); 144 addr, adapter->name, dvo->slave_addr);
146 } 145 }
147 return false; 146 return false;
148} 147}
@@ -152,7 +151,6 @@ static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
152{ 151{
153 struct ch7xxx_priv *ch7xxx = dvo->dev_priv; 152 struct ch7xxx_priv *ch7xxx = dvo->dev_priv;
154 struct i2c_adapter *adapter = dvo->i2c_bus; 153 struct i2c_adapter *adapter = dvo->i2c_bus;
155 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
156 uint8_t out_buf[2]; 154 uint8_t out_buf[2];
157 struct i2c_msg msg = { 155 struct i2c_msg msg = {
158 .addr = dvo->slave_addr, 156 .addr = dvo->slave_addr,
@@ -164,12 +162,12 @@ static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
164 out_buf[0] = addr; 162 out_buf[0] = addr;
165 out_buf[1] = ch; 163 out_buf[1] = ch;
166 164
167 if (i2c_transfer(&i2cbus->adapter, &msg, 1) == 1) 165 if (i2c_transfer(adapter, &msg, 1) == 1)
168 return true; 166 return true;
169 167
170 if (!ch7xxx->quiet) { 168 if (!ch7xxx->quiet) {
171 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n", 169 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
172 addr, i2cbus->adapter.name, dvo->slave_addr); 170 addr, adapter->name, dvo->slave_addr);
173 } 171 }
174 172
175 return false; 173 return false;
diff --git a/drivers/gpu/drm/i915/dvo_ivch.c b/drivers/gpu/drm/i915/dvo_ivch.c
index a2ec3f48720..a12ed9414cc 100644
--- a/drivers/gpu/drm/i915/dvo_ivch.c
+++ b/drivers/gpu/drm/i915/dvo_ivch.c
@@ -167,7 +167,6 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
167{ 167{
168 struct ivch_priv *priv = dvo->dev_priv; 168 struct ivch_priv *priv = dvo->dev_priv;
169 struct i2c_adapter *adapter = dvo->i2c_bus; 169 struct i2c_adapter *adapter = dvo->i2c_bus;
170 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
171 u8 out_buf[1]; 170 u8 out_buf[1];
172 u8 in_buf[2]; 171 u8 in_buf[2];
173 172
@@ -193,7 +192,7 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
193 192
194 out_buf[0] = addr; 193 out_buf[0] = addr;
195 194
196 if (i2c_transfer(&i2cbus->adapter, msgs, 3) == 3) { 195 if (i2c_transfer(adapter, msgs, 3) == 3) {
197 *data = (in_buf[1] << 8) | in_buf[0]; 196 *data = (in_buf[1] << 8) | in_buf[0];
198 return true; 197 return true;
199 }; 198 };
@@ -201,7 +200,7 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
201 if (!priv->quiet) { 200 if (!priv->quiet) {
202 DRM_DEBUG_KMS("Unable to read register 0x%02x from " 201 DRM_DEBUG_KMS("Unable to read register 0x%02x from "
203 "%s:%02x.\n", 202 "%s:%02x.\n",
204 addr, i2cbus->adapter.name, dvo->slave_addr); 203 addr, adapter->name, dvo->slave_addr);
205 } 204 }
206 return false; 205 return false;
207} 206}
@@ -211,7 +210,6 @@ static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
211{ 210{
212 struct ivch_priv *priv = dvo->dev_priv; 211 struct ivch_priv *priv = dvo->dev_priv;
213 struct i2c_adapter *adapter = dvo->i2c_bus; 212 struct i2c_adapter *adapter = dvo->i2c_bus;
214 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
215 u8 out_buf[3]; 213 u8 out_buf[3];
216 struct i2c_msg msg = { 214 struct i2c_msg msg = {
217 .addr = dvo->slave_addr, 215 .addr = dvo->slave_addr,
@@ -224,12 +222,12 @@ static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
224 out_buf[1] = data & 0xff; 222 out_buf[1] = data & 0xff;
225 out_buf[2] = data >> 8; 223 out_buf[2] = data >> 8;
226 224
227 if (i2c_transfer(&i2cbus->adapter, &msg, 1) == 1) 225 if (i2c_transfer(adapter, &msg, 1) == 1)
228 return true; 226 return true;
229 227
230 if (!priv->quiet) { 228 if (!priv->quiet) {
231 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n", 229 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
232 addr, i2cbus->adapter.name, dvo->slave_addr); 230 addr, adapter->name, dvo->slave_addr);
233 } 231 }
234 232
235 return false; 233 return false;
diff --git a/drivers/gpu/drm/i915/dvo_sil164.c b/drivers/gpu/drm/i915/dvo_sil164.c
index 9b8e6765cf2..e4b4091df94 100644
--- a/drivers/gpu/drm/i915/dvo_sil164.c
+++ b/drivers/gpu/drm/i915/dvo_sil164.c
@@ -69,7 +69,6 @@ static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
69{ 69{
70 struct sil164_priv *sil = dvo->dev_priv; 70 struct sil164_priv *sil = dvo->dev_priv;
71 struct i2c_adapter *adapter = dvo->i2c_bus; 71 struct i2c_adapter *adapter = dvo->i2c_bus;
72 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
73 u8 out_buf[2]; 72 u8 out_buf[2];
74 u8 in_buf[2]; 73 u8 in_buf[2];
75 74
@@ -91,14 +90,14 @@ static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
91 out_buf[0] = addr; 90 out_buf[0] = addr;
92 out_buf[1] = 0; 91 out_buf[1] = 0;
93 92
94 if (i2c_transfer(&i2cbus->adapter, msgs, 2) == 2) { 93 if (i2c_transfer(adapter, msgs, 2) == 2) {
95 *ch = in_buf[0]; 94 *ch = in_buf[0];
96 return true; 95 return true;
97 }; 96 };
98 97
99 if (!sil->quiet) { 98 if (!sil->quiet) {
100 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n", 99 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
101 addr, i2cbus->adapter.name, dvo->slave_addr); 100 addr, adapter->name, dvo->slave_addr);
102 } 101 }
103 return false; 102 return false;
104} 103}
@@ -107,7 +106,6 @@ static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
107{ 106{
108 struct sil164_priv *sil= dvo->dev_priv; 107 struct sil164_priv *sil= dvo->dev_priv;
109 struct i2c_adapter *adapter = dvo->i2c_bus; 108 struct i2c_adapter *adapter = dvo->i2c_bus;
110 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
111 uint8_t out_buf[2]; 109 uint8_t out_buf[2];
112 struct i2c_msg msg = { 110 struct i2c_msg msg = {
113 .addr = dvo->slave_addr, 111 .addr = dvo->slave_addr,
@@ -119,12 +117,12 @@ static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
119 out_buf[0] = addr; 117 out_buf[0] = addr;
120 out_buf[1] = ch; 118 out_buf[1] = ch;
121 119
122 if (i2c_transfer(&i2cbus->adapter, &msg, 1) == 1) 120 if (i2c_transfer(adapter, &msg, 1) == 1)
123 return true; 121 return true;
124 122
125 if (!sil->quiet) { 123 if (!sil->quiet) {
126 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n", 124 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
127 addr, i2cbus->adapter.name, dvo->slave_addr); 125 addr, adapter->name, dvo->slave_addr);
128 } 126 }
129 127
130 return false; 128 return false;
diff --git a/drivers/gpu/drm/i915/dvo_tfp410.c b/drivers/gpu/drm/i915/dvo_tfp410.c
index 56f66426207..8ab2855bb54 100644
--- a/drivers/gpu/drm/i915/dvo_tfp410.c
+++ b/drivers/gpu/drm/i915/dvo_tfp410.c
@@ -94,7 +94,6 @@ static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
94{ 94{
95 struct tfp410_priv *tfp = dvo->dev_priv; 95 struct tfp410_priv *tfp = dvo->dev_priv;
96 struct i2c_adapter *adapter = dvo->i2c_bus; 96 struct i2c_adapter *adapter = dvo->i2c_bus;
97 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
98 u8 out_buf[2]; 97 u8 out_buf[2];
99 u8 in_buf[2]; 98 u8 in_buf[2];
100 99
@@ -116,14 +115,14 @@ static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
116 out_buf[0] = addr; 115 out_buf[0] = addr;
117 out_buf[1] = 0; 116 out_buf[1] = 0;
118 117
119 if (i2c_transfer(&i2cbus->adapter, msgs, 2) == 2) { 118 if (i2c_transfer(adapter, msgs, 2) == 2) {
120 *ch = in_buf[0]; 119 *ch = in_buf[0];
121 return true; 120 return true;
122 }; 121 };
123 122
124 if (!tfp->quiet) { 123 if (!tfp->quiet) {
125 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n", 124 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
126 addr, i2cbus->adapter.name, dvo->slave_addr); 125 addr, adapter->name, dvo->slave_addr);
127 } 126 }
128 return false; 127 return false;
129} 128}
@@ -132,7 +131,6 @@ static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
132{ 131{
133 struct tfp410_priv *tfp = dvo->dev_priv; 132 struct tfp410_priv *tfp = dvo->dev_priv;
134 struct i2c_adapter *adapter = dvo->i2c_bus; 133 struct i2c_adapter *adapter = dvo->i2c_bus;
135 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
136 uint8_t out_buf[2]; 134 uint8_t out_buf[2];
137 struct i2c_msg msg = { 135 struct i2c_msg msg = {
138 .addr = dvo->slave_addr, 136 .addr = dvo->slave_addr,
@@ -144,12 +142,12 @@ static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
144 out_buf[0] = addr; 142 out_buf[0] = addr;
145 out_buf[1] = ch; 143 out_buf[1] = ch;
146 144
147 if (i2c_transfer(&i2cbus->adapter, &msg, 1) == 1) 145 if (i2c_transfer(adapter, &msg, 1) == 1)
148 return true; 146 return true;
149 147
150 if (!tfp->quiet) { 148 if (!tfp->quiet) {
151 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n", 149 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
152 addr, i2cbus->adapter.name, dvo->slave_addr); 150 addr, adapter->name, dvo->slave_addr);
153 } 151 }
154 152
155 return false; 153 return false;
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 7c7d1bc9d1b..39aaffe7958 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -2001,6 +2001,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
2001 2001
2002 /* Try to make sure MCHBAR is enabled before poking at it */ 2002 /* Try to make sure MCHBAR is enabled before poking at it */
2003 intel_setup_mchbar(dev); 2003 intel_setup_mchbar(dev);
2004 intel_setup_gmbus(dev);
2004 intel_opregion_setup(dev); 2005 intel_opregion_setup(dev);
2005 2006
2006 i915_gem_load(dev); 2007 i915_gem_load(dev);
@@ -2155,6 +2156,7 @@ int i915_driver_unload(struct drm_device *dev)
2155 intel_cleanup_overlay(dev); 2156 intel_cleanup_overlay(dev);
2156 } 2157 }
2157 2158
2159 intel_teardown_gmbus(dev);
2158 intel_teardown_mchbar(dev); 2160 intel_teardown_mchbar(dev);
2159 2161
2160 destroy_workqueue(dev_priv->wq); 2162 destroy_workqueue(dev_priv->wq);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b0692c40b0c..cf08128798a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -34,6 +34,7 @@
34#include "intel_bios.h" 34#include "intel_bios.h"
35#include "intel_ringbuffer.h" 35#include "intel_ringbuffer.h"
36#include <linux/io-mapping.h> 36#include <linux/io-mapping.h>
37#include <linux/i2c.h>
37#include <drm/intel-gtt.h> 38#include <drm/intel-gtt.h>
38 39
39/* General customization: 40/* General customization:
@@ -246,6 +247,12 @@ typedef struct drm_i915_private {
246 247
247 void __iomem *regs; 248 void __iomem *regs;
248 249
250 struct intel_gmbus {
251 struct i2c_adapter adapter;
252 struct i2c_adapter *force_bitbanging;
253 int pin;
254 } *gmbus;
255
249 struct pci_dev *bridge_dev; 256 struct pci_dev *bridge_dev;
250 struct intel_ring_buffer render_ring; 257 struct intel_ring_buffer render_ring;
251 struct intel_ring_buffer bsd_ring; 258 struct intel_ring_buffer bsd_ring;
@@ -339,7 +346,7 @@ typedef struct drm_i915_private {
339 346
340 struct notifier_block lid_notifier; 347 struct notifier_block lid_notifier;
341 348
342 int crt_ddc_bus; /* 0 = unknown, else GPIO to use for CRT DDC */ 349 int crt_ddc_pin;
343 struct drm_i915_fence_reg fence_regs[16]; /* assume 965 */ 350 struct drm_i915_fence_reg fence_regs[16]; /* assume 965 */
344 int fence_reg_start; /* 4 if userland hasn't ioctl'd us yet */ 351 int fence_reg_start; /* 4 if userland hasn't ioctl'd us yet */
345 int num_fence_regs; /* 8 on pre-965, 16 otherwise */ 352 int num_fence_regs; /* 8 on pre-965, 16 otherwise */
@@ -1070,6 +1077,11 @@ extern int i915_restore_state(struct drm_device *dev);
1070extern int i915_save_state(struct drm_device *dev); 1077extern int i915_save_state(struct drm_device *dev);
1071extern int i915_restore_state(struct drm_device *dev); 1078extern int i915_restore_state(struct drm_device *dev);
1072 1079
1080/* intel_i2c.c */
1081extern int intel_setup_gmbus(struct drm_device *dev);
1082extern void intel_teardown_gmbus(struct drm_device *dev);
1083extern void intel_i2c_reset(struct drm_device *dev);
1084
1073/* intel_opregion.c */ 1085/* intel_opregion.c */
1074extern int intel_opregion_setup(struct drm_device *dev); 1086extern int intel_opregion_setup(struct drm_device *dev);
1075#ifdef CONFIG_ACPI 1087#ifdef CONFIG_ACPI
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index fd229abe0d8..18e3749fbd1 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -583,12 +583,51 @@
583# define GPIO_DATA_VAL_IN (1 << 12) 583# define GPIO_DATA_VAL_IN (1 << 12)
584# define GPIO_DATA_PULLUP_DISABLE (1 << 13) 584# define GPIO_DATA_PULLUP_DISABLE (1 << 13)
585 585
586#define GMBUS0 0x5100 586#define GMBUS0 0x5100 /* clock/port select */
587#define GMBUS1 0x5104 587#define GMBUS_RATE_100KHZ (0<<8)
588#define GMBUS2 0x5108 588#define GMBUS_RATE_50KHZ (1<<8)
589#define GMBUS3 0x510c 589#define GMBUS_RATE_400KHZ (2<<8) /* reserved on Pineview */
590#define GMBUS4 0x5110 590#define GMBUS_RATE_1MHZ (3<<8) /* reserved on Pineview */
591#define GMBUS5 0x5120 591#define GMBUS_HOLD_EXT (1<<7) /* 300ns hold time, rsvd on Pineview */
592#define GMBUS_PORT_DISABLED 0
593#define GMBUS_PORT_SSC 1
594#define GMBUS_PORT_VGADDC 2
595#define GMBUS_PORT_PANEL 3
596#define GMBUS_PORT_DPC 4 /* HDMIC */
597#define GMBUS_PORT_DPB 5 /* SDVO, HDMIB */
598 /* 6 reserved */
599#define GMBUS_PORT_DPD 7 /* HDMID */
600#define GMBUS_NUM_PORTS 8
601#define GMBUS1 0x5104 /* command/status */
602#define GMBUS_SW_CLR_INT (1<<31)
603#define GMBUS_SW_RDY (1<<30)
604#define GMBUS_ENT (1<<29) /* enable timeout */
605#define GMBUS_CYCLE_NONE (0<<25)
606#define GMBUS_CYCLE_WAIT (1<<25)
607#define GMBUS_CYCLE_INDEX (2<<25)
608#define GMBUS_CYCLE_STOP (4<<25)
609#define GMBUS_BYTE_COUNT_SHIFT 16
610#define GMBUS_SLAVE_INDEX_SHIFT 8
611#define GMBUS_SLAVE_ADDR_SHIFT 1
612#define GMBUS_SLAVE_READ (1<<0)
613#define GMBUS_SLAVE_WRITE (0<<0)
614#define GMBUS2 0x5108 /* status */
615#define GMBUS_INUSE (1<<15)
616#define GMBUS_HW_WAIT_PHASE (1<<14)
617#define GMBUS_STALL_TIMEOUT (1<<13)
618#define GMBUS_INT (1<<12)
619#define GMBUS_HW_RDY (1<<11)
620#define GMBUS_SATOER (1<<10)
621#define GMBUS_ACTIVE (1<<9)
622#define GMBUS3 0x510c /* data buffer bytes 3-0 */
623#define GMBUS4 0x5110 /* interrupt mask (Pineview+) */
624#define GMBUS_SLAVE_TIMEOUT_EN (1<<4)
625#define GMBUS_NAK_EN (1<<3)
626#define GMBUS_IDLE_EN (1<<2)
627#define GMBUS_HW_WAIT_EN (1<<1)
628#define GMBUS_HW_RDY_EN (1<<0)
629#define GMBUS5 0x5120 /* byte index */
630#define GMBUS_2BYTE_INDEX_EN (1<<31)
592 631
593/* 632/*
594 * Clock control & power management 633 * Clock control & power management
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 2c6b98f2440..5c0de650182 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -860,9 +860,7 @@ int i915_restore_state(struct drm_device *dev)
860 for (i = 0; i < 3; i++) 860 for (i = 0; i < 3; i++)
861 I915_WRITE(SWF30 + (i << 2), dev_priv->saveSWF2[i]); 861 I915_WRITE(SWF30 + (i << 2), dev_priv->saveSWF2[i]);
862 862
863 /* I2C state */ 863 intel_i2c_reset(dev);
864 intel_i2c_reset_gmbus(dev);
865 864
866 return 0; 865 return 0;
867} 866}
868
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 8986a4b898d..d11bbcad4fe 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -291,14 +291,6 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
291 struct bdb_header *bdb) 291 struct bdb_header *bdb)
292{ 292{
293 struct bdb_general_definitions *general; 293 struct bdb_general_definitions *general;
294 const int crt_bus_map_table[] = {
295 GPIOB,
296 GPIOA,
297 GPIOC,
298 GPIOD,
299 GPIOE,
300 GPIOF,
301 };
302 294
303 general = find_section(bdb, BDB_GENERAL_DEFINITIONS); 295 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
304 if (general) { 296 if (general) {
@@ -306,10 +298,8 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
306 if (block_size >= sizeof(*general)) { 298 if (block_size >= sizeof(*general)) {
307 int bus_pin = general->crt_ddc_gmbus_pin; 299 int bus_pin = general->crt_ddc_gmbus_pin;
308 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin); 300 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
309 if ((bus_pin >= 1) && (bus_pin <= 6)) { 301 if (bus_pin >= 1 && bus_pin <= 6)
310 dev_priv->crt_ddc_bus = 302 dev_priv->crt_ddc_pin = bus_pin - 1;
311 crt_bus_map_table[bus_pin-1];
312 }
313 } else { 303 } else {
314 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n", 304 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
315 block_size); 305 block_size);
@@ -533,6 +523,8 @@ intel_init_bios(struct drm_device *dev)
533 struct bdb_header *bdb = NULL; 523 struct bdb_header *bdb = NULL;
534 u8 __iomem *bios = NULL; 524 u8 __iomem *bios = NULL;
535 525
526 dev_priv->crt_ddc_pin = GMBUS_PORT_VGADDC;
527
536 /* XXX Should this validation be moved to intel_opregion.c? */ 528 /* XXX Should this validation be moved to intel_opregion.c? */
537 if (dev_priv->opregion.vbt) { 529 if (dev_priv->opregion.vbt) {
538 struct vbt_header *vbt = dev_priv->opregion.vbt; 530 struct vbt_header *vbt = dev_priv->opregion.vbt;
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 2353da625d2..8b782ee6308 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -264,12 +264,13 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector)
264static bool intel_crt_detect_ddc(struct drm_encoder *encoder) 264static bool intel_crt_detect_ddc(struct drm_encoder *encoder)
265{ 265{
266 struct intel_encoder *intel_encoder = to_intel_encoder(encoder); 266 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
267 struct drm_i915_private *dev_priv = encoder->dev->dev_private;
267 268
268 /* CRT should always be at 0, but check anyway */ 269 /* CRT should always be at 0, but check anyway */
269 if (intel_encoder->type != INTEL_OUTPUT_ANALOG) 270 if (intel_encoder->type != INTEL_OUTPUT_ANALOG)
270 return false; 271 return false;
271 272
272 return intel_ddc_probe(intel_encoder); 273 return intel_ddc_probe(intel_encoder, dev_priv->crt_ddc_pin);
273} 274}
274 275
275static enum drm_connector_status 276static enum drm_connector_status
@@ -445,29 +446,18 @@ static void intel_crt_destroy(struct drm_connector *connector)
445 446
446static int intel_crt_get_modes(struct drm_connector *connector) 447static int intel_crt_get_modes(struct drm_connector *connector)
447{ 448{
448 struct intel_encoder *encoder = intel_attached_encoder(connector);
449 struct i2c_adapter *ddc_bus;
450 struct drm_device *dev = connector->dev; 449 struct drm_device *dev = connector->dev;
450 struct drm_i915_private *dev_priv = dev->dev_private;
451 int ret; 451 int ret;
452 452
453 ret = intel_ddc_get_modes(connector, encoder->ddc_bus); 453 ret = intel_ddc_get_modes(connector,
454 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
454 if (ret || !IS_G4X(dev)) 455 if (ret || !IS_G4X(dev))
455 goto end; 456 return ret;
456 457
457 /* Try to probe digital port for output in DVI-I -> VGA mode. */ 458 /* Try to probe digital port for output in DVI-I -> VGA mode. */
458 ddc_bus = intel_i2c_create(encoder, GPIOD, "CRTDDC_D"); 459 return intel_ddc_get_modes(connector,
459 if (!ddc_bus) { 460 &dev_priv->gmbus[GMBUS_PORT_DPB].adapter);
460 dev_printk(KERN_ERR, &connector->dev->pdev->dev,
461 "DDC bus registration failed for CRTDDC_D.\n");
462 goto end;
463 }
464 /* Try to get modes by GPIOD port */
465 ret = intel_ddc_get_modes(connector, ddc_bus);
466 intel_i2c_destroy(ddc_bus);
467
468end:
469 return ret;
470
471} 461}
472 462
473static int intel_crt_set_property(struct drm_connector *connector, 463static int intel_crt_set_property(struct drm_connector *connector,
@@ -513,7 +503,6 @@ void intel_crt_init(struct drm_device *dev)
513 struct intel_encoder *intel_encoder; 503 struct intel_encoder *intel_encoder;
514 struct intel_connector *intel_connector; 504 struct intel_connector *intel_connector;
515 struct drm_i915_private *dev_priv = dev->dev_private; 505 struct drm_i915_private *dev_priv = dev->dev_private;
516 u32 i2c_reg;
517 506
518 intel_encoder = kzalloc(sizeof(struct intel_encoder), GFP_KERNEL); 507 intel_encoder = kzalloc(sizeof(struct intel_encoder), GFP_KERNEL);
519 if (!intel_encoder) 508 if (!intel_encoder)
@@ -534,27 +523,6 @@ void intel_crt_init(struct drm_device *dev)
534 523
535 intel_connector_attach_encoder(intel_connector, intel_encoder); 524 intel_connector_attach_encoder(intel_connector, intel_encoder);
536 525
537 /* Set up the DDC bus. */
538 if (HAS_PCH_SPLIT(dev))
539 i2c_reg = PCH_GPIOA;
540 else {
541 i2c_reg = GPIOA;
542 /* Use VBT information for CRT DDC if available */
543 if (dev_priv->crt_ddc_bus != 0)
544 i2c_reg = dev_priv->crt_ddc_bus;
545 }
546 intel_encoder->ddc_bus = intel_i2c_create(intel_encoder,
547 i2c_reg, "CRTDDC_A");
548 if (!intel_encoder->ddc_bus) {
549 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
550 "failed.\n");
551 drm_connector_cleanup(&intel_connector->base);
552 kfree(intel_connector);
553 drm_encoder_cleanup(&intel_encoder->base);
554 kfree(intel_encoder);
555 return;
556 }
557
558 intel_encoder->type = INTEL_OUTPUT_ANALOG; 526 intel_encoder->type = INTEL_OUTPUT_ANALOG;
559 intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 527 intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
560 (1 << INTEL_ANALOG_CLONE_BIT) | 528 (1 << INTEL_ANALOG_CLONE_BIT) |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 11d643acf2f..86ea3890aa8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2530,12 +2530,6 @@ void intel_encoder_destroy(struct drm_encoder *encoder)
2530{ 2530{
2531 struct intel_encoder *intel_encoder = to_intel_encoder(encoder); 2531 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2532 2532
2533 if (intel_encoder->ddc_bus)
2534 intel_i2c_destroy(intel_encoder->ddc_bus);
2535
2536 if (intel_encoder->i2c_bus)
2537 intel_i2c_destroy(intel_encoder->i2c_bus);
2538
2539 drm_encoder_cleanup(encoder); 2533 drm_encoder_cleanup(encoder);
2540 kfree(intel_encoder); 2534 kfree(intel_encoder);
2541} 2535}
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 208a4ec3e43..9a87ec5175e 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1490,7 +1490,7 @@ static int intel_dp_get_modes(struct drm_connector *connector)
1490 /* We should parse the EDID data and find out if it has an audio sink 1490 /* We should parse the EDID data and find out if it has an audio sink
1491 */ 1491 */
1492 1492
1493 ret = intel_ddc_get_modes(connector, intel_dp->base.ddc_bus); 1493 ret = intel_ddc_get_modes(connector, &intel_dp->adapter);
1494 if (ret) { 1494 if (ret) {
1495 if ((IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) && 1495 if ((IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) &&
1496 !dev_priv->panel_fixed_mode) { 1496 !dev_priv->panel_fixed_mode) {
@@ -1705,7 +1705,6 @@ intel_dp_init(struct drm_device *dev, int output_reg)
1705 1705
1706 intel_dp_i2c_init(intel_dp, intel_connector, name); 1706 intel_dp_i2c_init(intel_dp, intel_connector, name);
1707 1707
1708 intel_encoder->ddc_bus = &intel_dp->adapter;
1709 intel_encoder->hot_plug = intel_dp_hot_plug; 1708 intel_encoder->hot_plug = intel_dp_hot_plug;
1710 1709
1711 if (output_reg == DP_A || IS_PCH_eDP(intel_dp)) { 1710 if (output_reg == DP_A || IS_PCH_eDP(intel_dp)) {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 8fe6b730c67..60ce9305e77 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -26,8 +26,6 @@
26#define __INTEL_DRV_H__ 26#define __INTEL_DRV_H__
27 27
28#include <linux/i2c.h> 28#include <linux/i2c.h>
29#include <linux/i2c-id.h>
30#include <linux/i2c-algo-bit.h>
31#include "i915_drv.h" 29#include "i915_drv.h"
32#include "drm_crtc.h" 30#include "drm_crtc.h"
33#include "drm_crtc_helper.h" 31#include "drm_crtc_helper.h"
@@ -127,13 +125,6 @@ intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
127 return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT; 125 return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
128} 126}
129 127
130struct intel_i2c_chan {
131 struct intel_encoder *encoder;
132 u32 reg; /* GPIO reg */
133 struct i2c_adapter adapter;
134 struct i2c_algo_bit_data algo;
135};
136
137struct intel_framebuffer { 128struct intel_framebuffer {
138 struct drm_framebuffer base; 129 struct drm_framebuffer base;
139 struct drm_gem_object *obj; 130 struct drm_gem_object *obj;
@@ -149,8 +140,6 @@ struct intel_fbdev {
149struct intel_encoder { 140struct intel_encoder {
150 struct drm_encoder base; 141 struct drm_encoder base;
151 int type; 142 int type;
152 struct i2c_adapter *i2c_bus;
153 struct i2c_adapter *ddc_bus;
154 bool load_detect_temp; 143 bool load_detect_temp;
155 bool needs_tv_clock; 144 bool needs_tv_clock;
156 void (*hot_plug)(struct intel_encoder *); 145 void (*hot_plug)(struct intel_encoder *);
@@ -206,14 +195,8 @@ struct intel_unpin_work {
206 bool enable_stall_check; 195 bool enable_stall_check;
207}; 196};
208 197
209struct i2c_adapter *intel_i2c_create(struct intel_encoder *encoder,
210 const u32 reg,
211 const char *name);
212void intel_i2c_destroy(struct i2c_adapter *adapter);
213int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter); 198int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
214extern bool intel_ddc_probe(struct intel_encoder *intel_encoder); 199extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
215void intel_i2c_quirk_set(struct drm_device *dev, bool enable);
216void intel_i2c_reset_gmbus(struct drm_device *dev);
217 200
218extern void intel_crt_init(struct drm_device *dev); 201extern void intel_crt_init(struct drm_device *dev);
219extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg); 202extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index d8a586b4127..1ee0dbbf6ee 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -72,7 +72,7 @@ static const struct intel_dvo_device intel_dvo_devices[] = {
72 .name = "ch7017", 72 .name = "ch7017",
73 .dvo_reg = DVOC, 73 .dvo_reg = DVOC,
74 .slave_addr = 0x75, 74 .slave_addr = 0x75,
75 .gpio = GPIOE, 75 .gpio = GMBUS_PORT_DPD,
76 .dev_ops = &ch7017_ops, 76 .dev_ops = &ch7017_ops,
77 } 77 }
78}; 78};
@@ -81,6 +81,7 @@ struct intel_dvo {
81 struct intel_encoder base; 81 struct intel_encoder base;
82 82
83 struct intel_dvo_device dev; 83 struct intel_dvo_device dev;
84 int ddc_bus;
84 85
85 struct drm_display_mode *panel_fixed_mode; 86 struct drm_display_mode *panel_fixed_mode;
86 bool panel_wants_dither; 87 bool panel_wants_dither;
@@ -235,13 +236,15 @@ static enum drm_connector_status intel_dvo_detect(struct drm_connector *connecto
235static int intel_dvo_get_modes(struct drm_connector *connector) 236static int intel_dvo_get_modes(struct drm_connector *connector)
236{ 237{
237 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 238 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
239 struct drm_i915_private *dev_priv = connector->dev->dev_private;
238 240
239 /* We should probably have an i2c driver get_modes function for those 241 /* We should probably have an i2c driver get_modes function for those
240 * devices which will have a fixed set of modes determined by the chip 242 * devices which will have a fixed set of modes determined by the chip
241 * (TV-out, for example), but for now with just TMDS and LVDS, 243 * (TV-out, for example), but for now with just TMDS and LVDS,
242 * that's not the case. 244 * that's not the case.
243 */ 245 */
244 intel_ddc_get_modes(connector, intel_dvo->base.ddc_bus); 246 intel_ddc_get_modes(connector,
247 &dev_priv->gmbus[intel_dvo->ddc_bus].adapter);
245 if (!list_empty(&connector->probed_modes)) 248 if (!list_empty(&connector->probed_modes))
246 return 1; 249 return 1;
247 250
@@ -341,10 +344,10 @@ intel_dvo_get_current_mode(struct drm_connector *connector)
341 344
342void intel_dvo_init(struct drm_device *dev) 345void intel_dvo_init(struct drm_device *dev)
343{ 346{
347 struct drm_i915_private *dev_priv = dev->dev_private;
344 struct intel_encoder *intel_encoder; 348 struct intel_encoder *intel_encoder;
345 struct intel_dvo *intel_dvo; 349 struct intel_dvo *intel_dvo;
346 struct intel_connector *intel_connector; 350 struct intel_connector *intel_connector;
347 struct i2c_adapter *i2cbus = NULL;
348 int ret = 0; 351 int ret = 0;
349 int i; 352 int i;
350 int encoder_type = DRM_MODE_ENCODER_NONE; 353 int encoder_type = DRM_MODE_ENCODER_NONE;
@@ -364,15 +367,13 @@ void intel_dvo_init(struct drm_device *dev)
364 &intel_dvo_enc_funcs, encoder_type); 367 &intel_dvo_enc_funcs, encoder_type);
365 368
366 /* Set up the DDC bus */ 369 /* Set up the DDC bus */
367 intel_encoder->ddc_bus = intel_i2c_create(intel_encoder, 370 intel_dvo->ddc_bus = GMBUS_PORT_DPB;
368 GPIOD, "DVODDC_D");
369 if (!intel_encoder->ddc_bus)
370 goto free_intel;
371 371
372 /* Now, try to find a controller */ 372 /* Now, try to find a controller */
373 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { 373 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
374 struct drm_connector *connector = &intel_connector->base; 374 struct drm_connector *connector = &intel_connector->base;
375 const struct intel_dvo_device *dvo = &intel_dvo_devices[i]; 375 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
376 struct i2c_adapter *i2c;
376 int gpio; 377 int gpio;
377 378
378 /* Allow the I2C driver info to specify the GPIO to be used in 379 /* Allow the I2C driver info to specify the GPIO to be used in
@@ -382,23 +383,18 @@ void intel_dvo_init(struct drm_device *dev)
382 if (dvo->gpio != 0) 383 if (dvo->gpio != 0)
383 gpio = dvo->gpio; 384 gpio = dvo->gpio;
384 else if (dvo->type == INTEL_DVO_CHIP_LVDS) 385 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
385 gpio = GPIOB; 386 gpio = GMBUS_PORT_PANEL;
386 else 387 else
387 gpio = GPIOE; 388 gpio = GMBUS_PORT_DPD;
388 389
389 /* Set up the I2C bus necessary for the chip we're probing. 390 /* Set up the I2C bus necessary for the chip we're probing.
390 * It appears that everything is on GPIOE except for panels 391 * It appears that everything is on GPIOE except for panels
391 * on i830 laptops, which are on GPIOB (DVOA). 392 * on i830 laptops, which are on GPIOB (DVOA).
392 */ 393 */
393 if (i2cbus != NULL) 394 i2c = &dev_priv->gmbus[gpio].adapter;
394 intel_i2c_destroy(i2cbus);
395 i2cbus = intel_i2c_create(intel_encoder, gpio,
396 gpio == GPIOB ? "DVOI2C_B" : "DVOI2C_E");
397 if (i2cbus == NULL)
398 continue;
399 395
400 intel_dvo->dev = *dvo; 396 intel_dvo->dev = *dvo;
401 ret = dvo->dev_ops->init(&intel_dvo->dev, i2cbus); 397 ret = dvo->dev_ops->init(&intel_dvo->dev, i2c);
402 if (!ret) 398 if (!ret)
403 continue; 399 continue;
404 400
@@ -451,11 +447,6 @@ void intel_dvo_init(struct drm_device *dev)
451 return; 447 return;
452 } 448 }
453 449
454 intel_i2c_destroy(intel_encoder->ddc_bus);
455 /* Didn't find a chip, so tear down. */
456 if (i2cbus != NULL)
457 intel_i2c_destroy(i2cbus);
458free_intel:
459 drm_encoder_cleanup(&intel_encoder->base); 450 drm_encoder_cleanup(&intel_encoder->base);
460 kfree(intel_dvo); 451 kfree(intel_dvo);
461 kfree(intel_connector); 452 kfree(intel_connector);
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 783924c7682..f814cb035e0 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -40,6 +40,7 @@
40struct intel_hdmi { 40struct intel_hdmi {
41 struct intel_encoder base; 41 struct intel_encoder base;
42 u32 sdvox_reg; 42 u32 sdvox_reg;
43 int ddc_bus;
43 bool has_hdmi_sink; 44 bool has_hdmi_sink;
44}; 45};
45 46
@@ -148,11 +149,13 @@ static enum drm_connector_status
148intel_hdmi_detect(struct drm_connector *connector) 149intel_hdmi_detect(struct drm_connector *connector)
149{ 150{
150 struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); 151 struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
151 struct edid *edid = NULL; 152 struct drm_i915_private *dev_priv = connector->dev->dev_private;
153 struct edid *edid;
152 enum drm_connector_status status = connector_status_disconnected; 154 enum drm_connector_status status = connector_status_disconnected;
153 155
154 intel_hdmi->has_hdmi_sink = false; 156 intel_hdmi->has_hdmi_sink = false;
155 edid = drm_get_edid(connector, intel_hdmi->base.ddc_bus); 157 edid = drm_get_edid(connector,
158 &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
156 159
157 if (edid) { 160 if (edid) {
158 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 161 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
@@ -169,12 +172,14 @@ intel_hdmi_detect(struct drm_connector *connector)
169static int intel_hdmi_get_modes(struct drm_connector *connector) 172static int intel_hdmi_get_modes(struct drm_connector *connector)
170{ 173{
171 struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); 174 struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
175 struct drm_i915_private *dev_priv = connector->dev->dev_private;
172 176
173 /* We should parse the EDID data and find out if it's an HDMI sink so 177 /* We should parse the EDID data and find out if it's an HDMI sink so
174 * we can send audio to it. 178 * we can send audio to it.
175 */ 179 */
176 180
177 return intel_ddc_get_modes(connector, intel_hdmi->base.ddc_bus); 181 return intel_ddc_get_modes(connector,
182 &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
178} 183}
179 184
180static void intel_hdmi_destroy(struct drm_connector *connector) 185static void intel_hdmi_destroy(struct drm_connector *connector)
@@ -246,32 +251,25 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
246 /* Set up the DDC bus. */ 251 /* Set up the DDC bus. */
247 if (sdvox_reg == SDVOB) { 252 if (sdvox_reg == SDVOB) {
248 intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT); 253 intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
249 intel_encoder->ddc_bus = intel_i2c_create(intel_encoder, 254 intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
250 GPIOE, "HDMIB");
251 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; 255 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
252 } else if (sdvox_reg == SDVOC) { 256 } else if (sdvox_reg == SDVOC) {
253 intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT); 257 intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
254 intel_encoder->ddc_bus = intel_i2c_create(intel_encoder, 258 intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
255 GPIOD, "HDMIC");
256 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; 259 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
257 } else if (sdvox_reg == HDMIB) { 260 } else if (sdvox_reg == HDMIB) {
258 intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT); 261 intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
259 intel_encoder->ddc_bus = intel_i2c_create(intel_encoder, 262 intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
260 PCH_GPIOE, "HDMIB");
261 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; 263 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
262 } else if (sdvox_reg == HDMIC) { 264 } else if (sdvox_reg == HDMIC) {
263 intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT); 265 intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
264 intel_encoder->ddc_bus = intel_i2c_create(intel_encoder, 266 intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
265 PCH_GPIOD, "HDMIC");
266 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; 267 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
267 } else if (sdvox_reg == HDMID) { 268 } else if (sdvox_reg == HDMID) {
268 intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT); 269 intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
269 intel_encoder->ddc_bus = intel_i2c_create(intel_encoder, 270 intel_hdmi->ddc_bus = GMBUS_PORT_DPD;
270 PCH_GPIOF, "HDMID");
271 dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS; 271 dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
272 } 272 }
273 if (!intel_encoder->ddc_bus)
274 goto err_connector;
275 273
276 intel_hdmi->sdvox_reg = sdvox_reg; 274 intel_hdmi->sdvox_reg = sdvox_reg;
277 275
@@ -288,14 +286,4 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
288 u32 temp = I915_READ(PEG_BAND_GAP_DATA); 286 u32 temp = I915_READ(PEG_BAND_GAP_DATA);
289 I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd); 287 I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
290 } 288 }
291
292 return;
293
294err_connector:
295 drm_encoder_cleanup(&intel_encoder->base);
296 drm_connector_cleanup(connector);
297 kfree(intel_hdmi);
298 kfree(intel_connector);
299
300 return;
301} 289}
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index d3d65a9cfba..6f4d128935a 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 2 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2008 Intel Corporation 3 * Copyright © 2006-2008,2010 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com> 4 * Jesse Barnes <jesse.barnes@intel.com>
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -24,10 +24,9 @@
24 * 24 *
25 * Authors: 25 * Authors:
26 * Eric Anholt <eric@anholt.net> 26 * Eric Anholt <eric@anholt.net>
27 * Chris Wilson <chris@chris-wilson.co.uk>
27 */ 28 */
28#include <linux/i2c.h> 29#include <linux/i2c.h>
29#include <linux/slab.h>
30#include <linux/i2c-id.h>
31#include <linux/i2c-algo-bit.h> 30#include <linux/i2c-algo-bit.h>
32#include "drmP.h" 31#include "drmP.h"
33#include "drm.h" 32#include "drm.h"
@@ -35,13 +34,33 @@
35#include "i915_drm.h" 34#include "i915_drm.h"
36#include "i915_drv.h" 35#include "i915_drv.h"
37 36
38void intel_i2c_quirk_set(struct drm_device *dev, bool enable) 37/* Intel GPIO access functions */
38
39#define I2C_RISEFALL_TIME 20
40
41struct intel_gpio {
42 struct i2c_adapter adapter;
43 struct i2c_algo_bit_data algo;
44 struct drm_i915_private *dev_priv;
45 u32 reg;
46};
47
48void
49intel_i2c_reset(struct drm_device *dev)
39{ 50{
40 struct drm_i915_private *dev_priv = dev->dev_private; 51 struct drm_i915_private *dev_priv = dev->dev_private;
52 if (HAS_PCH_SPLIT(dev))
53 I915_WRITE(PCH_GMBUS0, 0);
54 else
55 I915_WRITE(GMBUS0, 0);
56}
57
58static void intel_i2c_quirk_set(struct drm_i915_private *dev_priv, bool enable)
59{
41 u32 val; 60 u32 val;
42 61
43 /* When using bit bashing for I2C, this bit needs to be set to 1 */ 62 /* When using bit bashing for I2C, this bit needs to be set to 1 */
44 if (!IS_PINEVIEW(dev)) 63 if (!IS_PINEVIEW(dev_priv->dev))
45 return; 64 return;
46 65
47 val = I915_READ(DSPCLK_GATE_D); 66 val = I915_READ(DSPCLK_GATE_D);
@@ -52,42 +71,30 @@ void intel_i2c_quirk_set(struct drm_device *dev, bool enable)
52 I915_WRITE(DSPCLK_GATE_D, val); 71 I915_WRITE(DSPCLK_GATE_D, val);
53} 72}
54 73
55/*
56 * Intel GPIO access functions
57 */
58
59#define I2C_RISEFALL_TIME 20
60
61static inline struct drm_i915_private *
62get_dev_priv(struct intel_i2c_chan *chan)
63{
64 return chan->encoder->base.dev->dev_private;
65}
66
67static int get_clock(void *data) 74static int get_clock(void *data)
68{ 75{
69 struct intel_i2c_chan *chan = data; 76 struct intel_gpio *gpio = data;
70 struct drm_i915_private *dev_priv = get_dev_priv(chan); 77 struct drm_i915_private *dev_priv = gpio->dev_priv;
71 return (I915_READ(chan->reg) & GPIO_CLOCK_VAL_IN) != 0; 78 return (I915_READ(gpio->reg) & GPIO_CLOCK_VAL_IN) != 0;
72} 79}
73 80
74static int get_data(void *data) 81static int get_data(void *data)
75{ 82{
76 struct intel_i2c_chan *chan = data; 83 struct intel_gpio *gpio = data;
77 struct drm_i915_private *dev_priv = get_dev_priv(chan); 84 struct drm_i915_private *dev_priv = gpio->dev_priv;
78 return (I915_READ(chan->reg) & GPIO_DATA_VAL_IN) != 0; 85 return (I915_READ(gpio->reg) & GPIO_DATA_VAL_IN) != 0;
79} 86}
80 87
81static void set_clock(void *data, int state_high) 88static void set_clock(void *data, int state_high)
82{ 89{
83 struct intel_i2c_chan *chan = data; 90 struct intel_gpio *gpio = data;
84 struct drm_i915_private *dev_priv = get_dev_priv(chan); 91 struct drm_i915_private *dev_priv = gpio->dev_priv;
85 struct drm_device *dev = dev_priv->dev; 92 struct drm_device *dev = dev_priv->dev;
86 u32 reserved = 0, clock_bits; 93 u32 reserved = 0, clock_bits;
87 94
88 /* On most chips, these bits must be preserved in software. */ 95 /* On most chips, these bits must be preserved in software. */
89 if (!IS_I830(dev) && !IS_845G(dev)) 96 if (!IS_I830(dev) && !IS_845G(dev))
90 reserved = I915_READ(chan->reg) & (GPIO_DATA_PULLUP_DISABLE | 97 reserved = I915_READ(gpio->reg) & (GPIO_DATA_PULLUP_DISABLE |
91 GPIO_CLOCK_PULLUP_DISABLE); 98 GPIO_CLOCK_PULLUP_DISABLE);
92 99
93 if (state_high) 100 if (state_high)
@@ -95,20 +102,21 @@ static void set_clock(void *data, int state_high)
95 else 102 else
96 clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK | 103 clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK |
97 GPIO_CLOCK_VAL_MASK; 104 GPIO_CLOCK_VAL_MASK;
98 I915_WRITE(chan->reg, reserved | clock_bits); 105
99 POSTING_READ(chan->reg); 106 I915_WRITE(gpio->reg, reserved | clock_bits);
107 POSTING_READ(gpio->reg);
100} 108}
101 109
102static void set_data(void *data, int state_high) 110static void set_data(void *data, int state_high)
103{ 111{
104 struct intel_i2c_chan *chan = data; 112 struct intel_gpio *gpio = data;
105 struct drm_i915_private *dev_priv = get_dev_priv(chan); 113 struct drm_i915_private *dev_priv = gpio->dev_priv;
106 struct drm_device *dev = dev_priv->dev; 114 struct drm_device *dev = dev_priv->dev;
107 u32 reserved = 0, data_bits; 115 u32 reserved = 0, data_bits;
108 116
109 /* On most chips, these bits must be preserved in software. */ 117 /* On most chips, these bits must be preserved in software. */
110 if (!IS_I830(dev) && !IS_845G(dev)) 118 if (!IS_I830(dev) && !IS_845G(dev))
111 reserved = I915_READ(chan->reg) & (GPIO_DATA_PULLUP_DISABLE | 119 reserved = I915_READ(gpio->reg) & (GPIO_DATA_PULLUP_DISABLE |
112 GPIO_CLOCK_PULLUP_DISABLE); 120 GPIO_CLOCK_PULLUP_DISABLE);
113 121
114 if (state_high) 122 if (state_high)
@@ -117,111 +125,258 @@ static void set_data(void *data, int state_high)
117 data_bits = GPIO_DATA_DIR_OUT | GPIO_DATA_DIR_MASK | 125 data_bits = GPIO_DATA_DIR_OUT | GPIO_DATA_DIR_MASK |
118 GPIO_DATA_VAL_MASK; 126 GPIO_DATA_VAL_MASK;
119 127
120 I915_WRITE(chan->reg, reserved | data_bits); 128 I915_WRITE(gpio->reg, reserved | data_bits);
121 POSTING_READ(chan->reg); 129 POSTING_READ(gpio->reg);
122} 130}
123 131
124/* Clears the GMBUS setup. Our driver doesn't make use of the GMBUS I2C 132static struct i2c_adapter *
125 * engine, but if the BIOS leaves it enabled, then that can break our use 133intel_gpio_create(struct drm_i915_private *dev_priv, u32 pin)
126 * of the bit-banging I2C interfaces. This is notably the case with the
127 * Mac Mini in EFI mode.
128 */
129void
130intel_i2c_reset_gmbus(struct drm_device *dev)
131{ 134{
132 struct drm_i915_private *dev_priv = dev->dev_private; 135 static const int map_pin_to_reg[] = {
136 0,
137 GPIOB,
138 GPIOA,
139 GPIOC,
140 GPIOD,
141 GPIOE,
142 GPIOF,
143 };
144 struct intel_gpio *gpio;
133 145
134 if (HAS_PCH_SPLIT(dev)) 146 if (pin < 1 || pin > 7)
135 I915_WRITE(PCH_GMBUS0, 0); 147 return NULL;
136 else
137 I915_WRITE(GMBUS0, 0);
138}
139 148
140/** 149 gpio = kzalloc(sizeof(struct intel_gpio), GFP_KERNEL);
141 * intel_i2c_create - instantiate an Intel i2c bus using the specified GPIO reg 150 if (gpio == NULL)
142 * @dev: DRM device 151 return NULL;
143 * @output: driver specific output device
144 * @reg: GPIO reg to use
145 * @name: name for this bus
146 * @slave_addr: slave address (if fixed)
147 *
148 * Creates and registers a new i2c bus with the Linux i2c layer, for use
149 * in output probing and control (e.g. DDC or SDVO control functions).
150 *
151 * Possible values for @reg include:
152 * %GPIOA
153 * %GPIOB
154 * %GPIOC
155 * %GPIOD
156 * %GPIOE
157 * %GPIOF
158 * %GPIOG
159 * %GPIOH
160 * see PRM for details on how these different busses are used.
161 */
162struct i2c_adapter *intel_i2c_create(struct intel_encoder *encoder,
163 const u32 reg,
164 const char *name)
165{
166 struct intel_i2c_chan *chan;
167 struct drm_device *dev = encoder->base.dev;
168 152
169 chan = kzalloc(sizeof(struct intel_i2c_chan), GFP_KERNEL); 153 gpio->reg = map_pin_to_reg[pin];
170 if (!chan) 154 if (HAS_PCH_SPLIT(dev_priv->dev))
171 goto out_free; 155 gpio->reg += PCH_GPIOA - GPIOA;
156 gpio->dev_priv = dev_priv;
172 157
173 chan->encoder = encoder; 158 snprintf(gpio->adapter.name, I2C_NAME_SIZE, "GPIO %d", pin);
174 chan->reg = reg; 159 gpio->adapter.owner = THIS_MODULE;
175 snprintf(chan->adapter.name, I2C_NAME_SIZE, "intel drm %s", name); 160 gpio->adapter.algo_data = &gpio->algo;
176 chan->adapter.owner = THIS_MODULE; 161 gpio->adapter.dev.parent = &dev_priv->dev->pdev->dev;
177 chan->adapter.algo_data = &chan->algo; 162 gpio->algo.setsda = set_data;
178 chan->adapter.dev.parent = &dev->pdev->dev; 163 gpio->algo.setscl = set_clock;
179 chan->algo.setsda = set_data; 164 gpio->algo.getsda = get_data;
180 chan->algo.setscl = set_clock; 165 gpio->algo.getscl = get_clock;
181 chan->algo.getsda = get_data; 166 gpio->algo.udelay = I2C_RISEFALL_TIME;
182 chan->algo.getscl = get_clock; 167 gpio->algo.timeout = usecs_to_jiffies(2200);
183 chan->algo.udelay = I2C_RISEFALL_TIME; 168 gpio->algo.data = gpio;
184 chan->algo.timeout = usecs_to_jiffies(2200); 169
185 chan->algo.data = chan; 170 if (i2c_bit_add_bus(&gpio->adapter))
186
187 i2c_set_adapdata(&chan->adapter, chan);
188
189 if (i2c_bit_add_bus(&chan->adapter))
190 goto out_free; 171 goto out_free;
191 172
192 intel_i2c_reset_gmbus(dev); 173 intel_i2c_reset(dev_priv->dev);
193 174
194 /* JJJ: raise SCL and SDA? */ 175 /* JJJ: raise SCL and SDA? */
195 intel_i2c_quirk_set(dev, true); 176 intel_i2c_quirk_set(dev_priv, true);
196 set_data(chan, 1); 177 set_data(gpio, 1);
197 udelay(I2C_RISEFALL_TIME); 178 udelay(I2C_RISEFALL_TIME);
198 set_clock(chan, 1); 179 set_clock(gpio, 1);
199 udelay(I2C_RISEFALL_TIME); 180 udelay(I2C_RISEFALL_TIME);
200 intel_i2c_quirk_set(dev, false); 181 intel_i2c_quirk_set(dev_priv, false);
201 182
202 return &chan->adapter; 183 return &gpio->adapter;
203 184
204out_free: 185out_free:
205 kfree(chan); 186 kfree(gpio);
206 return NULL; 187 return NULL;
207} 188}
208 189
190static int
191quirk_i2c_transfer(struct drm_i915_private *dev_priv,
192 struct i2c_adapter *adapter,
193 struct i2c_msg *msgs,
194 int num)
195{
196 int ret;
197
198 intel_i2c_reset(dev_priv->dev);
199
200 intel_i2c_quirk_set(dev_priv, true);
201 ret = i2c_transfer(adapter, msgs, num);
202 intel_i2c_quirk_set(dev_priv, false);
203
204 return ret;
205}
206
207static int
208gmbus_xfer(struct i2c_adapter *adapter,
209 struct i2c_msg *msgs,
210 int num)
211{
212 struct intel_gmbus *bus = container_of(adapter,
213 struct intel_gmbus,
214 adapter);
215 struct drm_i915_private *dev_priv = adapter->algo_data;
216 int i, speed, reg_offset;
217
218 if (bus->force_bitbanging)
219 return quirk_i2c_transfer(dev_priv, bus->force_bitbanging, msgs, num);
220
221 reg_offset = HAS_PCH_SPLIT(dev_priv->dev) ? PCH_GMBUS0 - GMBUS0 : 0;
222
223 speed = GMBUS_RATE_100KHZ;
224 if (INTEL_INFO(dev_priv->dev)->gen > 4 || IS_G4X(dev_priv->dev)) {
225 if (bus->pin == GMBUS_PORT_DPB) /* SDVO only? */
226 speed = GMBUS_RATE_1MHZ;
227 else
228 speed = GMBUS_RATE_400KHZ;
229 }
230 I915_WRITE(GMBUS0 + reg_offset, speed | bus->pin);
231
232 for (i = 0; i < num; i++) {
233 u16 len = msgs[i].len;
234 u8 *buf = msgs[i].buf;
235
236 if (msgs[i].flags & I2C_M_RD) {
237 I915_WRITE(GMBUS1 + reg_offset,
238 GMBUS_CYCLE_WAIT | (i + 1 == num ? GMBUS_CYCLE_STOP : 0) |
239 (len << GMBUS_BYTE_COUNT_SHIFT) |
240 (msgs[i].addr << GMBUS_SLAVE_ADDR_SHIFT) |
241 GMBUS_SLAVE_READ | GMBUS_SW_RDY);
242 do {
243 u32 val, loop = 0;
244
245 if (wait_for(I915_READ(GMBUS2 + reg_offset) & (GMBUS_SATOER | GMBUS_HW_RDY), 50))
246 goto timeout;
247 if (I915_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
248 return 0;
249
250 val = I915_READ(GMBUS3 + reg_offset);
251 do {
252 *buf++ = val & 0xff;
253 val >>= 8;
254 } while (--len && ++loop < 4);
255 } while (len);
256 } else {
257 u32 val = 0, loop = 0;
258
259 BUG_ON(msgs[i].len > 4);
260
261 do {
262 val |= *buf++ << (loop*8);
263 } while (--len && +loop < 4);
264
265 I915_WRITE(GMBUS3 + reg_offset, val);
266 I915_WRITE(GMBUS1 + reg_offset,
267 (i + 1 == num ? GMBUS_CYCLE_STOP : GMBUS_CYCLE_WAIT ) |
268 (msgs[i].len << GMBUS_BYTE_COUNT_SHIFT) |
269 (msgs[i].addr << GMBUS_SLAVE_ADDR_SHIFT) |
270 GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);
271 }
272
273 if (i + 1 < num && wait_for(I915_READ(GMBUS2 + reg_offset) & (GMBUS_SATOER | GMBUS_HW_WAIT_PHASE), 50))
274 goto timeout;
275 if (I915_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
276 return 0;
277 }
278
279 return num;
280
281timeout:
282 DRM_INFO("GMBUS timed out, falling back to bit banging on pin %d\n", bus->pin);
283 /* Hardware may not support GMBUS over these pins? Try GPIO bitbanging instead. */
284 bus->force_bitbanging = intel_gpio_create(dev_priv, bus->pin);
285 if (!bus->force_bitbanging)
286 return -ENOMEM;
287
288 return quirk_i2c_transfer(dev_priv, bus->force_bitbanging, msgs, num);
289}
290
291static u32 gmbus_func(struct i2c_adapter *adapter)
292{
293 return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
294 /* I2C_FUNC_10BIT_ADDR | */
295 I2C_FUNC_SMBUS_READ_BLOCK_DATA |
296 I2C_FUNC_SMBUS_BLOCK_PROC_CALL);
297}
298
299static const struct i2c_algorithm gmbus_algorithm = {
300 .master_xfer = gmbus_xfer,
301 .functionality = gmbus_func
302};
303
209/** 304/**
210 * intel_i2c_destroy - unregister and free i2c bus resources 305 * intel_gmbus_setup - instantiate all Intel i2c GMBuses
211 * @output: channel to free 306 * @dev: DRM device
212 *
213 * Unregister the adapter from the i2c layer, then free the structure.
214 */ 307 */
215void intel_i2c_destroy(struct i2c_adapter *adapter) 308int intel_setup_gmbus(struct drm_device *dev)
309{
310 static const char *names[] = {
311 "disabled",
312 "ssc",
313 "vga",
314 "panel",
315 "dpc",
316 "dpb",
317 "dpd",
318 "reserved"
319 };
320 struct drm_i915_private *dev_priv = dev->dev_private;
321 int ret, i;
322
323 dev_priv->gmbus = kcalloc(sizeof(struct intel_gmbus), GMBUS_NUM_PORTS,
324 GFP_KERNEL);
325 if (dev_priv->gmbus == NULL)
326 return -ENOMEM;
327
328 for (i = 0; i < GMBUS_NUM_PORTS; i++) {
329 struct intel_gmbus *bus = &dev_priv->gmbus[i];
330
331 bus->adapter.owner = THIS_MODULE;
332 bus->adapter.class = I2C_CLASS_DDC;
333 snprintf(bus->adapter.name,
334 I2C_NAME_SIZE,
335 "gmbus %s",
336 names[i]);
337
338 bus->adapter.dev.parent = &dev->pdev->dev;
339 bus->adapter.algo_data = dev_priv;
340
341 bus->adapter.algo = &gmbus_algorithm;
342 ret = i2c_add_adapter(&bus->adapter);
343 if (ret)
344 goto err;
345
346 bus->pin = i;
347 }
348
349 intel_i2c_reset(dev_priv->dev);
350
351 return 0;
352
353err:
354 while (--i) {
355 struct intel_gmbus *bus = &dev_priv->gmbus[i];
356 i2c_del_adapter(&bus->adapter);
357 }
358 kfree(dev_priv->gmbus);
359 dev_priv->gmbus = NULL;
360 return ret;
361}
362
363void intel_teardown_gmbus(struct drm_device *dev)
216{ 364{
217 struct intel_i2c_chan *chan; 365 struct drm_i915_private *dev_priv = dev->dev_private;
366 int i;
218 367
219 if (!adapter) 368 if (dev_priv->gmbus == NULL)
220 return; 369 return;
221 370
222 chan = container_of(adapter, 371 for (i = 0; i < GMBUS_NUM_PORTS; i++) {
223 struct intel_i2c_chan, 372 struct intel_gmbus *bus = &dev_priv->gmbus[i];
224 adapter); 373 if (bus->force_bitbanging) {
225 i2c_del_adapter(&chan->adapter); 374 i2c_del_adapter(bus->force_bitbanging);
226 kfree(chan); 375 kfree(bus->force_bitbanging);
376 }
377 i2c_del_adapter(&bus->adapter);
378 }
379
380 kfree(dev_priv->gmbus);
381 dev_priv->gmbus = NULL;
227} 382}
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 2ff4a5cb2d5..9177c17853e 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -474,11 +474,12 @@ static int intel_lvds_get_modes(struct drm_connector *connector)
474{ 474{
475 struct intel_lvds *intel_lvds = intel_attached_lvds(connector); 475 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
476 struct drm_device *dev = connector->dev; 476 struct drm_device *dev = connector->dev;
477 struct drm_i915_private *dev_priv = dev->dev_private;
477 struct drm_display_mode *mode; 478 struct drm_display_mode *mode;
478 479
479 if (intel_lvds->edid_good) { 480 if (intel_lvds->edid_good) {
480 int ret = intel_ddc_get_modes(connector, 481 int ret = intel_ddc_get_modes(connector,
481 intel_lvds->base.ddc_bus); 482 &dev_priv->gmbus[GMBUS_PORT_PANEL].adapter);
482 if (ret) 483 if (ret)
483 return ret; 484 return ret;
484 } 485 }
@@ -898,21 +899,12 @@ void intel_lvds_init(struct drm_device *dev)
898 * if closed, act like it's not there for now 899 * if closed, act like it's not there for now
899 */ 900 */
900 901
901 /* Set up the DDC bus. */
902 intel_encoder->ddc_bus = intel_i2c_create(intel_encoder,
903 gpio, "LVDSDDC_C");
904 if (!intel_encoder->ddc_bus) {
905 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
906 "failed.\n");
907 goto failed;
908 }
909
910 /* 902 /*
911 * Attempt to get the fixed panel mode from DDC. Assume that the 903 * Attempt to get the fixed panel mode from DDC. Assume that the
912 * preferred mode is the right one. 904 * preferred mode is the right one.
913 */ 905 */
914 intel_lvds->edid_good = true; 906 intel_lvds->edid_good = true;
915 if (!intel_ddc_get_modes(connector, intel_encoder->ddc_bus)) 907 if (!intel_ddc_get_modes(connector, &dev_priv->gmbus[GMBUS_PORT_PANEL].adapter))
916 intel_lvds->edid_good = false; 908 intel_lvds->edid_good = false;
917 909
918 if (!intel_lvds->edid_good) { 910 if (!intel_lvds->edid_good) {
@@ -999,8 +991,6 @@ out:
999 991
1000failed: 992failed:
1001 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); 993 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1002 if (intel_encoder->ddc_bus)
1003 intel_i2c_destroy(intel_encoder->ddc_bus);
1004 drm_connector_cleanup(connector); 994 drm_connector_cleanup(connector);
1005 drm_encoder_cleanup(encoder); 995 drm_encoder_cleanup(encoder);
1006 kfree(intel_lvds); 996 kfree(intel_lvds);
diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c
index 1138aa98573..f70b7cf32bf 100644
--- a/drivers/gpu/drm/i915/intel_modes.c
+++ b/drivers/gpu/drm/i915/intel_modes.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * Copyright (c) 2007 Dave Airlie <airlied@linux.ie> 2 * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
3 * Copyright (c) 2007 Intel Corporation 3 * Copyright (c) 2007, 2010 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com> 4 * Jesse Barnes <jesse.barnes@intel.com>
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -34,11 +34,11 @@
34 * intel_ddc_probe 34 * intel_ddc_probe
35 * 35 *
36 */ 36 */
37bool intel_ddc_probe(struct intel_encoder *intel_encoder) 37bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus)
38{ 38{
39 struct drm_i915_private *dev_priv = intel_encoder->base.dev->dev_private;
39 u8 out_buf[] = { 0x0, 0x0}; 40 u8 out_buf[] = { 0x0, 0x0};
40 u8 buf[2]; 41 u8 buf[2];
41 int ret;
42 struct i2c_msg msgs[] = { 42 struct i2c_msg msgs[] = {
43 { 43 {
44 .addr = 0x50, 44 .addr = 0x50,
@@ -54,13 +54,7 @@ bool intel_ddc_probe(struct intel_encoder *intel_encoder)
54 } 54 }
55 }; 55 };
56 56
57 intel_i2c_quirk_set(intel_encoder->base.dev, true); 57 return i2c_transfer(&dev_priv->gmbus[ddc_bus].adapter, msgs, 2) == 2;
58 ret = i2c_transfer(intel_encoder->ddc_bus, msgs, 2);
59 intel_i2c_quirk_set(intel_encoder->base.dev, false);
60 if (ret == 2)
61 return true;
62
63 return false;
64} 58}
65 59
66/** 60/**
@@ -76,9 +70,7 @@ int intel_ddc_get_modes(struct drm_connector *connector,
76 struct edid *edid; 70 struct edid *edid;
77 int ret = 0; 71 int ret = 0;
78 72
79 intel_i2c_quirk_set(connector->dev, true);
80 edid = drm_get_edid(connector, adapter); 73 edid = drm_get_edid(connector, adapter);
81 intel_i2c_quirk_set(connector->dev, false);
82 if (edid) { 74 if (edid) {
83 drm_mode_connector_update_edid_property(connector, edid); 75 drm_mode_connector_update_edid_property(connector, edid);
84 ret = drm_add_edid_modes(connector, edid); 76 ret = drm_add_edid_modes(connector, edid);
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index f7030e48108..2b3b4754c97 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -65,6 +65,7 @@ static const char *tv_format_names[] = {
65struct intel_sdvo { 65struct intel_sdvo {
66 struct intel_encoder base; 66 struct intel_encoder base;
67 67
68 struct i2c_adapter *i2c;
68 u8 slave_addr; 69 u8 slave_addr;
69 70
70 /* Register for the SDVO device: SDVOB or SDVOC */ 71 /* Register for the SDVO device: SDVOB or SDVOC */
@@ -264,7 +265,7 @@ static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
264 }; 265 };
265 int ret; 266 int ret;
266 267
267 if ((ret = i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 2)) == 2) 268 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
268 { 269 {
269 *ch = buf[0]; 270 *ch = buf[0];
270 return true; 271 return true;
@@ -286,7 +287,7 @@ static bool intel_sdvo_write_byte(struct intel_sdvo *intel_sdvo, int addr, u8 ch
286 } 287 }
287 }; 288 };
288 289
289 return i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 1) == 1; 290 return i2c_transfer(intel_sdvo->i2c, msgs, 1) == 1;
290} 291}
291 292
292#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} 293#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
@@ -566,7 +567,7 @@ static int intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
566 ret_value[0] = 0; 567 ret_value[0] = 0;
567 ret_value[1] = 0; 568 ret_value[1] = 0;
568 569
569 ret = i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 3); 570 ret = i2c_transfer(intel_sdvo->i2c, msgs, 3);
570 if (ret < 0) 571 if (ret < 0)
571 return ret; 572 return ret;
572 if (ret != 3) { 573 if (ret != 3) {
@@ -1375,6 +1376,19 @@ intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1375 return (caps > 1); 1376 return (caps > 1);
1376} 1377}
1377 1378
1379static struct edid *
1380intel_sdvo_get_edid(struct drm_connector *connector, int ddc)
1381{
1382 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1383 int ret;
1384
1385 ret = intel_sdvo_set_control_bus_switch(intel_sdvo, ddc);
1386 if (ret)
1387 return NULL;
1388
1389 return drm_get_edid(connector, intel_sdvo->i2c);
1390}
1391
1378static struct drm_connector * 1392static struct drm_connector *
1379intel_find_analog_connector(struct drm_device *dev) 1393intel_find_analog_connector(struct drm_device *dev)
1380{ 1394{
@@ -1418,28 +1432,12 @@ intel_analog_is_connected(struct drm_device *dev)
1418static struct edid * 1432static struct edid *
1419intel_sdvo_get_analog_edid(struct drm_connector *connector) 1433intel_sdvo_get_analog_edid(struct drm_connector *connector)
1420{ 1434{
1421 struct intel_encoder *encoder = intel_attached_encoder(connector); 1435 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1422 struct drm_device *dev = connector->dev;
1423 struct i2c_adapter *ddc;
1424 struct edid *edid;
1425 u32 ddc_reg;
1426
1427 if (!intel_analog_is_connected(dev))
1428 return NULL;
1429
1430 if (HAS_PCH_SPLIT(dev))
1431 ddc_reg = PCH_GPIOA;
1432 else
1433 ddc_reg = GPIOA;
1434 1436
1435 ddc = intel_i2c_create(encoder, ddc_reg, "SDVO/VGA DDC BUS"); 1437 if (!intel_analog_is_connected(connector->dev))
1436 if (ddc == NULL)
1437 return NULL; 1438 return NULL;
1438 1439
1439 edid = drm_get_edid(connector, ddc); 1440 return drm_get_edid(connector, &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1440 intel_i2c_destroy(ddc);
1441
1442 return edid;
1443} 1441}
1444 1442
1445enum drm_connector_status 1443enum drm_connector_status
@@ -1449,28 +1447,26 @@ intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1449 enum drm_connector_status status; 1447 enum drm_connector_status status;
1450 struct edid *edid; 1448 struct edid *edid;
1451 1449
1452 edid = drm_get_edid(connector, intel_sdvo->base.ddc_bus); 1450 edid = intel_sdvo_get_edid(connector, intel_sdvo->ddc_bus);
1453 1451
1454 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { 1452 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1455 u8 saved_ddc = intel_sdvo->ddc_bus, ddc; 1453 u8 ddc;
1456 1454
1457 /* 1455 /*
1458 * Don't use the 1 as the argument of DDC bus switch to get 1456 * Don't use the 1 as the argument of DDC bus switch to get
1459 * the EDID. It is used for SDVO SPD ROM. 1457 * the EDID. It is used for SDVO SPD ROM.
1460 */ 1458 */
1461 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1459 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1462 intel_sdvo->ddc_bus = ddc; 1460 edid = intel_sdvo_get_edid(connector, ddc);
1463 edid = drm_get_edid(connector, intel_sdvo->base.ddc_bus); 1461 if (edid) {
1464 if (edid) 1462 /*
1463 * If we found the EDID on the other bus,
1464 * assume that is the correct DDC bus.
1465 */
1466 intel_sdvo->ddc_bus = ddc;
1465 break; 1467 break;
1468 }
1466 } 1469 }
1467
1468 /*
1469 * If we found the EDID on the other bus, maybe that is the
1470 * correct DDC bus.
1471 */
1472 if (edid == NULL)
1473 intel_sdvo->ddc_bus = saved_ddc;
1474 } 1470 }
1475 1471
1476 /* 1472 /*
@@ -1546,12 +1542,9 @@ static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1546{ 1542{
1547 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1543 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1548 struct edid *edid; 1544 struct edid *edid;
1549 int num_modes;
1550 1545
1551 /* set the bus switch and get the modes */ 1546 /* set the bus switch and get the modes */
1552 num_modes = intel_ddc_get_modes(connector, intel_sdvo->base.ddc_bus); 1547 edid = intel_sdvo_get_edid(connector, intel_sdvo->ddc_bus);
1553 if (num_modes)
1554 return;
1555 1548
1556 /* 1549 /*
1557 * Mac mini hack. On this device, the DVI-I connector shares one DDC 1550 * Mac mini hack. On this device, the DVI-I connector shares one DDC
@@ -1559,7 +1552,9 @@ static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1559 * DDC fails, check to see if the analog output is disconnected, in 1552 * DDC fails, check to see if the analog output is disconnected, in
1560 * which case we'll look there for the digital DDC data. 1553 * which case we'll look there for the digital DDC data.
1561 */ 1554 */
1562 edid = intel_sdvo_get_analog_edid(connector); 1555 if (edid == NULL)
1556 edid = intel_sdvo_get_analog_edid(connector);
1557
1563 if (edid != NULL) { 1558 if (edid != NULL) {
1564 drm_mode_connector_update_edid_property(connector, edid); 1559 drm_mode_connector_update_edid_property(connector, edid);
1565 drm_add_edid_modes(connector, edid); 1560 drm_add_edid_modes(connector, edid);
@@ -1678,7 +1673,7 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1678 * Assume that the preferred modes are 1673 * Assume that the preferred modes are
1679 * arranged in priority order. 1674 * arranged in priority order.
1680 */ 1675 */
1681 intel_ddc_get_modes(connector, intel_sdvo->base.ddc_bus); 1676 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1682 if (list_empty(&connector->probed_modes) == false) 1677 if (list_empty(&connector->probed_modes) == false)
1683 goto end; 1678 goto end;
1684 1679
@@ -2004,30 +1999,6 @@ intel_sdvo_get_digital_encoding_mode(struct intel_sdvo *intel_sdvo, int device)
2004 &intel_sdvo->is_hdmi, 1); 1999 &intel_sdvo->is_hdmi, 1);
2005} 2000}
2006 2001
2007static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap,
2008 struct i2c_msg msgs[], int num)
2009{
2010 struct intel_sdvo *intel_sdvo;
2011 const struct i2c_algorithm *algo;
2012 int ret;
2013
2014 intel_sdvo = container_of(i2c_adap->algo_data,
2015 struct intel_sdvo,
2016 base);
2017 algo = intel_sdvo->base.i2c_bus->algo;
2018
2019 ret = intel_sdvo_set_control_bus_switch(intel_sdvo,
2020 intel_sdvo->ddc_bus);
2021 if (ret)
2022 return ret;
2023
2024 return algo->master_xfer(i2c_adap, msgs, num);
2025}
2026
2027static struct i2c_algorithm intel_sdvo_i2c_bit_algo = {
2028 .master_xfer = intel_sdvo_master_xfer,
2029};
2030
2031static u8 2002static u8
2032intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg) 2003intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
2033{ 2004{
@@ -2540,9 +2511,7 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2540 struct drm_i915_private *dev_priv = dev->dev_private; 2511 struct drm_i915_private *dev_priv = dev->dev_private;
2541 struct intel_encoder *intel_encoder; 2512 struct intel_encoder *intel_encoder;
2542 struct intel_sdvo *intel_sdvo; 2513 struct intel_sdvo *intel_sdvo;
2543 u8 ch[0x40];
2544 int i; 2514 int i;
2545 u32 i2c_reg, ddc_reg;
2546 2515
2547 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL); 2516 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2548 if (!intel_sdvo) 2517 if (!intel_sdvo)
@@ -2555,82 +2524,49 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2555 /* encoder type will be decided later */ 2524 /* encoder type will be decided later */
2556 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); 2525 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2557 2526
2558 if (HAS_PCH_SPLIT(dev)) { 2527 intel_sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
2559 i2c_reg = PCH_GPIOE;
2560 ddc_reg = PCH_GPIOE;
2561 } else {
2562 i2c_reg = GPIOE;
2563 ddc_reg = GPIOE;
2564 }
2565
2566 /* setup the DDC bus. */
2567 if (IS_SDVOB(sdvo_reg))
2568 intel_encoder->i2c_bus =
2569 intel_i2c_create(intel_encoder,
2570 i2c_reg, "SDVOCTRL_E for SDVOB");
2571 else
2572 intel_encoder->i2c_bus =
2573 intel_i2c_create(intel_encoder,
2574 i2c_reg, "SDVOCTRL_E for SDVOC");
2575
2576 if (!intel_encoder->i2c_bus)
2577 goto err_inteloutput;
2578 2528
2579 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg); 2529 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg);
2580 2530
2581 /* Save the bit-banging i2c functionality for use by the DDC wrapper */
2582 intel_sdvo_i2c_bit_algo.functionality = intel_encoder->i2c_bus->algo->functionality;
2583
2584 /* Read the regs to test if we can talk to the device */ 2531 /* Read the regs to test if we can talk to the device */
2585 for (i = 0; i < 0x40; i++) { 2532 for (i = 0; i < 0x40; i++) {
2586 if (!intel_sdvo_read_byte(intel_sdvo, i, &ch[i])) { 2533 u8 byte;
2534
2535 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2587 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n", 2536 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2588 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2537 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2589 goto err_i2c; 2538 goto err;
2590 } 2539 }
2591 } 2540 }
2592 2541
2593 /* setup the DDC bus. */ 2542 if (IS_SDVOB(sdvo_reg))
2594 if (IS_SDVOB(sdvo_reg)) {
2595 intel_encoder->ddc_bus =
2596 intel_i2c_create(intel_encoder,
2597 ddc_reg, "SDVOB DDC BUS");
2598 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS; 2543 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2599 } else { 2544 else
2600 intel_encoder->ddc_bus =
2601 intel_i2c_create(intel_encoder,
2602 ddc_reg, "SDVOC DDC BUS");
2603 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS; 2545 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2604 }
2605 if (intel_encoder->ddc_bus == NULL)
2606 goto err_i2c;
2607
2608 /* Wrap with our custom algo which switches to DDC mode */
2609 intel_encoder->ddc_bus->algo = &intel_sdvo_i2c_bit_algo;
2610 2546
2611 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs); 2547 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2612 2548
2613 /* In default case sdvo lvds is false */ 2549 /* In default case sdvo lvds is false */
2614 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) 2550 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2615 goto err_i2c; 2551 goto err;
2616 2552
2617 if (intel_sdvo_output_setup(intel_sdvo, 2553 if (intel_sdvo_output_setup(intel_sdvo,
2618 intel_sdvo->caps.output_flags) != true) { 2554 intel_sdvo->caps.output_flags) != true) {
2619 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", 2555 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2620 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2556 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2621 goto err_i2c; 2557 goto err;
2622 } 2558 }
2623 2559
2624 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); 2560 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2625 2561
2626 /* Set the input timing to the screen. Assume always input 0. */ 2562 /* Set the input timing to the screen. Assume always input 0. */
2627 if (!intel_sdvo_set_target_input(intel_sdvo)) 2563 if (!intel_sdvo_set_target_input(intel_sdvo))
2628 goto err_i2c; 2564 goto err;
2629 2565
2630 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, 2566 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2631 &intel_sdvo->pixel_clock_min, 2567 &intel_sdvo->pixel_clock_min,
2632 &intel_sdvo->pixel_clock_max)) 2568 &intel_sdvo->pixel_clock_max))
2633 goto err_i2c; 2569 goto err;
2634 2570
2635 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 2571 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2636 "clock range %dMHz - %dMHz, " 2572 "clock range %dMHz - %dMHz, "
@@ -2650,12 +2586,7 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2650 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 2586 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2651 return true; 2587 return true;
2652 2588
2653err_i2c: 2589err:
2654 if (intel_encoder->ddc_bus != NULL)
2655 intel_i2c_destroy(intel_encoder->ddc_bus);
2656 if (intel_encoder->i2c_bus != NULL)
2657 intel_i2c_destroy(intel_encoder->i2c_bus);
2658err_inteloutput:
2659 drm_encoder_cleanup(&intel_encoder->base); 2590 drm_encoder_cleanup(&intel_encoder->base);
2660 kfree(intel_sdvo); 2591 kfree(intel_sdvo);
2661 2592