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authorJack Morgenstein <jackm@dev.mellanox.co.il>2011-12-12 23:12:13 -0500
committerDavid S. Miller <davem@davemloft.net>2011-12-13 13:56:05 -0500
commitf5311ac109b21c9b47118655a5b6d887bcc686f8 (patch)
tree08b36eb29661485c60f101bb9f3f50be8a0eff2c /drivers
parentf9baff509f8a05a79626defdbdf4f4aa4efd373b (diff)
mlx4_core: Reduce number of PD bits to 17
When SRIOV is enabled on the chip (at FW burning time), the HCA uses only 17 bits for the PD. The remaining 7 high-order bits are ignored. Change the allocator to return only 17 bits for the PD. The MSB 7 bits will be used to encode the slave number for consistency checking later on in the resource tracker. Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/mlx4.h5
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/pd.c19
2 files changed, 18 insertions, 6 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
index 69177614666..51cba262baf 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
@@ -420,7 +420,7 @@ struct mlx4_mfunc_master_ctx {
420 struct work_struct slave_event_work; 420 struct work_struct slave_event_work;
421 struct work_struct slave_flr_event_work; 421 struct work_struct slave_flr_event_work;
422 spinlock_t slave_state_lock; 422 spinlock_t slave_state_lock;
423 u32 comm_arm_bit_vector[4]; 423 __be32 comm_arm_bit_vector[4];
424 struct mlx4_eqe cmd_eqe; 424 struct mlx4_eqe cmd_eqe;
425 struct mlx4_slave_event_eq slave_eq; 425 struct mlx4_slave_event_eq slave_eq;
426 struct mutex gen_eqe_mutex[MLX4_MFUNC_MAX]; 426 struct mutex gen_eqe_mutex[MLX4_MFUNC_MAX];
@@ -914,4 +914,7 @@ int mlx4_QUERY_IF_STAT_wrapper(struct mlx4_dev *dev, int slave,
914 struct mlx4_cmd_mailbox *inbox, 914 struct mlx4_cmd_mailbox *inbox,
915 struct mlx4_cmd_mailbox *outbox, 915 struct mlx4_cmd_mailbox *outbox,
916 struct mlx4_cmd_info *cmd); 916 struct mlx4_cmd_info *cmd);
917
918#define NOT_MASKED_PD_BITS 17
919
917#endif /* MLX4_H */ 920#endif /* MLX4_H */
diff --git a/drivers/net/ethernet/mellanox/mlx4/pd.c b/drivers/net/ethernet/mellanox/mlx4/pd.c
index 260ed259ce9..5c9a54df17a 100644
--- a/drivers/net/ethernet/mellanox/mlx4/pd.c
+++ b/drivers/net/ethernet/mellanox/mlx4/pd.c
@@ -31,6 +31,7 @@
31 * SOFTWARE. 31 * SOFTWARE.
32 */ 32 */
33 33
34#include <linux/init.h>
34#include <linux/errno.h> 35#include <linux/errno.h>
35#include <linux/export.h> 36#include <linux/export.h>
36#include <linux/io-mapping.h> 37#include <linux/io-mapping.h>
@@ -51,7 +52,8 @@ int mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn)
51 *pdn = mlx4_bitmap_alloc(&priv->pd_bitmap); 52 *pdn = mlx4_bitmap_alloc(&priv->pd_bitmap);
52 if (*pdn == -1) 53 if (*pdn == -1)
53 return -ENOMEM; 54 return -ENOMEM;
54 55 if (mlx4_is_mfunc(dev))
56 *pdn |= (dev->caps.function + 1) << NOT_MASKED_PD_BITS;
55 return 0; 57 return 0;
56} 58}
57EXPORT_SYMBOL_GPL(mlx4_pd_alloc); 59EXPORT_SYMBOL_GPL(mlx4_pd_alloc);
@@ -85,7 +87,8 @@ int mlx4_init_pd_table(struct mlx4_dev *dev)
85 struct mlx4_priv *priv = mlx4_priv(dev); 87 struct mlx4_priv *priv = mlx4_priv(dev);
86 88
87 return mlx4_bitmap_init(&priv->pd_bitmap, dev->caps.num_pds, 89 return mlx4_bitmap_init(&priv->pd_bitmap, dev->caps.num_pds,
88 (1 << 24) - 1, dev->caps.reserved_pds, 0); 90 (1 << NOT_MASKED_PD_BITS) - 1,
91 dev->caps.reserved_pds, 0);
89} 92}
90 93
91void mlx4_cleanup_pd_table(struct mlx4_dev *dev) 94void mlx4_cleanup_pd_table(struct mlx4_dev *dev)
@@ -108,13 +111,19 @@ void mlx4_cleanup_xrcd_table(struct mlx4_dev *dev)
108 111
109int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar) 112int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar)
110{ 113{
114 int offset;
115
111 uar->index = mlx4_bitmap_alloc(&mlx4_priv(dev)->uar_table.bitmap); 116 uar->index = mlx4_bitmap_alloc(&mlx4_priv(dev)->uar_table.bitmap);
112 if (uar->index == -1) 117 if (uar->index == -1)
113 return -ENOMEM; 118 return -ENOMEM;
114 119
115 uar->pfn = (pci_resource_start(dev->pdev, 2) >> PAGE_SHIFT) + uar->index; 120 if (mlx4_is_slave(dev))
121 offset = uar->index % ((int) pci_resource_len(dev->pdev, 2) /
122 dev->caps.uar_page_size);
123 else
124 offset = uar->index;
125 uar->pfn = (pci_resource_start(dev->pdev, 2) >> PAGE_SHIFT) + offset;
116 uar->map = NULL; 126 uar->map = NULL;
117
118 return 0; 127 return 0;
119} 128}
120EXPORT_SYMBOL_GPL(mlx4_uar_alloc); 129EXPORT_SYMBOL_GPL(mlx4_uar_alloc);
@@ -232,7 +241,7 @@ int mlx4_init_uar_table(struct mlx4_dev *dev)
232 241
233 return mlx4_bitmap_init(&mlx4_priv(dev)->uar_table.bitmap, 242 return mlx4_bitmap_init(&mlx4_priv(dev)->uar_table.bitmap,
234 dev->caps.num_uars, dev->caps.num_uars - 1, 243 dev->caps.num_uars, dev->caps.num_uars - 1,
235 max(128, dev->caps.reserved_uars), 0); 244 dev->caps.reserved_uars, 0);
236} 245}
237 246
238void mlx4_cleanup_uar_table(struct mlx4_dev *dev) 247void mlx4_cleanup_uar_table(struct mlx4_dev *dev)