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authorMatt Carlson <mcarlson@broadcom.com>2011-03-09 11:58:24 -0500
committerDavid S. Miller <davem@davemloft.net>2011-03-10 04:56:13 -0500
commite256f8a35179f3795a200912b79c369676ecb669 (patch)
treebd0d33470a32cbccfcc08a42b9185843f5241618 /drivers
parent683644b74783725971e5ff61618bd932c5361c3f (diff)
tg3: Move tg3_init_link_config to tg3_phy_probe
This patch moves the function that initializes the link configuration closer to the place where the rest of the phy code is initialized. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/tg3.c69
1 files changed, 35 insertions, 34 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 159eb230f1a..2c67cc95462 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -12557,12 +12557,45 @@ static u32 __devinit tg3_read_otp_phycfg(struct tg3 *tp)
12557 return ((thalf_otp & 0x0000ffff) << 16) | (bhalf_otp >> 16); 12557 return ((thalf_otp & 0x0000ffff) << 16) | (bhalf_otp >> 16);
12558} 12558}
12559 12559
12560static void __devinit tg3_phy_init_link_config(struct tg3 *tp)
12561{
12562 u32 adv = ADVERTISED_Autoneg |
12563 ADVERTISED_Pause;
12564
12565 if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY))
12566 adv |= ADVERTISED_1000baseT_Half |
12567 ADVERTISED_1000baseT_Full;
12568
12569 if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES))
12570 adv |= ADVERTISED_100baseT_Half |
12571 ADVERTISED_100baseT_Full |
12572 ADVERTISED_10baseT_Half |
12573 ADVERTISED_10baseT_Full |
12574 ADVERTISED_TP;
12575 else
12576 adv |= ADVERTISED_FIBRE;
12577
12578 tp->link_config.advertising = adv;
12579 tp->link_config.speed = SPEED_INVALID;
12580 tp->link_config.duplex = DUPLEX_INVALID;
12581 tp->link_config.autoneg = AUTONEG_ENABLE;
12582 tp->link_config.active_speed = SPEED_INVALID;
12583 tp->link_config.active_duplex = DUPLEX_INVALID;
12584 tp->link_config.orig_speed = SPEED_INVALID;
12585 tp->link_config.orig_duplex = DUPLEX_INVALID;
12586 tp->link_config.orig_autoneg = AUTONEG_INVALID;
12587}
12588
12560static int __devinit tg3_phy_probe(struct tg3 *tp) 12589static int __devinit tg3_phy_probe(struct tg3 *tp)
12561{ 12590{
12562 u32 hw_phy_id_1, hw_phy_id_2; 12591 u32 hw_phy_id_1, hw_phy_id_2;
12563 u32 hw_phy_id, hw_phy_id_masked; 12592 u32 hw_phy_id, hw_phy_id_masked;
12564 int err; 12593 int err;
12565 12594
12595 /* flow control autonegotiation is default behavior */
12596 tp->tg3_flags |= TG3_FLAG_PAUSE_AUTONEG;
12597 tp->link_config.flowctrl = FLOW_CTRL_TX | FLOW_CTRL_RX;
12598
12566 if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) 12599 if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB)
12567 return tg3_phy_init(tp); 12600 return tg3_phy_init(tp);
12568 12601
@@ -12624,6 +12657,8 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
12624 tp->pci_chip_rev_id != CHIPREV_ID_57765_A0))) 12657 tp->pci_chip_rev_id != CHIPREV_ID_57765_A0)))
12625 tp->phy_flags |= TG3_PHYFLG_EEE_CAP; 12658 tp->phy_flags |= TG3_PHYFLG_EEE_CAP;
12626 12659
12660 tg3_phy_init_link_config(tp);
12661
12627 if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES) && 12662 if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES) &&
12628 !(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) && 12663 !(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) &&
12629 !(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) { 12664 !(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) {
@@ -12679,17 +12714,6 @@ skip_phy_reset:
12679 err = tg3_init_5401phy_dsp(tp); 12714 err = tg3_init_5401phy_dsp(tp);
12680 } 12715 }
12681 12716
12682 if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES)
12683 tp->link_config.advertising =
12684 (ADVERTISED_1000baseT_Half |
12685 ADVERTISED_1000baseT_Full |
12686 ADVERTISED_Autoneg |
12687 ADVERTISED_FIBRE);
12688 if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY)
12689 tp->link_config.advertising &=
12690 ~(ADVERTISED_1000baseT_Half |
12691 ADVERTISED_1000baseT_Full);
12692
12693 return err; 12717 return err;
12694} 12718}
12695 12719
@@ -14422,23 +14446,6 @@ out_nofree:
14422 return ret; 14446 return ret;
14423} 14447}
14424 14448
14425static void __devinit tg3_init_link_config(struct tg3 *tp)
14426{
14427 tp->link_config.advertising =
14428 (ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
14429 ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full |
14430 ADVERTISED_1000baseT_Half | ADVERTISED_1000baseT_Full |
14431 ADVERTISED_Autoneg | ADVERTISED_MII);
14432 tp->link_config.speed = SPEED_INVALID;
14433 tp->link_config.duplex = DUPLEX_INVALID;
14434 tp->link_config.autoneg = AUTONEG_ENABLE;
14435 tp->link_config.active_speed = SPEED_INVALID;
14436 tp->link_config.active_duplex = DUPLEX_INVALID;
14437 tp->link_config.orig_speed = SPEED_INVALID;
14438 tp->link_config.orig_duplex = DUPLEX_INVALID;
14439 tp->link_config.orig_autoneg = AUTONEG_INVALID;
14440}
14441
14442static void __devinit tg3_init_bufmgr_config(struct tg3 *tp) 14449static void __devinit tg3_init_bufmgr_config(struct tg3 *tp)
14443{ 14450{
14444 if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS) { 14451 if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS) {
@@ -14742,8 +14749,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
14742 goto err_out_free_dev; 14749 goto err_out_free_dev;
14743 } 14750 }
14744 14751
14745 tg3_init_link_config(tp);
14746
14747 tp->rx_pending = TG3_DEF_RX_RING_PENDING; 14752 tp->rx_pending = TG3_DEF_RX_RING_PENDING;
14748 tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING; 14753 tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING;
14749 14754
@@ -14891,10 +14896,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
14891 goto err_out_apeunmap; 14896 goto err_out_apeunmap;
14892 } 14897 }
14893 14898
14894 /* flow control autonegotiation is default behavior */
14895 tp->tg3_flags |= TG3_FLAG_PAUSE_AUTONEG;
14896 tp->link_config.flowctrl = FLOW_CTRL_TX | FLOW_CTRL_RX;
14897
14898 intmbx = MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW; 14899 intmbx = MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW;
14899 rcvmbx = MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW; 14900 rcvmbx = MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW;
14900 sndmbx = MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW; 14901 sndmbx = MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW;