diff options
author | Alan Cox <alan@linux.intel.com> | 2011-02-01 10:41:45 -0500 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-02-04 16:01:00 -0500 |
commit | ae3a08aab5e0700d3f80162bed07a2157bd304f4 (patch) | |
tree | 6fb5f248647a7466020b71f67e0fc1c452ac3bc3 /drivers | |
parent | 072e9f609cd6d144b64da50b03b712d87b302e12 (diff) |
staging: et131x: Kill of the eFLOW_CONTROL enum
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/staging/et131x/et1310_mac.c | 22 | ||||
-rw-r--r-- | drivers/staging/et131x/et1310_phy.c | 12 | ||||
-rw-r--r-- | drivers/staging/et131x/et1310_tx.c | 4 | ||||
-rw-r--r-- | drivers/staging/et131x/et131x_adapter.h | 20 | ||||
-rw-r--r-- | drivers/staging/et131x/et131x_isr.c | 10 |
5 files changed, 33 insertions, 35 deletions
diff --git a/drivers/staging/et131x/et1310_mac.c b/drivers/staging/et131x/et1310_mac.c index 43da5396454..78f72fa5d5e 100644 --- a/drivers/staging/et131x/et1310_mac.c +++ b/drivers/staging/et131x/et1310_mac.c | |||
@@ -191,7 +191,7 @@ void ConfigMACRegs2(struct et131x_adapter *etdev) | |||
191 | cfg1 |= CFG1_RX_ENABLE|CFG1_TX_ENABLE|CFG1_TX_FLOW; | 191 | cfg1 |= CFG1_RX_ENABLE|CFG1_TX_ENABLE|CFG1_TX_FLOW; |
192 | /* Initialize loop back to off */ | 192 | /* Initialize loop back to off */ |
193 | cfg1 &= ~(CFG1_LOOPBACK|CFG1_RX_FLOW); | 193 | cfg1 &= ~(CFG1_LOOPBACK|CFG1_RX_FLOW); |
194 | if (etdev->FlowControl == RxOnly || etdev->FlowControl == Both) | 194 | if (etdev->flowcontrol == FLOW_RXONLY || etdev->flowcontrol == FLOW_BOTH) |
195 | cfg1 |= CFG1_RX_FLOW; | 195 | cfg1 |= CFG1_RX_FLOW; |
196 | writel(cfg1, &pMac->cfg1); | 196 | writel(cfg1, &pMac->cfg1); |
197 | 197 | ||
@@ -373,7 +373,7 @@ void ConfigTxMacRegs(struct et131x_adapter *etdev) | |||
373 | * cfpt - control frame pause timer set to 64 (0x40) | 373 | * cfpt - control frame pause timer set to 64 (0x40) |
374 | * cfep - control frame extended pause timer set to 0x0 | 374 | * cfep - control frame extended pause timer set to 0x0 |
375 | */ | 375 | */ |
376 | if (etdev->FlowControl == None) | 376 | if (etdev->flowcontrol == FLOW_NONE) |
377 | writel(0, &txmac->cf_param); | 377 | writel(0, &txmac->cf_param); |
378 | else | 378 | else |
379 | writel(0x40, &txmac->cf_param); | 379 | writel(0x40, &txmac->cf_param); |
@@ -414,7 +414,7 @@ void ConfigMacStatRegs(struct et131x_adapter *etdev) | |||
414 | void ConfigFlowControl(struct et131x_adapter *etdev) | 414 | void ConfigFlowControl(struct et131x_adapter *etdev) |
415 | { | 415 | { |
416 | if (etdev->duplex_mode == 0) { | 416 | if (etdev->duplex_mode == 0) { |
417 | etdev->FlowControl = None; | 417 | etdev->flowcontrol = FLOW_NONE; |
418 | } else { | 418 | } else { |
419 | char remote_pause, remote_async_pause; | 419 | char remote_pause, remote_async_pause; |
420 | 420 | ||
@@ -426,22 +426,22 @@ void ConfigFlowControl(struct et131x_adapter *etdev) | |||
426 | 426 | ||
427 | if ((remote_pause == TRUEPHY_BIT_SET) && | 427 | if ((remote_pause == TRUEPHY_BIT_SET) && |
428 | (remote_async_pause == TRUEPHY_BIT_SET)) { | 428 | (remote_async_pause == TRUEPHY_BIT_SET)) { |
429 | etdev->FlowControl = etdev->RegistryFlowControl; | 429 | etdev->flowcontrol = etdev->wanted_flow; |
430 | } else if ((remote_pause == TRUEPHY_BIT_SET) && | 430 | } else if ((remote_pause == TRUEPHY_BIT_SET) && |
431 | (remote_async_pause == TRUEPHY_BIT_CLEAR)) { | 431 | (remote_async_pause == TRUEPHY_BIT_CLEAR)) { |
432 | if (etdev->RegistryFlowControl == Both) | 432 | if (etdev->wanted_flow == FLOW_BOTH) |
433 | etdev->FlowControl = Both; | 433 | etdev->flowcontrol = FLOW_BOTH; |
434 | else | 434 | else |
435 | etdev->FlowControl = None; | 435 | etdev->flowcontrol = FLOW_NONE; |
436 | } else if ((remote_pause == TRUEPHY_BIT_CLEAR) && | 436 | } else if ((remote_pause == TRUEPHY_BIT_CLEAR) && |
437 | (remote_async_pause == TRUEPHY_BIT_CLEAR)) { | 437 | (remote_async_pause == TRUEPHY_BIT_CLEAR)) { |
438 | etdev->FlowControl = None; | 438 | etdev->flowcontrol = FLOW_NONE; |
439 | } else {/* if (remote_pause == TRUEPHY_CLEAR_BIT && | 439 | } else {/* if (remote_pause == TRUEPHY_CLEAR_BIT && |
440 | remote_async_pause == TRUEPHY_SET_BIT) */ | 440 | remote_async_pause == TRUEPHY_SET_BIT) */ |
441 | if (etdev->RegistryFlowControl == Both) | 441 | if (etdev->wanted_flow == FLOW_BOTH) |
442 | etdev->FlowControl = RxOnly; | 442 | etdev->flowcontrol = FLOW_RXONLY; |
443 | else | 443 | else |
444 | etdev->FlowControl = None; | 444 | etdev->flowcontrol = FLOW_NONE; |
445 | } | 445 | } |
446 | } | 446 | } |
447 | } | 447 | } |
diff --git a/drivers/staging/et131x/et1310_phy.c b/drivers/staging/et131x/et1310_phy.c index f07e0339953..5eab21ac00f 100644 --- a/drivers/staging/et131x/et1310_phy.c +++ b/drivers/staging/et131x/et1310_phy.c | |||
@@ -618,15 +618,15 @@ static void et131x_xcvr_init(struct et131x_adapter *etdev) | |||
618 | 618 | ||
619 | /* Determine if we need to go into a force mode and set it */ | 619 | /* Determine if we need to go into a force mode and set it */ |
620 | if (etdev->AiForceSpeed == 0 && etdev->AiForceDpx == 0) { | 620 | if (etdev->AiForceSpeed == 0 && etdev->AiForceDpx == 0) { |
621 | if (etdev->RegistryFlowControl == TxOnly || | 621 | if (etdev->wanted_flow == FLOW_TXONLY || |
622 | etdev->RegistryFlowControl == Both) | 622 | etdev->wanted_flow == FLOW_BOTH) |
623 | ET1310_PhyAccessMiBit(etdev, | 623 | ET1310_PhyAccessMiBit(etdev, |
624 | TRUEPHY_BIT_SET, 4, 11, NULL); | 624 | TRUEPHY_BIT_SET, 4, 11, NULL); |
625 | else | 625 | else |
626 | ET1310_PhyAccessMiBit(etdev, | 626 | ET1310_PhyAccessMiBit(etdev, |
627 | TRUEPHY_BIT_CLEAR, 4, 11, NULL); | 627 | TRUEPHY_BIT_CLEAR, 4, 11, NULL); |
628 | 628 | ||
629 | if (etdev->RegistryFlowControl == Both) | 629 | if (etdev->wanted_flow == FLOW_BOTH) |
630 | ET1310_PhyAccessMiBit(etdev, | 630 | ET1310_PhyAccessMiBit(etdev, |
631 | TRUEPHY_BIT_SET, 4, 10, NULL); | 631 | TRUEPHY_BIT_SET, 4, 10, NULL); |
632 | else | 632 | else |
@@ -645,15 +645,15 @@ static void et131x_xcvr_init(struct et131x_adapter *etdev) | |||
645 | 645 | ||
646 | /* Set to the correct force mode. */ | 646 | /* Set to the correct force mode. */ |
647 | if (etdev->AiForceDpx != 1) { | 647 | if (etdev->AiForceDpx != 1) { |
648 | if (etdev->RegistryFlowControl == TxOnly || | 648 | if (etdev->wanted_flow == FLOW_TXONLY || |
649 | etdev->RegistryFlowControl == Both) | 649 | etdev->wanted_flow == FLOW_BOTH) |
650 | ET1310_PhyAccessMiBit(etdev, | 650 | ET1310_PhyAccessMiBit(etdev, |
651 | TRUEPHY_BIT_SET, 4, 11, NULL); | 651 | TRUEPHY_BIT_SET, 4, 11, NULL); |
652 | else | 652 | else |
653 | ET1310_PhyAccessMiBit(etdev, | 653 | ET1310_PhyAccessMiBit(etdev, |
654 | TRUEPHY_BIT_CLEAR, 4, 11, NULL); | 654 | TRUEPHY_BIT_CLEAR, 4, 11, NULL); |
655 | 655 | ||
656 | if (etdev->RegistryFlowControl == Both) | 656 | if (etdev->wanted_flow == FLOW_BOTH) |
657 | ET1310_PhyAccessMiBit(etdev, | 657 | ET1310_PhyAccessMiBit(etdev, |
658 | TRUEPHY_BIT_SET, 4, 10, NULL); | 658 | TRUEPHY_BIT_SET, 4, 10, NULL); |
659 | else | 659 | else |
diff --git a/drivers/staging/et131x/et1310_tx.c b/drivers/staging/et131x/et1310_tx.c index 0f3473d758e..4241d2afecc 100644 --- a/drivers/staging/et131x/et1310_tx.c +++ b/drivers/staging/et131x/et1310_tx.c | |||
@@ -547,7 +547,7 @@ static int nic_send_packet(struct et131x_adapter *etdev, struct tcb *tcb) | |||
547 | tcb->index_start = etdev->tx_ring.send_idx; | 547 | tcb->index_start = etdev->tx_ring.send_idx; |
548 | tcb->stale = 0; | 548 | tcb->stale = 0; |
549 | 549 | ||
550 | spin_lock_irqsave(&etdev->SendHWLock, flags); | 550 | spin_lock_irqsave(&etdev->send_hw_lock, flags); |
551 | 551 | ||
552 | thiscopy = NUM_DESC_PER_RING_TX - | 552 | thiscopy = NUM_DESC_PER_RING_TX - |
553 | INDEX10(etdev->tx_ring.send_idx); | 553 | INDEX10(etdev->tx_ring.send_idx); |
@@ -613,7 +613,7 @@ static int nic_send_packet(struct et131x_adapter *etdev, struct tcb *tcb) | |||
613 | writel(PARM_TX_TIME_INT_DEF * NANO_IN_A_MICRO, | 613 | writel(PARM_TX_TIME_INT_DEF * NANO_IN_A_MICRO, |
614 | &etdev->regs->global.watchdog_timer); | 614 | &etdev->regs->global.watchdog_timer); |
615 | } | 615 | } |
616 | spin_unlock_irqrestore(&etdev->SendHWLock, flags); | 616 | spin_unlock_irqrestore(&etdev->send_hw_lock, flags); |
617 | 617 | ||
618 | return 0; | 618 | return 0; |
619 | } | 619 | } |
diff --git a/drivers/staging/et131x/et131x_adapter.h b/drivers/staging/et131x/et131x_adapter.h index 2398a6ec8ac..430947b3967 100644 --- a/drivers/staging/et131x/et131x_adapter.h +++ b/drivers/staging/et131x/et131x_adapter.h | |||
@@ -91,13 +91,11 @@ typedef struct _MP_RFD { | |||
91 | u8 ringindex; | 91 | u8 ringindex; |
92 | } MP_RFD, *PMP_RFD; | 92 | } MP_RFD, *PMP_RFD; |
93 | 93 | ||
94 | /* Enum for Flow Control */ | 94 | /* Flow Control */ |
95 | typedef enum _eflow_control_t { | 95 | #define FLOW_BOTH 0 |
96 | Both = 0, | 96 | #define FLOW_TXONLY 1 |
97 | TxOnly = 1, | 97 | #define FLOW_RXONLY 2 |
98 | RxOnly = 2, | 98 | #define FLOW_NONE 3 |
99 | None = 3 | ||
100 | } eFLOW_CONTROL_t, *PeFLOW_CONTROL_t; | ||
101 | 99 | ||
102 | /* Struct to define some device statistics */ | 100 | /* Struct to define some device statistics */ |
103 | typedef struct _ce_stats_t { | 101 | typedef struct _ce_stats_t { |
@@ -185,7 +183,7 @@ struct et131x_adapter { | |||
185 | spinlock_t TCBReadyQLock; | 183 | spinlock_t TCBReadyQLock; |
186 | spinlock_t send_hw_lock; | 184 | spinlock_t send_hw_lock; |
187 | 185 | ||
188 | spinlock_t RcvLock; | 186 | spinlock_t rcv_lock; |
189 | spinlock_t RcvPendLock; | 187 | spinlock_t RcvPendLock; |
190 | spinlock_t FbrLock; | 188 | spinlock_t FbrLock; |
191 | 189 | ||
@@ -205,7 +203,7 @@ struct et131x_adapter { | |||
205 | 203 | ||
206 | /* Registry parameters */ | 204 | /* Registry parameters */ |
207 | u8 SpeedDuplex; /* speed/duplex */ | 205 | u8 SpeedDuplex; /* speed/duplex */ |
208 | eFLOW_CONTROL_t RegistryFlowControl; /* for 802.3x flow control */ | 206 | u8 wanted_flow; /* Flow we want for 802.3x flow control */ |
209 | u8 RegistryPhyComa; /* Phy Coma mode enable/disable */ | 207 | u8 RegistryPhyComa; /* Phy Coma mode enable/disable */ |
210 | 208 | ||
211 | u32 RegistryRxMemEnd; /* Size of internal rx memory */ | 209 | u32 RegistryRxMemEnd; /* Size of internal rx memory */ |
@@ -214,8 +212,8 @@ struct et131x_adapter { | |||
214 | 212 | ||
215 | /* Derived from the registry: */ | 213 | /* Derived from the registry: */ |
216 | u8 AiForceDpx; /* duplex setting */ | 214 | u8 AiForceDpx; /* duplex setting */ |
217 | u16 AiForceSpeed; /* 'Speed', user over-ride of line speed */ | 215 | u16 AiForceSpeed; /* 'Speed', user over-ride of line speed */ |
218 | eFLOW_CONTROL_t FlowControl; /* flow control validated by the far-end */ | 216 | u8 flowcontrol; /* flow control validated by the far-end */ |
219 | enum { | 217 | enum { |
220 | NETIF_STATUS_INVALID = 0, | 218 | NETIF_STATUS_INVALID = 0, |
221 | NETIF_STATUS_MEDIA_CONNECT, | 219 | NETIF_STATUS_MEDIA_CONNECT, |
diff --git a/drivers/staging/et131x/et131x_isr.c b/drivers/staging/et131x/et131x_isr.c index 36f68fe3e8c..0cc6c68fdfd 100644 --- a/drivers/staging/et131x/et131x_isr.c +++ b/drivers/staging/et131x/et131x_isr.c | |||
@@ -119,7 +119,7 @@ void et131x_enable_interrupts(struct et131x_adapter *adapter) | |||
119 | u32 mask; | 119 | u32 mask; |
120 | 120 | ||
121 | /* Enable all global interrupts */ | 121 | /* Enable all global interrupts */ |
122 | if (adapter->FlowControl == TxOnly || adapter->FlowControl == Both) | 122 | if (adapter->flowcontrol == FLOW_TXONLY || adapter->flowcontrol == FLOW_BOTH) |
123 | mask = INT_MASK_ENABLE; | 123 | mask = INT_MASK_ENABLE; |
124 | else | 124 | else |
125 | mask = INT_MASK_ENABLE_NO_FLOW; | 125 | mask = INT_MASK_ENABLE_NO_FLOW; |
@@ -177,8 +177,8 @@ irqreturn_t et131x_isr(int irq, void *dev_id) | |||
177 | */ | 177 | */ |
178 | status = readl(&adapter->regs->global.int_status); | 178 | status = readl(&adapter->regs->global.int_status); |
179 | 179 | ||
180 | if (adapter->FlowControl == TxOnly || | 180 | if (adapter->flowcontrol == FLOW_TXONLY || |
181 | adapter->FlowControl == Both) { | 181 | adapter->flowcontrol == FLOW_BOTH) { |
182 | status &= ~INT_MASK_ENABLE; | 182 | status &= ~INT_MASK_ENABLE; |
183 | } else { | 183 | } else { |
184 | status &= ~INT_MASK_ENABLE_NO_FLOW; | 184 | status &= ~INT_MASK_ENABLE_NO_FLOW; |
@@ -295,8 +295,8 @@ void et131x_isr_handler(struct work_struct *work) | |||
295 | /* If the user has flow control on, then we will | 295 | /* If the user has flow control on, then we will |
296 | * send a pause packet, otherwise just exit | 296 | * send a pause packet, otherwise just exit |
297 | */ | 297 | */ |
298 | if (etdev->FlowControl == TxOnly || | 298 | if (etdev->flowcontrol == FLOW_TXONLY || |
299 | etdev->FlowControl == Both) { | 299 | etdev->flowcontrol == FLOW_BOTH) { |
300 | u32 pm_csr; | 300 | u32 pm_csr; |
301 | 301 | ||
302 | /* Tell the device to send a pause packet via | 302 | /* Tell the device to send a pause packet via |