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authorBen Skeggs <bskeggs@redhat.com>2011-08-03 21:04:47 -0400
committerBen Skeggs <bskeggs@redhat.com>2011-09-20 02:10:19 -0400
commita002feceb7852964af579ece784b0123869f1e3f (patch)
tree971a8aa550f6800b1164dca99706bcaa10eef34c /drivers
parenta8e415d3eb1bed184d73e22c62cd1f992bd33d63 (diff)
drm/nouveau/dp: pass in required datarate to link training
Not used currently, but it will be used in preference to pre-determined lane/bandwidth numbers at a later point. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_dp.c2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_encoder.h1
-rw-r--r--drivers/gpu/drm/nouveau/nv50_sor.c13
4 files changed, 11 insertions, 7 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c b/drivers/gpu/drm/nouveau/nouveau_dp.c
index ae1b6e00bd9..6a756a00d00 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -507,7 +507,7 @@ nouveau_dp_link_train_commit(struct drm_encoder *encoder, uint8_t *config)
507} 507}
508 508
509bool 509bool
510nouveau_dp_link_train(struct drm_encoder *encoder) 510nouveau_dp_link_train(struct drm_encoder *encoder, u32 datarate)
511{ 511{
512 struct drm_device *dev = encoder->dev; 512 struct drm_device *dev = encoder->dev;
513 struct drm_nouveau_private *dev_priv = dev->dev_private; 513 struct drm_nouveau_private *dev_priv = dev->dev_private;
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 3e9e7cc09a7..8cca5ff3add 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -1100,7 +1100,7 @@ int nouveau_ttm_mmap(struct file *, struct vm_area_struct *);
1100int nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr, 1100int nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr,
1101 uint8_t *data, int data_nr); 1101 uint8_t *data, int data_nr);
1102bool nouveau_dp_detect(struct drm_encoder *); 1102bool nouveau_dp_detect(struct drm_encoder *);
1103bool nouveau_dp_link_train(struct drm_encoder *); 1103bool nouveau_dp_link_train(struct drm_encoder *, u32 datarate);
1104void nouveau_dp_tu_update(struct drm_device *, int, int, u32, u32); 1104void nouveau_dp_tu_update(struct drm_device *, int, int, u32, u32);
1105 1105
1106/* nv04_fb.c */ 1106/* nv04_fb.c */
diff --git a/drivers/gpu/drm/nouveau/nouveau_encoder.h b/drivers/gpu/drm/nouveau/nouveau_encoder.h
index 70f0232558f..fc5ee0d6857 100644
--- a/drivers/gpu/drm/nouveau/nouveau_encoder.h
+++ b/drivers/gpu/drm/nouveau/nouveau_encoder.h
@@ -53,6 +53,7 @@ struct nouveau_encoder {
53 int link_nr; 53 int link_nr;
54 int link_bw; 54 int link_bw;
55 bool enhanced_frame; 55 bool enhanced_frame;
56 u32 datarate;
56 } dp; 57 } dp;
57 }; 58 };
58}; 59};
diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c
index f359f94626c..2633aa8554e 100644
--- a/drivers/gpu/drm/nouveau/nv50_sor.c
+++ b/drivers/gpu/drm/nouveau/nv50_sor.c
@@ -124,7 +124,7 @@ nv50_sor_dpms(struct drm_encoder *encoder, int mode)
124 if (mode == DRM_MODE_DPMS_ON) { 124 if (mode == DRM_MODE_DPMS_ON) {
125 u8 status = DP_SET_POWER_D0; 125 u8 status = DP_SET_POWER_D0;
126 nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1); 126 nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1);
127 nouveau_dp_link_train(encoder); 127 nouveau_dp_link_train(encoder, nv_encoder->dp.datarate);
128 } else { 128 } else {
129 u8 status = DP_SET_POWER_D3; 129 u8 status = DP_SET_POWER_D3;
130 nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1); 130 nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1);
@@ -194,8 +194,6 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
194 NV_DEBUG_KMS(dev, "or %d type %d -> crtc %d\n", 194 NV_DEBUG_KMS(dev, "or %d type %d -> crtc %d\n",
195 nv_encoder->or, nv_encoder->dcb->type, crtc->index); 195 nv_encoder->or, nv_encoder->dcb->type, crtc->index);
196 196
197 nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
198
199 switch (nv_encoder->dcb->type) { 197 switch (nv_encoder->dcb->type) {
200 case OUTPUT_TMDS: 198 case OUTPUT_TMDS:
201 if (nv_encoder->dcb->sorconf.link & 1) { 199 if (nv_encoder->dcb->sorconf.link & 1) {
@@ -208,10 +206,13 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
208 break; 206 break;
209 case OUTPUT_DP: 207 case OUTPUT_DP:
210 nv_connector = nouveau_encoder_connector_get(nv_encoder); 208 nv_connector = nouveau_encoder_connector_get(nv_encoder);
211 if (nv_connector && nv_connector->base.display_info.bpc == 6) 209 if (nv_connector && nv_connector->base.display_info.bpc == 6) {
210 nv_encoder->dp.datarate = crtc->mode->clock * 18 / 8;
212 mode_ctl |= 0x00020000; 211 mode_ctl |= 0x00020000;
213 else 212 } else {
213 nv_encoder->dp.datarate = crtc->mode->clock * 24 / 8;
214 mode_ctl |= 0x00050000; 214 mode_ctl |= 0x00050000;
215 }
215 216
216 if (nv_encoder->dcb->sorconf.link & 1) 217 if (nv_encoder->dcb->sorconf.link & 1)
217 mode_ctl |= 0x00000800; 218 mode_ctl |= 0x00000800;
@@ -233,6 +234,8 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
233 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) 234 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
234 mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NVSYNC; 235 mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NVSYNC;
235 236
237 nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
238
236 ret = RING_SPACE(evo, 2); 239 ret = RING_SPACE(evo, 2);
237 if (ret) { 240 if (ret) {
238 NV_ERROR(dev, "no space while connecting SOR\n"); 241 NV_ERROR(dev, "no space while connecting SOR\n");