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authorJerome Glisse <jglisse@redhat.com>2012-12-19 12:26:45 -0500
committerAlex Deucher <alexander.deucher@amd.com>2012-12-19 17:45:06 -0500
commit4613ca14b9739428abb53bef9cd0f8b3fee23a95 (patch)
tree3352532119dbf0396c9993144c29f4291bdf9ba2 /drivers
parentd3493574e267c203836bfdcb9c58d8af46fc0da1 (diff)
drm/radeon: add support for MEM_WRITE packet
To make it easier to debug some lockup from userspace add support to MEM_WRITE packet. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/radeon/evergreen_cs.c29
-rw-r--r--drivers/gpu/drm/radeon/r600_cs.c29
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.c3
3 files changed, 60 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c
index 74c6b42d259..5cea852237e 100644
--- a/drivers/gpu/drm/radeon/evergreen_cs.c
+++ b/drivers/gpu/drm/radeon/evergreen_cs.c
@@ -2654,6 +2654,35 @@ static int evergreen_packet3_check(struct radeon_cs_parser *p,
2654 ib[idx+4] = upper_32_bits(offset) & 0xff; 2654 ib[idx+4] = upper_32_bits(offset) & 0xff;
2655 } 2655 }
2656 break; 2656 break;
2657 case PACKET3_MEM_WRITE:
2658 {
2659 u64 offset;
2660
2661 if (pkt->count != 3) {
2662 DRM_ERROR("bad MEM_WRITE (invalid count)\n");
2663 return -EINVAL;
2664 }
2665 r = evergreen_cs_packet_next_reloc(p, &reloc);
2666 if (r) {
2667 DRM_ERROR("bad MEM_WRITE (missing reloc)\n");
2668 return -EINVAL;
2669 }
2670 offset = radeon_get_ib_value(p, idx+0);
2671 offset += ((u64)(radeon_get_ib_value(p, idx+1) & 0xff)) << 32UL;
2672 if (offset & 0x7) {
2673 DRM_ERROR("bad MEM_WRITE (address not qwords aligned)\n");
2674 return -EINVAL;
2675 }
2676 if ((offset + 8) > radeon_bo_size(reloc->robj)) {
2677 DRM_ERROR("bad MEM_WRITE bo too small: 0x%llx, 0x%lx\n",
2678 offset + 8, radeon_bo_size(reloc->robj));
2679 return -EINVAL;
2680 }
2681 offset += reloc->lobj.gpu_offset;
2682 ib[idx+0] = offset;
2683 ib[idx+1] = upper_32_bits(offset) & 0xff;
2684 break;
2685 }
2657 case PACKET3_COPY_DW: 2686 case PACKET3_COPY_DW:
2658 if (pkt->count != 4) { 2687 if (pkt->count != 4) {
2659 DRM_ERROR("bad COPY_DW (invalid count)\n"); 2688 DRM_ERROR("bad COPY_DW (invalid count)\n");
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 0be768be530..9ea13d07cc5 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -2294,6 +2294,35 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
2294 ib[idx+4] = upper_32_bits(offset) & 0xff; 2294 ib[idx+4] = upper_32_bits(offset) & 0xff;
2295 } 2295 }
2296 break; 2296 break;
2297 case PACKET3_MEM_WRITE:
2298 {
2299 u64 offset;
2300
2301 if (pkt->count != 3) {
2302 DRM_ERROR("bad MEM_WRITE (invalid count)\n");
2303 return -EINVAL;
2304 }
2305 r = r600_cs_packet_next_reloc(p, &reloc);
2306 if (r) {
2307 DRM_ERROR("bad MEM_WRITE (missing reloc)\n");
2308 return -EINVAL;
2309 }
2310 offset = radeon_get_ib_value(p, idx+0);
2311 offset += ((u64)(radeon_get_ib_value(p, idx+1) & 0xff)) << 32UL;
2312 if (offset & 0x7) {
2313 DRM_ERROR("bad MEM_WRITE (address not qwords aligned)\n");
2314 return -EINVAL;
2315 }
2316 if ((offset + 8) > radeon_bo_size(reloc->robj)) {
2317 DRM_ERROR("bad MEM_WRITE bo too small: 0x%llx, 0x%lx\n",
2318 offset + 8, radeon_bo_size(reloc->robj));
2319 return -EINVAL;
2320 }
2321 offset += reloc->lobj.gpu_offset;
2322 ib[idx+0] = offset;
2323 ib[idx+1] = upper_32_bits(offset) & 0xff;
2324 break;
2325 }
2297 case PACKET3_COPY_DW: 2326 case PACKET3_COPY_DW:
2298 if (pkt->count != 4) { 2327 if (pkt->count != 4) {
2299 DRM_ERROR("bad COPY_DW (invalid count)\n"); 2328 DRM_ERROR("bad COPY_DW (invalid count)\n");
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 9b1a727d3c9..ff7593498a7 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -68,9 +68,10 @@
68 * 2.25.0 - eg+: new info request for num SE and num SH 68 * 2.25.0 - eg+: new info request for num SE and num SH
69 * 2.26.0 - r600-eg: fix htile size computation 69 * 2.26.0 - r600-eg: fix htile size computation
70 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA 70 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
71 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
71 */ 72 */
72#define KMS_DRIVER_MAJOR 2 73#define KMS_DRIVER_MAJOR 2
73#define KMS_DRIVER_MINOR 27 74#define KMS_DRIVER_MINOR 28
74#define KMS_DRIVER_PATCHLEVEL 0 75#define KMS_DRIVER_PATCHLEVEL 0
75int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 76int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
76int radeon_driver_unload_kms(struct drm_device *dev); 77int radeon_driver_unload_kms(struct drm_device *dev);