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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-27 15:05:56 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-27 15:05:56 -0500
commit401d0069cb344f401bc9d264c31db55876ff78c0 (patch)
treee6f47b38877d8d7bfc772f7b97ff5439381bdd2e /drivers
parent06718f151144aa5eea97cdf2813fe7eb70e73d17 (diff)
parenta32839696a8eef813a1aff604fbad9a32dff6c95 (diff)
Merge branch 'fbdev-for-linus' of git://github.com/schandinat/linux-2.6
* 'fbdev-for-linus' of git://github.com/schandinat/linux-2.6: viafb: correct sync polarity for OLPC DCON video:da8xx-fb: Disable and reset sequence on version2 of LCDC OMAPDSS: DISPC: skip scaling calculations when not scaling OMAPFB: fix compilation warnings due to missing include OMAPDSS: HDMI: fix returned HDMI pixel clock
Diffstat (limited to 'drivers')
-rw-r--r--drivers/video/da8xx-fb.c15
-rw-r--r--drivers/video/omap/dispc.c1
-rw-r--r--drivers/video/omap2/dss/dispc.c11
-rw-r--r--drivers/video/omap2/dss/hdmi.c2
-rw-r--r--drivers/video/via/share.h4
5 files changed, 23 insertions, 10 deletions
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 55f91d9ab00..29577bf1f55 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -116,6 +116,7 @@
116/* Clock registers available only on Version 2 */ 116/* Clock registers available only on Version 2 */
117#define LCD_CLK_ENABLE_REG 0x6c 117#define LCD_CLK_ENABLE_REG 0x6c
118#define LCD_CLK_RESET_REG 0x70 118#define LCD_CLK_RESET_REG 0x70
119#define LCD_CLK_MAIN_RESET BIT(3)
119 120
120#define LCD_NUM_BUFFERS 2 121#define LCD_NUM_BUFFERS 2
121 122
@@ -244,6 +245,10 @@ static inline void lcd_enable_raster(void)
244{ 245{
245 u32 reg; 246 u32 reg;
246 247
248 /* Bring LCDC out of reset */
249 if (lcd_revision == LCD_VERSION_2)
250 lcdc_write(0, LCD_CLK_RESET_REG);
251
247 reg = lcdc_read(LCD_RASTER_CTRL_REG); 252 reg = lcdc_read(LCD_RASTER_CTRL_REG);
248 if (!(reg & LCD_RASTER_ENABLE)) 253 if (!(reg & LCD_RASTER_ENABLE))
249 lcdc_write(reg | LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG); 254 lcdc_write(reg | LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);
@@ -257,6 +262,10 @@ static inline void lcd_disable_raster(void)
257 reg = lcdc_read(LCD_RASTER_CTRL_REG); 262 reg = lcdc_read(LCD_RASTER_CTRL_REG);
258 if (reg & LCD_RASTER_ENABLE) 263 if (reg & LCD_RASTER_ENABLE)
259 lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG); 264 lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);
265
266 if (lcd_revision == LCD_VERSION_2)
267 /* Write 1 to reset LCDC */
268 lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG);
260} 269}
261 270
262static void lcd_blit(int load_mode, struct da8xx_fb_par *par) 271static void lcd_blit(int load_mode, struct da8xx_fb_par *par)
@@ -584,8 +593,12 @@ static void lcd_reset(struct da8xx_fb_par *par)
584 lcdc_write(0, LCD_DMA_CTRL_REG); 593 lcdc_write(0, LCD_DMA_CTRL_REG);
585 lcdc_write(0, LCD_RASTER_CTRL_REG); 594 lcdc_write(0, LCD_RASTER_CTRL_REG);
586 595
587 if (lcd_revision == LCD_VERSION_2) 596 if (lcd_revision == LCD_VERSION_2) {
588 lcdc_write(0, LCD_INT_ENABLE_SET_REG); 597 lcdc_write(0, LCD_INT_ENABLE_SET_REG);
598 /* Write 1 to reset */
599 lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG);
600 lcdc_write(0, LCD_CLK_RESET_REG);
601 }
589} 602}
590 603
591static void lcd_calc_clk_divider(struct da8xx_fb_par *par) 604static void lcd_calc_clk_divider(struct da8xx_fb_par *par)
diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
index 0ccd7adf47b..6f61e781f15 100644
--- a/drivers/video/omap/dispc.c
+++ b/drivers/video/omap/dispc.c
@@ -19,6 +19,7 @@
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */ 20 */
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/module.h>
22#include <linux/dma-mapping.h> 23#include <linux/dma-mapping.h>
23#include <linux/mm.h> 24#include <linux/mm.h>
24#include <linux/vmalloc.h> 25#include <linux/vmalloc.h>
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 3532782551c..5c81533eaca 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -1720,12 +1720,11 @@ static int dispc_ovl_calc_scaling(enum omap_plane plane,
1720 const int maxdownscale = dss_feat_get_param_max(FEAT_PARAM_DOWNSCALE); 1720 const int maxdownscale = dss_feat_get_param_max(FEAT_PARAM_DOWNSCALE);
1721 unsigned long fclk = 0; 1721 unsigned long fclk = 0;
1722 1722
1723 if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0) { 1723 if (width == out_width && height == out_height)
1724 if (width != out_width || height != out_height) 1724 return 0;
1725 return -EINVAL; 1725
1726 else 1726 if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0)
1727 return 0; 1727 return -EINVAL;
1728 }
1729 1728
1730 if (out_width < width / maxdownscale || 1729 if (out_width < width / maxdownscale ||
1731 out_width > width * 8) 1730 out_width > width * 8)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 3262f0f1fa3..c56378c555b 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -269,7 +269,7 @@ static void update_hdmi_timings(struct hdmi_config *cfg,
269unsigned long hdmi_get_pixel_clock(void) 269unsigned long hdmi_get_pixel_clock(void)
270{ 270{
271 /* HDMI Pixel Clock in Mhz */ 271 /* HDMI Pixel Clock in Mhz */
272 return hdmi.ip_data.cfg.timings.timings.pixel_clock * 10000; 272 return hdmi.ip_data.cfg.timings.timings.pixel_clock * 1000;
273} 273}
274 274
275static void hdmi_compute_pll(struct omap_dss_device *dssdev, int phy, 275static void hdmi_compute_pll(struct omap_dss_device *dssdev, int phy,
diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h
index 69d882cbe70..c01c1c16272 100644
--- a/drivers/video/via/share.h
+++ b/drivers/video/via/share.h
@@ -559,8 +559,8 @@
559#define M1200X720_R60_VSP POSITIVE 559#define M1200X720_R60_VSP POSITIVE
560 560
561/* 1200x900@60 Sync Polarity (DCON) */ 561/* 1200x900@60 Sync Polarity (DCON) */
562#define M1200X900_R60_HSP NEGATIVE 562#define M1200X900_R60_HSP POSITIVE
563#define M1200X900_R60_VSP NEGATIVE 563#define M1200X900_R60_VSP POSITIVE
564 564
565/* 1280x600@60 Sync Polarity (GTF Mode) */ 565/* 1280x600@60 Sync Polarity (GTF Mode) */
566#define M1280x600_R60_HSP NEGATIVE 566#define M1280x600_R60_HSP NEGATIVE