diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-11-20 23:12:11 -0500 |
---|---|---|
committer | Wolfram Sang <w.sang@pengutronix.de> | 2012-11-22 16:34:40 -0500 |
commit | 31f313d9bebfc17e48c787c8c36b38662b4134a1 (patch) | |
tree | 7fcd40d17bac586a95ae21ed9f54fa0e642b4711 /drivers | |
parent | c5d5474425c4e7e291a98e739ea65f8acd0d8d5c (diff) |
i2c: s3c2410: Remove recently introduced performance overheads
The changes in "i2c-s3c2410: use exponential back off while polling for
bus idle" remove the initial busy wait for I2C transfers to complete and
replace it with usleep_range() calls which will schedule.
Since for older SoCs I2C transfers would usually complete within an
extremely small number of CPU cycles there is a win from not having to
schedule. This happens because on the older SoCs the cores run at a
smaller multiple of the speeds that the I2C bus is operating at; on more
modern SoCs the busy wait is less likely to be effective.
Fix the issue by restoring the busy wait, reducing the number of spins
from 20 to 3 which covers the overwhelming majority of I2C transfers on
the SoCs where the busy wait is effective.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/i2c/busses/i2c-s3c2410.c | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index d784c76ae3e..e93e7d67277 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c | |||
@@ -554,6 +554,7 @@ static void s3c24xx_i2c_wait_idle(struct s3c24xx_i2c *i2c) | |||
554 | unsigned long iicstat; | 554 | unsigned long iicstat; |
555 | ktime_t start, now; | 555 | ktime_t start, now; |
556 | unsigned long delay; | 556 | unsigned long delay; |
557 | int spins; | ||
557 | 558 | ||
558 | /* ensure the stop has been through the bus */ | 559 | /* ensure the stop has been through the bus */ |
559 | 560 | ||
@@ -566,12 +567,23 @@ static void s3c24xx_i2c_wait_idle(struct s3c24xx_i2c *i2c) | |||
566 | * end of a transaction. However, really slow i2c devices can stretch | 567 | * end of a transaction. However, really slow i2c devices can stretch |
567 | * the clock, delaying STOP generation. | 568 | * the clock, delaying STOP generation. |
568 | * | 569 | * |
569 | * As a compromise between idle detection latency for the normal, fast | 570 | * On slower SoCs this typically happens within a very small number of |
570 | * case, and system load in the slow device case, use an exponential | 571 | * instructions so busy wait briefly to avoid scheduling overhead. |
571 | * back off in the polling loop, up to 1/10th of the total timeout, | ||
572 | * then continue to poll at a constant rate up to the timeout. | ||
573 | */ | 572 | */ |
573 | spins = 3; | ||
574 | iicstat = readl(i2c->regs + S3C2410_IICSTAT); | 574 | iicstat = readl(i2c->regs + S3C2410_IICSTAT); |
575 | while ((iicstat & S3C2410_IICSTAT_START) && --spins) { | ||
576 | cpu_relax(); | ||
577 | iicstat = readl(i2c->regs + S3C2410_IICSTAT); | ||
578 | } | ||
579 | |||
580 | /* | ||
581 | * If we do get an appreciable delay as a compromise between idle | ||
582 | * detection latency for the normal, fast case, and system load in the | ||
583 | * slow device case, use an exponential back off in the polling loop, | ||
584 | * up to 1/10th of the total timeout, then continue to poll at a | ||
585 | * constant rate up to the timeout. | ||
586 | */ | ||
575 | delay = 1; | 587 | delay = 1; |
576 | while ((iicstat & S3C2410_IICSTAT_START) && | 588 | while ((iicstat & S3C2410_IICSTAT_START) && |
577 | ktime_us_delta(now, start) < S3C2410_IDLE_TIMEOUT) { | 589 | ktime_us_delta(now, start) < S3C2410_IDLE_TIMEOUT) { |