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authorTaneja, Archit <archit@ti.com>2011-03-15 00:28:21 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2011-03-15 02:23:51 -0400
commit235e7dba0264d4c6e56ee217fc7ef6d80da5eb67 (patch)
tree77e6e5f82a98f08d529212656104682b024fbbc6 /drivers
parentba02fa37de80bea10d706f39f076dd848348320a (diff)
OMAP2PLUS: DSS2: FEATURES: Fix usage of dss_reg_field and dss_clk_source_name
The structures dss_reg_field and dss_clk_source_name have enum members which specify the register field and the clock source respectively. These members are not used to choose the correct result in the corresponding feature functions. Remove these members and change the features array declaration to incorporate these enums. The structure dss_clk_source_name without the enum member is just a pointer to an string. Remove the structure and use a character pointer directly. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/video/omap2/dss/dss.c10
-rw-r--r--drivers/video/omap2/dss/dss.h6
-rw-r--r--drivers/video/omap2/dss/dss_features.c77
3 files changed, 43 insertions, 50 deletions
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index aed9345e8ad..06ad3129085 100644
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -82,10 +82,10 @@ static struct {
82 u32 ctx[DSS_SZ_REGS / sizeof(u32)]; 82 u32 ctx[DSS_SZ_REGS / sizeof(u32)];
83} dss; 83} dss;
84 84
85static const struct dss_clk_source_name dss_generic_clk_source_names[] = { 85static const char * const dss_generic_clk_source_names[] = {
86 { DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, "DSI_PLL_HSDIV_DISPC" }, 86 [DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI_PLL_HSDIV_DISPC",
87 { DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, "DSI_PLL_HSDIV_DSI" }, 87 [DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI_PLL_HSDIV_DSI",
88 { DSS_CLK_SRC_FCK, "DSS_FCK" }, 88 [DSS_CLK_SRC_FCK] = "DSS_FCK",
89}; 89};
90 90
91static void dss_clk_enable_all_no_ctx(void); 91static void dss_clk_enable_all_no_ctx(void);
@@ -232,7 +232,7 @@ void dss_sdi_disable(void)
232 232
233const char *dss_get_generic_clk_source_name(enum dss_clk_source clk_src) 233const char *dss_get_generic_clk_source_name(enum dss_clk_source clk_src)
234{ 234{
235 return dss_generic_clk_source_names[clk_src].clksrc_name; 235 return dss_generic_clk_source_names[clk_src];
236} 236}
237 237
238void dss_dump_clocks(struct seq_file *s) 238void dss_dump_clocks(struct seq_file *s)
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index b845468d970..26a43c93e48 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -126,12 +126,6 @@ enum dss_clk_source {
126 * OMAP4: DSS_FCLK */ 126 * OMAP4: DSS_FCLK */
127}; 127};
128 128
129/* Correlates clock source name and dss_clk_source member */
130struct dss_clk_source_name {
131 enum dss_clk_source clksrc;
132 const char *clksrc_name;
133};
134
135struct dss_clock_info { 129struct dss_clock_info {
136 /* rates that we get with dividers below */ 130 /* rates that we get with dividers below */
137 unsigned long fck; 131 unsigned long fck;
diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c
index 6eb6ec62a00..8de3344842d 100644
--- a/drivers/video/omap2/dss/dss_features.c
+++ b/drivers/video/omap2/dss/dss_features.c
@@ -30,7 +30,6 @@
30 30
31/* Defines a generic omap register field */ 31/* Defines a generic omap register field */
32struct dss_reg_field { 32struct dss_reg_field {
33 enum dss_feat_reg_field id;
34 u8 start, end; 33 u8 start, end;
35}; 34};
36 35
@@ -45,43 +44,43 @@ struct omap_dss_features {
45 const unsigned long max_dss_fck; 44 const unsigned long max_dss_fck;
46 const enum omap_display_type *supported_displays; 45 const enum omap_display_type *supported_displays;
47 const enum omap_color_mode *supported_color_modes; 46 const enum omap_color_mode *supported_color_modes;
48 const struct dss_clk_source_name *clksrc_names; 47 const char * const *clksrc_names;
49}; 48};
50 49
51/* This struct is assigned to one of the below during initialization */ 50/* This struct is assigned to one of the below during initialization */
52static struct omap_dss_features *omap_current_dss_features; 51static struct omap_dss_features *omap_current_dss_features;
53 52
54static const struct dss_reg_field omap2_dss_reg_fields[] = { 53static const struct dss_reg_field omap2_dss_reg_fields[] = {
55 { FEAT_REG_FIRHINC, 11, 0 }, 54 [FEAT_REG_FIRHINC] = { 11, 0 },
56 { FEAT_REG_FIRVINC, 27, 16 }, 55 [FEAT_REG_FIRVINC] = { 27, 16 },
57 { FEAT_REG_FIFOLOWTHRESHOLD, 8, 0 }, 56 [FEAT_REG_FIFOLOWTHRESHOLD] = { 8, 0 },
58 { FEAT_REG_FIFOHIGHTHRESHOLD, 24, 16 }, 57 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 24, 16 },
59 { FEAT_REG_FIFOSIZE, 8, 0 }, 58 [FEAT_REG_FIFOSIZE] = { 8, 0 },
60 { FEAT_REG_HORIZONTALACCU, 9, 0 }, 59 [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
61 { FEAT_REG_VERTICALACCU, 25, 16 }, 60 [FEAT_REG_VERTICALACCU] = { 25, 16 },
62 { FEAT_REG_DISPC_CLK_SWITCH, 0, 0 }, 61 [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
63}; 62};
64 63
65static const struct dss_reg_field omap3_dss_reg_fields[] = { 64static const struct dss_reg_field omap3_dss_reg_fields[] = {
66 { FEAT_REG_FIRHINC, 12, 0 }, 65 [FEAT_REG_FIRHINC] = { 12, 0 },
67 { FEAT_REG_FIRVINC, 28, 16 }, 66 [FEAT_REG_FIRVINC] = { 28, 16 },
68 { FEAT_REG_FIFOLOWTHRESHOLD, 11, 0 }, 67 [FEAT_REG_FIFOLOWTHRESHOLD] = { 11, 0 },
69 { FEAT_REG_FIFOHIGHTHRESHOLD, 27, 16 }, 68 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 27, 16 },
70 { FEAT_REG_FIFOSIZE, 10, 0 }, 69 [FEAT_REG_FIFOSIZE] = { 10, 0 },
71 { FEAT_REG_HORIZONTALACCU, 9, 0 }, 70 [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
72 { FEAT_REG_VERTICALACCU, 25, 16 }, 71 [FEAT_REG_VERTICALACCU] = { 25, 16 },
73 { FEAT_REG_DISPC_CLK_SWITCH, 0, 0 }, 72 [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
74}; 73};
75 74
76static const struct dss_reg_field omap4_dss_reg_fields[] = { 75static const struct dss_reg_field omap4_dss_reg_fields[] = {
77 { FEAT_REG_FIRHINC, 12, 0 }, 76 [FEAT_REG_FIRHINC] = { 12, 0 },
78 { FEAT_REG_FIRVINC, 28, 16 }, 77 [FEAT_REG_FIRVINC] = { 28, 16 },
79 { FEAT_REG_FIFOLOWTHRESHOLD, 15, 0 }, 78 [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 },
80 { FEAT_REG_FIFOHIGHTHRESHOLD, 31, 16 }, 79 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 },
81 { FEAT_REG_FIFOSIZE, 15, 0 }, 80 [FEAT_REG_FIFOSIZE] = { 15, 0 },
82 { FEAT_REG_HORIZONTALACCU, 10, 0 }, 81 [FEAT_REG_HORIZONTALACCU] = { 10, 0 },
83 { FEAT_REG_VERTICALACCU, 26, 16 }, 82 [FEAT_REG_VERTICALACCU] = { 26, 16 },
84 { FEAT_REG_DISPC_CLK_SWITCH, 9, 8 }, 83 [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 8 },
85}; 84};
86 85
87static const enum omap_display_type omap2_dss_supported_displays[] = { 86static const enum omap_display_type omap2_dss_supported_displays[] = {
@@ -162,22 +161,22 @@ static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
162 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32, 161 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
163}; 162};
164 163
165static const struct dss_clk_source_name omap2_dss_clk_source_names[] = { 164static const char * const omap2_dss_clk_source_names[] = {
166 { DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, "N/A" }, 165 [DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "N/A",
167 { DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, "N/A" }, 166 [DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "N/A",
168 { DSS_CLK_SRC_FCK, "DSS_FCLK1" }, 167 [DSS_CLK_SRC_FCK] = "DSS_FCLK1",
169}; 168};
170 169
171static const struct dss_clk_source_name omap3_dss_clk_source_names[] = { 170static const char * const omap3_dss_clk_source_names[] = {
172 { DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, "DSI1_PLL_FCLK" }, 171 [DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI1_PLL_FCLK",
173 { DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, "DSI2_PLL_FCLK" }, 172 [DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI2_PLL_FCLK",
174 { DSS_CLK_SRC_FCK, "DSS1_ALWON_FCLK" }, 173 [DSS_CLK_SRC_FCK] = "DSS1_ALWON_FCLK",
175}; 174};
176 175
177static const struct dss_clk_source_name omap4_dss_clk_source_names[] = { 176static const char * const omap4_dss_clk_source_names[] = {
178 { DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, "PLL1_CLK1" }, 177 [DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "PLL1_CLK1",
179 { DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, "PLL1_CLK2" }, 178 [DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "PLL1_CLK2",
180 { DSS_CLK_SRC_FCK, "DSS_FCLK" }, 179 [DSS_CLK_SRC_FCK] = "DSS_FCLK",
181}; 180};
182 181
183/* OMAP2 DSS Features */ 182/* OMAP2 DSS Features */
@@ -290,7 +289,7 @@ bool dss_feat_color_mode_supported(enum omap_plane plane,
290 289
291const char *dss_feat_get_clk_source_name(enum dss_clk_source id) 290const char *dss_feat_get_clk_source_name(enum dss_clk_source id)
292{ 291{
293 return omap_current_dss_features->clksrc_names[id].clksrc_name; 292 return omap_current_dss_features->clksrc_names[id];
294} 293}
295 294
296/* DSS has_feature check */ 295/* DSS has_feature check */