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authorHeikki Krogerus <heikki.krogerus@linux.intel.com>2012-02-13 06:24:09 -0500
committerFelipe Balbi <balbi@ti.com>2012-02-13 06:35:38 -0500
commit1d4c9293ae3555f2dcf9f394d1e2a14fd9421c4f (patch)
treec4e1e7ea722730d5ebf8d6dfc2258051d0d466c4 /drivers
parent819d1c742b408bd6cdab77d4308940600811cf20 (diff)
usb: otg: msm: Start using struct usb_otg
Use struct usb_otg members with OTG specific functions instead of usb_phy members. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/usb/otg/msm_otg.c398
1 files changed, 205 insertions, 193 deletions
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index cba4737a04f..1d0347c247d 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -69,9 +69,9 @@ static int msm_hsusb_init_vddcx(struct msm_otg *motg, int init)
69 int ret = 0; 69 int ret = 0;
70 70
71 if (init) { 71 if (init) {
72 hsusb_vddcx = regulator_get(motg->otg.dev, "HSUSB_VDDCX"); 72 hsusb_vddcx = regulator_get(motg->phy.dev, "HSUSB_VDDCX");
73 if (IS_ERR(hsusb_vddcx)) { 73 if (IS_ERR(hsusb_vddcx)) {
74 dev_err(motg->otg.dev, "unable to get hsusb vddcx\n"); 74 dev_err(motg->phy.dev, "unable to get hsusb vddcx\n");
75 return PTR_ERR(hsusb_vddcx); 75 return PTR_ERR(hsusb_vddcx);
76 } 76 }
77 77
@@ -79,7 +79,7 @@ static int msm_hsusb_init_vddcx(struct msm_otg *motg, int init)
79 USB_PHY_VDD_DIG_VOL_MIN, 79 USB_PHY_VDD_DIG_VOL_MIN,
80 USB_PHY_VDD_DIG_VOL_MAX); 80 USB_PHY_VDD_DIG_VOL_MAX);
81 if (ret) { 81 if (ret) {
82 dev_err(motg->otg.dev, "unable to set the voltage " 82 dev_err(motg->phy.dev, "unable to set the voltage "
83 "for hsusb vddcx\n"); 83 "for hsusb vddcx\n");
84 regulator_put(hsusb_vddcx); 84 regulator_put(hsusb_vddcx);
85 return ret; 85 return ret;
@@ -87,18 +87,18 @@ static int msm_hsusb_init_vddcx(struct msm_otg *motg, int init)
87 87
88 ret = regulator_enable(hsusb_vddcx); 88 ret = regulator_enable(hsusb_vddcx);
89 if (ret) { 89 if (ret) {
90 dev_err(motg->otg.dev, "unable to enable hsusb vddcx\n"); 90 dev_err(motg->phy.dev, "unable to enable hsusb vddcx\n");
91 regulator_put(hsusb_vddcx); 91 regulator_put(hsusb_vddcx);
92 } 92 }
93 } else { 93 } else {
94 ret = regulator_set_voltage(hsusb_vddcx, 0, 94 ret = regulator_set_voltage(hsusb_vddcx, 0,
95 USB_PHY_VDD_DIG_VOL_MAX); 95 USB_PHY_VDD_DIG_VOL_MAX);
96 if (ret) 96 if (ret)
97 dev_err(motg->otg.dev, "unable to set the voltage " 97 dev_err(motg->phy.dev, "unable to set the voltage "
98 "for hsusb vddcx\n"); 98 "for hsusb vddcx\n");
99 ret = regulator_disable(hsusb_vddcx); 99 ret = regulator_disable(hsusb_vddcx);
100 if (ret) 100 if (ret)
101 dev_err(motg->otg.dev, "unable to disable hsusb vddcx\n"); 101 dev_err(motg->phy.dev, "unable to disable hsusb vddcx\n");
102 102
103 regulator_put(hsusb_vddcx); 103 regulator_put(hsusb_vddcx);
104 } 104 }
@@ -111,40 +111,40 @@ static int msm_hsusb_ldo_init(struct msm_otg *motg, int init)
111 int rc = 0; 111 int rc = 0;
112 112
113 if (init) { 113 if (init) {
114 hsusb_3p3 = regulator_get(motg->otg.dev, "HSUSB_3p3"); 114 hsusb_3p3 = regulator_get(motg->phy.dev, "HSUSB_3p3");
115 if (IS_ERR(hsusb_3p3)) { 115 if (IS_ERR(hsusb_3p3)) {
116 dev_err(motg->otg.dev, "unable to get hsusb 3p3\n"); 116 dev_err(motg->phy.dev, "unable to get hsusb 3p3\n");
117 return PTR_ERR(hsusb_3p3); 117 return PTR_ERR(hsusb_3p3);
118 } 118 }
119 119
120 rc = regulator_set_voltage(hsusb_3p3, USB_PHY_3P3_VOL_MIN, 120 rc = regulator_set_voltage(hsusb_3p3, USB_PHY_3P3_VOL_MIN,
121 USB_PHY_3P3_VOL_MAX); 121 USB_PHY_3P3_VOL_MAX);
122 if (rc) { 122 if (rc) {
123 dev_err(motg->otg.dev, "unable to set voltage level " 123 dev_err(motg->phy.dev, "unable to set voltage level "
124 "for hsusb 3p3\n"); 124 "for hsusb 3p3\n");
125 goto put_3p3; 125 goto put_3p3;
126 } 126 }
127 rc = regulator_enable(hsusb_3p3); 127 rc = regulator_enable(hsusb_3p3);
128 if (rc) { 128 if (rc) {
129 dev_err(motg->otg.dev, "unable to enable the hsusb 3p3\n"); 129 dev_err(motg->phy.dev, "unable to enable the hsusb 3p3\n");
130 goto put_3p3; 130 goto put_3p3;
131 } 131 }
132 hsusb_1p8 = regulator_get(motg->otg.dev, "HSUSB_1p8"); 132 hsusb_1p8 = regulator_get(motg->phy.dev, "HSUSB_1p8");
133 if (IS_ERR(hsusb_1p8)) { 133 if (IS_ERR(hsusb_1p8)) {
134 dev_err(motg->otg.dev, "unable to get hsusb 1p8\n"); 134 dev_err(motg->phy.dev, "unable to get hsusb 1p8\n");
135 rc = PTR_ERR(hsusb_1p8); 135 rc = PTR_ERR(hsusb_1p8);
136 goto disable_3p3; 136 goto disable_3p3;
137 } 137 }
138 rc = regulator_set_voltage(hsusb_1p8, USB_PHY_1P8_VOL_MIN, 138 rc = regulator_set_voltage(hsusb_1p8, USB_PHY_1P8_VOL_MIN,
139 USB_PHY_1P8_VOL_MAX); 139 USB_PHY_1P8_VOL_MAX);
140 if (rc) { 140 if (rc) {
141 dev_err(motg->otg.dev, "unable to set voltage level " 141 dev_err(motg->phy.dev, "unable to set voltage level "
142 "for hsusb 1p8\n"); 142 "for hsusb 1p8\n");
143 goto put_1p8; 143 goto put_1p8;
144 } 144 }
145 rc = regulator_enable(hsusb_1p8); 145 rc = regulator_enable(hsusb_1p8);
146 if (rc) { 146 if (rc) {
147 dev_err(motg->otg.dev, "unable to enable the hsusb 1p8\n"); 147 dev_err(motg->phy.dev, "unable to enable the hsusb 1p8\n");
148 goto put_1p8; 148 goto put_1p8;
149 } 149 }
150 150
@@ -235,9 +235,9 @@ static int msm_hsusb_ldo_set_mode(int on)
235 return ret < 0 ? ret : 0; 235 return ret < 0 ? ret : 0;
236} 236}
237 237
238static int ulpi_read(struct usb_phy *otg, u32 reg) 238static int ulpi_read(struct usb_phy *phy, u32 reg)
239{ 239{
240 struct msm_otg *motg = container_of(otg, struct msm_otg, otg); 240 struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
241 int cnt = 0; 241 int cnt = 0;
242 242
243 /* initiate read operation */ 243 /* initiate read operation */
@@ -253,16 +253,16 @@ static int ulpi_read(struct usb_phy *otg, u32 reg)
253 } 253 }
254 254
255 if (cnt >= ULPI_IO_TIMEOUT_USEC) { 255 if (cnt >= ULPI_IO_TIMEOUT_USEC) {
256 dev_err(otg->dev, "ulpi_read: timeout %08x\n", 256 dev_err(phy->dev, "ulpi_read: timeout %08x\n",
257 readl(USB_ULPI_VIEWPORT)); 257 readl(USB_ULPI_VIEWPORT));
258 return -ETIMEDOUT; 258 return -ETIMEDOUT;
259 } 259 }
260 return ULPI_DATA_READ(readl(USB_ULPI_VIEWPORT)); 260 return ULPI_DATA_READ(readl(USB_ULPI_VIEWPORT));
261} 261}
262 262
263static int ulpi_write(struct usb_phy *otg, u32 val, u32 reg) 263static int ulpi_write(struct usb_phy *phy, u32 val, u32 reg)
264{ 264{
265 struct msm_otg *motg = container_of(otg, struct msm_otg, otg); 265 struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
266 int cnt = 0; 266 int cnt = 0;
267 267
268 /* initiate write operation */ 268 /* initiate write operation */
@@ -279,13 +279,13 @@ static int ulpi_write(struct usb_phy *otg, u32 val, u32 reg)
279 } 279 }
280 280
281 if (cnt >= ULPI_IO_TIMEOUT_USEC) { 281 if (cnt >= ULPI_IO_TIMEOUT_USEC) {
282 dev_err(otg->dev, "ulpi_write: timeout\n"); 282 dev_err(phy->dev, "ulpi_write: timeout\n");
283 return -ETIMEDOUT; 283 return -ETIMEDOUT;
284 } 284 }
285 return 0; 285 return 0;
286} 286}
287 287
288static struct otg_io_access_ops msm_otg_io_ops = { 288static struct usb_phy_io_ops msm_otg_io_ops = {
289 .read = ulpi_read, 289 .read = ulpi_read,
290 .write = ulpi_write, 290 .write = ulpi_write,
291}; 291};
@@ -299,9 +299,9 @@ static void ulpi_init(struct msm_otg *motg)
299 return; 299 return;
300 300
301 while (seq[0] >= 0) { 301 while (seq[0] >= 0) {
302 dev_vdbg(motg->otg.dev, "ulpi: write 0x%02x to 0x%02x\n", 302 dev_vdbg(motg->phy.dev, "ulpi: write 0x%02x to 0x%02x\n",
303 seq[0], seq[1]); 303 seq[0], seq[1]);
304 ulpi_write(&motg->otg, seq[0], seq[1]); 304 ulpi_write(&motg->phy, seq[0], seq[1]);
305 seq += 2; 305 seq += 2;
306 } 306 }
307} 307}
@@ -313,11 +313,11 @@ static int msm_otg_link_clk_reset(struct msm_otg *motg, bool assert)
313 if (assert) { 313 if (assert) {
314 ret = clk_reset(motg->clk, CLK_RESET_ASSERT); 314 ret = clk_reset(motg->clk, CLK_RESET_ASSERT);
315 if (ret) 315 if (ret)
316 dev_err(motg->otg.dev, "usb hs_clk assert failed\n"); 316 dev_err(motg->phy.dev, "usb hs_clk assert failed\n");
317 } else { 317 } else {
318 ret = clk_reset(motg->clk, CLK_RESET_DEASSERT); 318 ret = clk_reset(motg->clk, CLK_RESET_DEASSERT);
319 if (ret) 319 if (ret)
320 dev_err(motg->otg.dev, "usb hs_clk deassert failed\n"); 320 dev_err(motg->phy.dev, "usb hs_clk deassert failed\n");
321 } 321 }
322 return ret; 322 return ret;
323} 323}
@@ -328,13 +328,13 @@ static int msm_otg_phy_clk_reset(struct msm_otg *motg)
328 328
329 ret = clk_reset(motg->phy_reset_clk, CLK_RESET_ASSERT); 329 ret = clk_reset(motg->phy_reset_clk, CLK_RESET_ASSERT);
330 if (ret) { 330 if (ret) {
331 dev_err(motg->otg.dev, "usb phy clk assert failed\n"); 331 dev_err(motg->phy.dev, "usb phy clk assert failed\n");
332 return ret; 332 return ret;
333 } 333 }
334 usleep_range(10000, 12000); 334 usleep_range(10000, 12000);
335 ret = clk_reset(motg->phy_reset_clk, CLK_RESET_DEASSERT); 335 ret = clk_reset(motg->phy_reset_clk, CLK_RESET_DEASSERT);
336 if (ret) 336 if (ret)
337 dev_err(motg->otg.dev, "usb phy clk deassert failed\n"); 337 dev_err(motg->phy.dev, "usb phy clk deassert failed\n");
338 return ret; 338 return ret;
339} 339}
340 340
@@ -358,7 +358,7 @@ static int msm_otg_phy_reset(struct msm_otg *motg)
358 writel(val | PORTSC_PTS_ULPI, USB_PORTSC); 358 writel(val | PORTSC_PTS_ULPI, USB_PORTSC);
359 359
360 for (retries = 3; retries > 0; retries--) { 360 for (retries = 3; retries > 0; retries--) {
361 ret = ulpi_write(&motg->otg, ULPI_FUNC_CTRL_SUSPENDM, 361 ret = ulpi_write(&motg->phy, ULPI_FUNC_CTRL_SUSPENDM,
362 ULPI_CLR(ULPI_FUNC_CTRL)); 362 ULPI_CLR(ULPI_FUNC_CTRL));
363 if (!ret) 363 if (!ret)
364 break; 364 break;
@@ -375,7 +375,7 @@ static int msm_otg_phy_reset(struct msm_otg *motg)
375 return ret; 375 return ret;
376 376
377 for (retries = 3; retries > 0; retries--) { 377 for (retries = 3; retries > 0; retries--) {
378 ret = ulpi_read(&motg->otg, ULPI_DEBUG); 378 ret = ulpi_read(&motg->phy, ULPI_DEBUG);
379 if (ret != -ETIMEDOUT) 379 if (ret != -ETIMEDOUT)
380 break; 380 break;
381 ret = msm_otg_phy_clk_reset(motg); 381 ret = msm_otg_phy_clk_reset(motg);
@@ -385,14 +385,14 @@ static int msm_otg_phy_reset(struct msm_otg *motg)
385 if (!retries) 385 if (!retries)
386 return -ETIMEDOUT; 386 return -ETIMEDOUT;
387 387
388 dev_info(motg->otg.dev, "phy_reset: success\n"); 388 dev_info(motg->phy.dev, "phy_reset: success\n");
389 return 0; 389 return 0;
390} 390}
391 391
392#define LINK_RESET_TIMEOUT_USEC (250 * 1000) 392#define LINK_RESET_TIMEOUT_USEC (250 * 1000)
393static int msm_otg_reset(struct usb_phy *otg) 393static int msm_otg_reset(struct usb_phy *phy)
394{ 394{
395 struct msm_otg *motg = container_of(otg, struct msm_otg, otg); 395 struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
396 struct msm_otg_platform_data *pdata = motg->pdata; 396 struct msm_otg_platform_data *pdata = motg->pdata;
397 int cnt = 0; 397 int cnt = 0;
398 int ret; 398 int ret;
@@ -401,7 +401,7 @@ static int msm_otg_reset(struct usb_phy *otg)
401 401
402 ret = msm_otg_phy_reset(motg); 402 ret = msm_otg_phy_reset(motg);
403 if (ret) { 403 if (ret) {
404 dev_err(otg->dev, "phy_reset failed\n"); 404 dev_err(phy->dev, "phy_reset failed\n");
405 return ret; 405 return ret;
406 } 406 }
407 407
@@ -435,8 +435,8 @@ static int msm_otg_reset(struct usb_phy *otg)
435 val |= OTGSC_BSVIE; 435 val |= OTGSC_BSVIE;
436 } 436 }
437 writel(val, USB_OTGSC); 437 writel(val, USB_OTGSC);
438 ulpi_write(otg, ulpi_val, ULPI_USB_INT_EN_RISE); 438 ulpi_write(phy, ulpi_val, ULPI_USB_INT_EN_RISE);
439 ulpi_write(otg, ulpi_val, ULPI_USB_INT_EN_FALL); 439 ulpi_write(phy, ulpi_val, ULPI_USB_INT_EN_FALL);
440 } 440 }
441 441
442 return 0; 442 return 0;
@@ -448,8 +448,8 @@ static int msm_otg_reset(struct usb_phy *otg)
448#ifdef CONFIG_PM_SLEEP 448#ifdef CONFIG_PM_SLEEP
449static int msm_otg_suspend(struct msm_otg *motg) 449static int msm_otg_suspend(struct msm_otg *motg)
450{ 450{
451 struct usb_phy *otg = &motg->otg; 451 struct usb_phy *phy = &motg->phy;
452 struct usb_bus *bus = otg->host; 452 struct usb_bus *bus = phy->otg->host;
453 struct msm_otg_platform_data *pdata = motg->pdata; 453 struct msm_otg_platform_data *pdata = motg->pdata;
454 int cnt = 0; 454 int cnt = 0;
455 455
@@ -475,10 +475,10 @@ static int msm_otg_suspend(struct msm_otg *motg)
475 */ 475 */
476 476
477 if (motg->pdata->phy_type == CI_45NM_INTEGRATED_PHY) { 477 if (motg->pdata->phy_type == CI_45NM_INTEGRATED_PHY) {
478 ulpi_read(otg, 0x14); 478 ulpi_read(phy, 0x14);
479 if (pdata->otg_control == OTG_PHY_CONTROL) 479 if (pdata->otg_control == OTG_PHY_CONTROL)
480 ulpi_write(otg, 0x01, 0x30); 480 ulpi_write(phy, 0x01, 0x30);
481 ulpi_write(otg, 0x08, 0x09); 481 ulpi_write(phy, 0x08, 0x09);
482 } 482 }
483 483
484 /* 484 /*
@@ -495,8 +495,8 @@ static int msm_otg_suspend(struct msm_otg *motg)
495 } 495 }
496 496
497 if (cnt >= PHY_SUSPEND_TIMEOUT_USEC) { 497 if (cnt >= PHY_SUSPEND_TIMEOUT_USEC) {
498 dev_err(otg->dev, "Unable to suspend PHY\n"); 498 dev_err(phy->dev, "Unable to suspend PHY\n");
499 msm_otg_reset(otg); 499 msm_otg_reset(phy);
500 enable_irq(motg->irq); 500 enable_irq(motg->irq);
501 return -ETIMEDOUT; 501 return -ETIMEDOUT;
502 } 502 }
@@ -528,7 +528,7 @@ static int msm_otg_suspend(struct msm_otg *motg)
528 msm_hsusb_config_vddcx(0); 528 msm_hsusb_config_vddcx(0);
529 } 529 }
530 530
531 if (device_may_wakeup(otg->dev)) 531 if (device_may_wakeup(phy->dev))
532 enable_irq_wake(motg->irq); 532 enable_irq_wake(motg->irq);
533 if (bus) 533 if (bus)
534 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags); 534 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags);
@@ -536,15 +536,15 @@ static int msm_otg_suspend(struct msm_otg *motg)
536 atomic_set(&motg->in_lpm, 1); 536 atomic_set(&motg->in_lpm, 1);
537 enable_irq(motg->irq); 537 enable_irq(motg->irq);
538 538
539 dev_info(otg->dev, "USB in low power mode\n"); 539 dev_info(phy->dev, "USB in low power mode\n");
540 540
541 return 0; 541 return 0;
542} 542}
543 543
544static int msm_otg_resume(struct msm_otg *motg) 544static int msm_otg_resume(struct msm_otg *motg)
545{ 545{
546 struct usb_phy *otg = &motg->otg; 546 struct usb_phy *phy = &motg->phy;
547 struct usb_bus *bus = otg->host; 547 struct usb_bus *bus = phy->otg->host;
548 int cnt = 0; 548 int cnt = 0;
549 unsigned temp; 549 unsigned temp;
550 550
@@ -592,13 +592,13 @@ static int msm_otg_resume(struct msm_otg *motg)
592 * PHY. USB state can not be restored. Re-insertion 592 * PHY. USB state can not be restored. Re-insertion
593 * of USB cable is the only way to get USB working. 593 * of USB cable is the only way to get USB working.
594 */ 594 */
595 dev_err(otg->dev, "Unable to resume USB." 595 dev_err(phy->dev, "Unable to resume USB."
596 "Re-plugin the cable\n"); 596 "Re-plugin the cable\n");
597 msm_otg_reset(otg); 597 msm_otg_reset(phy);
598 } 598 }
599 599
600skip_phy_resume: 600skip_phy_resume:
601 if (device_may_wakeup(otg->dev)) 601 if (device_may_wakeup(phy->dev))
602 disable_irq_wake(motg->irq); 602 disable_irq_wake(motg->irq);
603 if (bus) 603 if (bus)
604 set_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags); 604 set_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags);
@@ -607,11 +607,11 @@ skip_phy_resume:
607 607
608 if (motg->async_int) { 608 if (motg->async_int) {
609 motg->async_int = 0; 609 motg->async_int = 0;
610 pm_runtime_put(otg->dev); 610 pm_runtime_put(phy->dev);
611 enable_irq(motg->irq); 611 enable_irq(motg->irq);
612 } 612 }
613 613
614 dev_info(otg->dev, "USB exited from low power mode\n"); 614 dev_info(phy->dev, "USB exited from low power mode\n");
615 615
616 return 0; 616 return 0;
617} 617}
@@ -623,13 +623,13 @@ static void msm_otg_notify_charger(struct msm_otg *motg, unsigned mA)
623 return; 623 return;
624 624
625 /* TODO: Notify PMIC about available current */ 625 /* TODO: Notify PMIC about available current */
626 dev_info(motg->otg.dev, "Avail curr from USB = %u\n", mA); 626 dev_info(motg->phy.dev, "Avail curr from USB = %u\n", mA);
627 motg->cur_power = mA; 627 motg->cur_power = mA;
628} 628}
629 629
630static int msm_otg_set_power(struct usb_phy *otg, unsigned mA) 630static int msm_otg_set_power(struct usb_phy *phy, unsigned mA)
631{ 631{
632 struct msm_otg *motg = container_of(otg, struct msm_otg, otg); 632 struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
633 633
634 /* 634 /*
635 * Gadget driver uses set_power method to notify about the 635 * Gadget driver uses set_power method to notify about the
@@ -644,19 +644,19 @@ static int msm_otg_set_power(struct usb_phy *otg, unsigned mA)
644 return 0; 644 return 0;
645} 645}
646 646
647static void msm_otg_start_host(struct usb_phy *otg, int on) 647static void msm_otg_start_host(struct usb_phy *phy, int on)
648{ 648{
649 struct msm_otg *motg = container_of(otg, struct msm_otg, otg); 649 struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
650 struct msm_otg_platform_data *pdata = motg->pdata; 650 struct msm_otg_platform_data *pdata = motg->pdata;
651 struct usb_hcd *hcd; 651 struct usb_hcd *hcd;
652 652
653 if (!otg->host) 653 if (!phy->otg->host)
654 return; 654 return;
655 655
656 hcd = bus_to_hcd(otg->host); 656 hcd = bus_to_hcd(phy->otg->host);
657 657
658 if (on) { 658 if (on) {
659 dev_dbg(otg->dev, "host on\n"); 659 dev_dbg(phy->dev, "host on\n");
660 660
661 if (pdata->vbus_power) 661 if (pdata->vbus_power)
662 pdata->vbus_power(1); 662 pdata->vbus_power(1);
@@ -671,7 +671,7 @@ static void msm_otg_start_host(struct usb_phy *otg, int on)
671 usb_add_hcd(hcd, hcd->irq, IRQF_SHARED); 671 usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
672#endif 672#endif
673 } else { 673 } else {
674 dev_dbg(otg->dev, "host off\n"); 674 dev_dbg(phy->dev, "host off\n");
675 675
676#ifdef CONFIG_USB 676#ifdef CONFIG_USB
677 usb_remove_hcd(hcd); 677 usb_remove_hcd(hcd);
@@ -683,9 +683,9 @@ static void msm_otg_start_host(struct usb_phy *otg, int on)
683 } 683 }
684} 684}
685 685
686static int msm_otg_set_host(struct usb_phy *otg, struct usb_bus *host) 686static int msm_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
687{ 687{
688 struct msm_otg *motg = container_of(otg, struct msm_otg, otg); 688 struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy);
689 struct usb_hcd *hcd; 689 struct usb_hcd *hcd;
690 690
691 /* 691 /*
@@ -693,16 +693,16 @@ static int msm_otg_set_host(struct usb_phy *otg, struct usb_bus *host)
693 * only peripheral configuration. 693 * only peripheral configuration.
694 */ 694 */
695 if (motg->pdata->mode == USB_PERIPHERAL) { 695 if (motg->pdata->mode == USB_PERIPHERAL) {
696 dev_info(otg->dev, "Host mode is not supported\n"); 696 dev_info(otg->phy->dev, "Host mode is not supported\n");
697 return -ENODEV; 697 return -ENODEV;
698 } 698 }
699 699
700 if (!host) { 700 if (!host) {
701 if (otg->state == OTG_STATE_A_HOST) { 701 if (otg->phy->state == OTG_STATE_A_HOST) {
702 pm_runtime_get_sync(otg->dev); 702 pm_runtime_get_sync(otg->phy->dev);
703 msm_otg_start_host(otg, 0); 703 msm_otg_start_host(otg->phy, 0);
704 otg->host = NULL; 704 otg->host = NULL;
705 otg->state = OTG_STATE_UNDEFINED; 705 otg->phy->state = OTG_STATE_UNDEFINED;
706 schedule_work(&motg->sm_work); 706 schedule_work(&motg->sm_work);
707 } else { 707 } else {
708 otg->host = NULL; 708 otg->host = NULL;
@@ -715,30 +715,30 @@ static int msm_otg_set_host(struct usb_phy *otg, struct usb_bus *host)
715 hcd->power_budget = motg->pdata->power_budget; 715 hcd->power_budget = motg->pdata->power_budget;
716 716
717 otg->host = host; 717 otg->host = host;
718 dev_dbg(otg->dev, "host driver registered w/ tranceiver\n"); 718 dev_dbg(otg->phy->dev, "host driver registered w/ tranceiver\n");
719 719
720 /* 720 /*
721 * Kick the state machine work, if peripheral is not supported 721 * Kick the state machine work, if peripheral is not supported
722 * or peripheral is already registered with us. 722 * or peripheral is already registered with us.
723 */ 723 */
724 if (motg->pdata->mode == USB_HOST || otg->gadget) { 724 if (motg->pdata->mode == USB_HOST || otg->gadget) {
725 pm_runtime_get_sync(otg->dev); 725 pm_runtime_get_sync(otg->phy->dev);
726 schedule_work(&motg->sm_work); 726 schedule_work(&motg->sm_work);
727 } 727 }
728 728
729 return 0; 729 return 0;
730} 730}
731 731
732static void msm_otg_start_peripheral(struct usb_phy *otg, int on) 732static void msm_otg_start_peripheral(struct usb_phy *phy, int on)
733{ 733{
734 struct msm_otg *motg = container_of(otg, struct msm_otg, otg); 734 struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
735 struct msm_otg_platform_data *pdata = motg->pdata; 735 struct msm_otg_platform_data *pdata = motg->pdata;
736 736
737 if (!otg->gadget) 737 if (!phy->otg->gadget)
738 return; 738 return;
739 739
740 if (on) { 740 if (on) {
741 dev_dbg(otg->dev, "gadget on\n"); 741 dev_dbg(phy->dev, "gadget on\n");
742 /* 742 /*
743 * Some boards have a switch cotrolled by gpio 743 * Some boards have a switch cotrolled by gpio
744 * to enable/disable internal HUB. Disable internal 744 * to enable/disable internal HUB. Disable internal
@@ -746,36 +746,36 @@ static void msm_otg_start_peripheral(struct usb_phy *otg, int on)
746 */ 746 */
747 if (pdata->setup_gpio) 747 if (pdata->setup_gpio)
748 pdata->setup_gpio(OTG_STATE_B_PERIPHERAL); 748 pdata->setup_gpio(OTG_STATE_B_PERIPHERAL);
749 usb_gadget_vbus_connect(otg->gadget); 749 usb_gadget_vbus_connect(phy->otg->gadget);
750 } else { 750 } else {
751 dev_dbg(otg->dev, "gadget off\n"); 751 dev_dbg(phy->dev, "gadget off\n");
752 usb_gadget_vbus_disconnect(otg->gadget); 752 usb_gadget_vbus_disconnect(phy->otg->gadget);
753 if (pdata->setup_gpio) 753 if (pdata->setup_gpio)
754 pdata->setup_gpio(OTG_STATE_UNDEFINED); 754 pdata->setup_gpio(OTG_STATE_UNDEFINED);
755 } 755 }
756 756
757} 757}
758 758
759static int msm_otg_set_peripheral(struct usb_phy *otg, 759static int msm_otg_set_peripheral(struct usb_otg *otg,
760 struct usb_gadget *gadget) 760 struct usb_gadget *gadget)
761{ 761{
762 struct msm_otg *motg = container_of(otg, struct msm_otg, otg); 762 struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy);
763 763
764 /* 764 /*
765 * Fail peripheral registration if this board can support 765 * Fail peripheral registration if this board can support
766 * only host configuration. 766 * only host configuration.
767 */ 767 */
768 if (motg->pdata->mode == USB_HOST) { 768 if (motg->pdata->mode == USB_HOST) {
769 dev_info(otg->dev, "Peripheral mode is not supported\n"); 769 dev_info(otg->phy->dev, "Peripheral mode is not supported\n");
770 return -ENODEV; 770 return -ENODEV;
771 } 771 }
772 772
773 if (!gadget) { 773 if (!gadget) {
774 if (otg->state == OTG_STATE_B_PERIPHERAL) { 774 if (otg->phy->state == OTG_STATE_B_PERIPHERAL) {
775 pm_runtime_get_sync(otg->dev); 775 pm_runtime_get_sync(otg->phy->dev);
776 msm_otg_start_peripheral(otg, 0); 776 msm_otg_start_peripheral(otg->phy, 0);
777 otg->gadget = NULL; 777 otg->gadget = NULL;
778 otg->state = OTG_STATE_UNDEFINED; 778 otg->phy->state = OTG_STATE_UNDEFINED;
779 schedule_work(&motg->sm_work); 779 schedule_work(&motg->sm_work);
780 } else { 780 } else {
781 otg->gadget = NULL; 781 otg->gadget = NULL;
@@ -784,14 +784,14 @@ static int msm_otg_set_peripheral(struct usb_phy *otg,
784 return 0; 784 return 0;
785 } 785 }
786 otg->gadget = gadget; 786 otg->gadget = gadget;
787 dev_dbg(otg->dev, "peripheral driver registered w/ tranceiver\n"); 787 dev_dbg(otg->phy->dev, "peripheral driver registered w/ tranceiver\n");
788 788
789 /* 789 /*
790 * Kick the state machine work, if host is not supported 790 * Kick the state machine work, if host is not supported
791 * or host is already registered with us. 791 * or host is already registered with us.
792 */ 792 */
793 if (motg->pdata->mode == USB_PERIPHERAL || otg->host) { 793 if (motg->pdata->mode == USB_PERIPHERAL || otg->host) {
794 pm_runtime_get_sync(otg->dev); 794 pm_runtime_get_sync(otg->phy->dev);
795 schedule_work(&motg->sm_work); 795 schedule_work(&motg->sm_work);
796 } 796 }
797 797
@@ -800,17 +800,17 @@ static int msm_otg_set_peripheral(struct usb_phy *otg,
800 800
801static bool msm_chg_check_secondary_det(struct msm_otg *motg) 801static bool msm_chg_check_secondary_det(struct msm_otg *motg)
802{ 802{
803 struct usb_phy *otg = &motg->otg; 803 struct usb_phy *phy = &motg->phy;
804 u32 chg_det; 804 u32 chg_det;
805 bool ret = false; 805 bool ret = false;
806 806
807 switch (motg->pdata->phy_type) { 807 switch (motg->pdata->phy_type) {
808 case CI_45NM_INTEGRATED_PHY: 808 case CI_45NM_INTEGRATED_PHY:
809 chg_det = ulpi_read(otg, 0x34); 809 chg_det = ulpi_read(phy, 0x34);
810 ret = chg_det & (1 << 4); 810 ret = chg_det & (1 << 4);
811 break; 811 break;
812 case SNPS_28NM_INTEGRATED_PHY: 812 case SNPS_28NM_INTEGRATED_PHY:
813 chg_det = ulpi_read(otg, 0x87); 813 chg_det = ulpi_read(phy, 0x87);
814 ret = chg_det & 1; 814 ret = chg_det & 1;
815 break; 815 break;
816 default: 816 default:
@@ -821,38 +821,38 @@ static bool msm_chg_check_secondary_det(struct msm_otg *motg)
821 821
822static void msm_chg_enable_secondary_det(struct msm_otg *motg) 822static void msm_chg_enable_secondary_det(struct msm_otg *motg)
823{ 823{
824 struct usb_phy *otg = &motg->otg; 824 struct usb_phy *phy = &motg->phy;
825 u32 chg_det; 825 u32 chg_det;
826 826
827 switch (motg->pdata->phy_type) { 827 switch (motg->pdata->phy_type) {
828 case CI_45NM_INTEGRATED_PHY: 828 case CI_45NM_INTEGRATED_PHY:
829 chg_det = ulpi_read(otg, 0x34); 829 chg_det = ulpi_read(phy, 0x34);
830 /* Turn off charger block */ 830 /* Turn off charger block */
831 chg_det |= ~(1 << 1); 831 chg_det |= ~(1 << 1);
832 ulpi_write(otg, chg_det, 0x34); 832 ulpi_write(phy, chg_det, 0x34);
833 udelay(20); 833 udelay(20);
834 /* control chg block via ULPI */ 834 /* control chg block via ULPI */
835 chg_det &= ~(1 << 3); 835 chg_det &= ~(1 << 3);
836 ulpi_write(otg, chg_det, 0x34); 836 ulpi_write(phy, chg_det, 0x34);
837 /* put it in host mode for enabling D- source */ 837 /* put it in host mode for enabling D- source */
838 chg_det &= ~(1 << 2); 838 chg_det &= ~(1 << 2);
839 ulpi_write(otg, chg_det, 0x34); 839 ulpi_write(phy, chg_det, 0x34);
840 /* Turn on chg detect block */ 840 /* Turn on chg detect block */
841 chg_det &= ~(1 << 1); 841 chg_det &= ~(1 << 1);
842 ulpi_write(otg, chg_det, 0x34); 842 ulpi_write(phy, chg_det, 0x34);
843 udelay(20); 843 udelay(20);
844 /* enable chg detection */ 844 /* enable chg detection */
845 chg_det &= ~(1 << 0); 845 chg_det &= ~(1 << 0);
846 ulpi_write(otg, chg_det, 0x34); 846 ulpi_write(phy, chg_det, 0x34);
847 break; 847 break;
848 case SNPS_28NM_INTEGRATED_PHY: 848 case SNPS_28NM_INTEGRATED_PHY:
849 /* 849 /*
850 * Configure DM as current source, DP as current sink 850 * Configure DM as current source, DP as current sink
851 * and enable battery charging comparators. 851 * and enable battery charging comparators.
852 */ 852 */
853 ulpi_write(otg, 0x8, 0x85); 853 ulpi_write(phy, 0x8, 0x85);
854 ulpi_write(otg, 0x2, 0x85); 854 ulpi_write(phy, 0x2, 0x85);
855 ulpi_write(otg, 0x1, 0x85); 855 ulpi_write(phy, 0x1, 0x85);
856 break; 856 break;
857 default: 857 default:
858 break; 858 break;
@@ -861,17 +861,17 @@ static void msm_chg_enable_secondary_det(struct msm_otg *motg)
861 861
862static bool msm_chg_check_primary_det(struct msm_otg *motg) 862static bool msm_chg_check_primary_det(struct msm_otg *motg)
863{ 863{
864 struct usb_phy *otg = &motg->otg; 864 struct usb_phy *phy = &motg->phy;
865 u32 chg_det; 865 u32 chg_det;
866 bool ret = false; 866 bool ret = false;
867 867
868 switch (motg->pdata->phy_type) { 868 switch (motg->pdata->phy_type) {
869 case CI_45NM_INTEGRATED_PHY: 869 case CI_45NM_INTEGRATED_PHY:
870 chg_det = ulpi_read(otg, 0x34); 870 chg_det = ulpi_read(phy, 0x34);
871 ret = chg_det & (1 << 4); 871 ret = chg_det & (1 << 4);
872 break; 872 break;
873 case SNPS_28NM_INTEGRATED_PHY: 873 case SNPS_28NM_INTEGRATED_PHY:
874 chg_det = ulpi_read(otg, 0x87); 874 chg_det = ulpi_read(phy, 0x87);
875 ret = chg_det & 1; 875 ret = chg_det & 1;
876 break; 876 break;
877 default: 877 default:
@@ -882,23 +882,23 @@ static bool msm_chg_check_primary_det(struct msm_otg *motg)
882 882
883static void msm_chg_enable_primary_det(struct msm_otg *motg) 883static void msm_chg_enable_primary_det(struct msm_otg *motg)
884{ 884{
885 struct usb_phy *otg = &motg->otg; 885 struct usb_phy *phy = &motg->phy;
886 u32 chg_det; 886 u32 chg_det;
887 887
888 switch (motg->pdata->phy_type) { 888 switch (motg->pdata->phy_type) {
889 case CI_45NM_INTEGRATED_PHY: 889 case CI_45NM_INTEGRATED_PHY:
890 chg_det = ulpi_read(otg, 0x34); 890 chg_det = ulpi_read(phy, 0x34);
891 /* enable chg detection */ 891 /* enable chg detection */
892 chg_det &= ~(1 << 0); 892 chg_det &= ~(1 << 0);
893 ulpi_write(otg, chg_det, 0x34); 893 ulpi_write(phy, chg_det, 0x34);
894 break; 894 break;
895 case SNPS_28NM_INTEGRATED_PHY: 895 case SNPS_28NM_INTEGRATED_PHY:
896 /* 896 /*
897 * Configure DP as current source, DM as current sink 897 * Configure DP as current source, DM as current sink
898 * and enable battery charging comparators. 898 * and enable battery charging comparators.
899 */ 899 */
900 ulpi_write(otg, 0x2, 0x85); 900 ulpi_write(phy, 0x2, 0x85);
901 ulpi_write(otg, 0x1, 0x85); 901 ulpi_write(phy, 0x1, 0x85);
902 break; 902 break;
903 default: 903 default:
904 break; 904 break;
@@ -907,17 +907,17 @@ static void msm_chg_enable_primary_det(struct msm_otg *motg)
907 907
908static bool msm_chg_check_dcd(struct msm_otg *motg) 908static bool msm_chg_check_dcd(struct msm_otg *motg)
909{ 909{
910 struct usb_phy *otg = &motg->otg; 910 struct usb_phy *phy = &motg->phy;
911 u32 line_state; 911 u32 line_state;
912 bool ret = false; 912 bool ret = false;
913 913
914 switch (motg->pdata->phy_type) { 914 switch (motg->pdata->phy_type) {
915 case CI_45NM_INTEGRATED_PHY: 915 case CI_45NM_INTEGRATED_PHY:
916 line_state = ulpi_read(otg, 0x15); 916 line_state = ulpi_read(phy, 0x15);
917 ret = !(line_state & 1); 917 ret = !(line_state & 1);
918 break; 918 break;
919 case SNPS_28NM_INTEGRATED_PHY: 919 case SNPS_28NM_INTEGRATED_PHY:
920 line_state = ulpi_read(otg, 0x87); 920 line_state = ulpi_read(phy, 0x87);
921 ret = line_state & 2; 921 ret = line_state & 2;
922 break; 922 break;
923 default: 923 default:
@@ -928,17 +928,17 @@ static bool msm_chg_check_dcd(struct msm_otg *motg)
928 928
929static void msm_chg_disable_dcd(struct msm_otg *motg) 929static void msm_chg_disable_dcd(struct msm_otg *motg)
930{ 930{
931 struct usb_phy *otg = &motg->otg; 931 struct usb_phy *phy = &motg->phy;
932 u32 chg_det; 932 u32 chg_det;
933 933
934 switch (motg->pdata->phy_type) { 934 switch (motg->pdata->phy_type) {
935 case CI_45NM_INTEGRATED_PHY: 935 case CI_45NM_INTEGRATED_PHY:
936 chg_det = ulpi_read(otg, 0x34); 936 chg_det = ulpi_read(phy, 0x34);
937 chg_det &= ~(1 << 5); 937 chg_det &= ~(1 << 5);
938 ulpi_write(otg, chg_det, 0x34); 938 ulpi_write(phy, chg_det, 0x34);
939 break; 939 break;
940 case SNPS_28NM_INTEGRATED_PHY: 940 case SNPS_28NM_INTEGRATED_PHY:
941 ulpi_write(otg, 0x10, 0x86); 941 ulpi_write(phy, 0x10, 0x86);
942 break; 942 break;
943 default: 943 default:
944 break; 944 break;
@@ -947,19 +947,19 @@ static void msm_chg_disable_dcd(struct msm_otg *motg)
947 947
948static void msm_chg_enable_dcd(struct msm_otg *motg) 948static void msm_chg_enable_dcd(struct msm_otg *motg)
949{ 949{
950 struct usb_phy *otg = &motg->otg; 950 struct usb_phy *phy = &motg->phy;
951 u32 chg_det; 951 u32 chg_det;
952 952
953 switch (motg->pdata->phy_type) { 953 switch (motg->pdata->phy_type) {
954 case CI_45NM_INTEGRATED_PHY: 954 case CI_45NM_INTEGRATED_PHY:
955 chg_det = ulpi_read(otg, 0x34); 955 chg_det = ulpi_read(phy, 0x34);
956 /* Turn on D+ current source */ 956 /* Turn on D+ current source */
957 chg_det |= (1 << 5); 957 chg_det |= (1 << 5);
958 ulpi_write(otg, chg_det, 0x34); 958 ulpi_write(phy, chg_det, 0x34);
959 break; 959 break;
960 case SNPS_28NM_INTEGRATED_PHY: 960 case SNPS_28NM_INTEGRATED_PHY:
961 /* Data contact detection enable */ 961 /* Data contact detection enable */
962 ulpi_write(otg, 0x10, 0x85); 962 ulpi_write(phy, 0x10, 0x85);
963 break; 963 break;
964 default: 964 default:
965 break; 965 break;
@@ -968,32 +968,32 @@ static void msm_chg_enable_dcd(struct msm_otg *motg)
968 968
969static void msm_chg_block_on(struct msm_otg *motg) 969static void msm_chg_block_on(struct msm_otg *motg)
970{ 970{
971 struct usb_phy *otg = &motg->otg; 971 struct usb_phy *phy = &motg->phy;
972 u32 func_ctrl, chg_det; 972 u32 func_ctrl, chg_det;
973 973
974 /* put the controller in non-driving mode */ 974 /* put the controller in non-driving mode */
975 func_ctrl = ulpi_read(otg, ULPI_FUNC_CTRL); 975 func_ctrl = ulpi_read(phy, ULPI_FUNC_CTRL);
976 func_ctrl &= ~ULPI_FUNC_CTRL_OPMODE_MASK; 976 func_ctrl &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
977 func_ctrl |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING; 977 func_ctrl |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
978 ulpi_write(otg, func_ctrl, ULPI_FUNC_CTRL); 978 ulpi_write(phy, func_ctrl, ULPI_FUNC_CTRL);
979 979
980 switch (motg->pdata->phy_type) { 980 switch (motg->pdata->phy_type) {
981 case CI_45NM_INTEGRATED_PHY: 981 case CI_45NM_INTEGRATED_PHY:
982 chg_det = ulpi_read(otg, 0x34); 982 chg_det = ulpi_read(phy, 0x34);
983 /* control chg block via ULPI */ 983 /* control chg block via ULPI */
984 chg_det &= ~(1 << 3); 984 chg_det &= ~(1 << 3);
985 ulpi_write(otg, chg_det, 0x34); 985 ulpi_write(phy, chg_det, 0x34);
986 /* Turn on chg detect block */ 986 /* Turn on chg detect block */
987 chg_det &= ~(1 << 1); 987 chg_det &= ~(1 << 1);
988 ulpi_write(otg, chg_det, 0x34); 988 ulpi_write(phy, chg_det, 0x34);
989 udelay(20); 989 udelay(20);
990 break; 990 break;
991 case SNPS_28NM_INTEGRATED_PHY: 991 case SNPS_28NM_INTEGRATED_PHY:
992 /* Clear charger detecting control bits */ 992 /* Clear charger detecting control bits */
993 ulpi_write(otg, 0x3F, 0x86); 993 ulpi_write(phy, 0x3F, 0x86);
994 /* Clear alt interrupt latch and enable bits */ 994 /* Clear alt interrupt latch and enable bits */
995 ulpi_write(otg, 0x1F, 0x92); 995 ulpi_write(phy, 0x1F, 0x92);
996 ulpi_write(otg, 0x1F, 0x95); 996 ulpi_write(phy, 0x1F, 0x95);
997 udelay(100); 997 udelay(100);
998 break; 998 break;
999 default: 999 default:
@@ -1003,32 +1003,32 @@ static void msm_chg_block_on(struct msm_otg *motg)
1003 1003
1004static void msm_chg_block_off(struct msm_otg *motg) 1004static void msm_chg_block_off(struct msm_otg *motg)
1005{ 1005{
1006 struct usb_phy *otg = &motg->otg; 1006 struct usb_phy *phy = &motg->phy;
1007 u32 func_ctrl, chg_det; 1007 u32 func_ctrl, chg_det;
1008 1008
1009 switch (motg->pdata->phy_type) { 1009 switch (motg->pdata->phy_type) {
1010 case CI_45NM_INTEGRATED_PHY: 1010 case CI_45NM_INTEGRATED_PHY:
1011 chg_det = ulpi_read(otg, 0x34); 1011 chg_det = ulpi_read(phy, 0x34);
1012 /* Turn off charger block */ 1012 /* Turn off charger block */
1013 chg_det |= ~(1 << 1); 1013 chg_det |= ~(1 << 1);
1014 ulpi_write(otg, chg_det, 0x34); 1014 ulpi_write(phy, chg_det, 0x34);
1015 break; 1015 break;
1016 case SNPS_28NM_INTEGRATED_PHY: 1016 case SNPS_28NM_INTEGRATED_PHY:
1017 /* Clear charger detecting control bits */ 1017 /* Clear charger detecting control bits */
1018 ulpi_write(otg, 0x3F, 0x86); 1018 ulpi_write(phy, 0x3F, 0x86);
1019 /* Clear alt interrupt latch and enable bits */ 1019 /* Clear alt interrupt latch and enable bits */
1020 ulpi_write(otg, 0x1F, 0x92); 1020 ulpi_write(phy, 0x1F, 0x92);
1021 ulpi_write(otg, 0x1F, 0x95); 1021 ulpi_write(phy, 0x1F, 0x95);
1022 break; 1022 break;
1023 default: 1023 default:
1024 break; 1024 break;
1025 } 1025 }
1026 1026
1027 /* put the controller in normal mode */ 1027 /* put the controller in normal mode */
1028 func_ctrl = ulpi_read(otg, ULPI_FUNC_CTRL); 1028 func_ctrl = ulpi_read(phy, ULPI_FUNC_CTRL);
1029 func_ctrl &= ~ULPI_FUNC_CTRL_OPMODE_MASK; 1029 func_ctrl &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
1030 func_ctrl |= ULPI_FUNC_CTRL_OPMODE_NORMAL; 1030 func_ctrl |= ULPI_FUNC_CTRL_OPMODE_NORMAL;
1031 ulpi_write(otg, func_ctrl, ULPI_FUNC_CTRL); 1031 ulpi_write(phy, func_ctrl, ULPI_FUNC_CTRL);
1032} 1032}
1033 1033
1034#define MSM_CHG_DCD_POLL_TIME (100 * HZ/1000) /* 100 msec */ 1034#define MSM_CHG_DCD_POLL_TIME (100 * HZ/1000) /* 100 msec */
@@ -1038,14 +1038,14 @@ static void msm_chg_block_off(struct msm_otg *motg)
1038static void msm_chg_detect_work(struct work_struct *w) 1038static void msm_chg_detect_work(struct work_struct *w)
1039{ 1039{
1040 struct msm_otg *motg = container_of(w, struct msm_otg, chg_work.work); 1040 struct msm_otg *motg = container_of(w, struct msm_otg, chg_work.work);
1041 struct usb_phy *otg = &motg->otg; 1041 struct usb_phy *phy = &motg->phy;
1042 bool is_dcd, tmout, vout; 1042 bool is_dcd, tmout, vout;
1043 unsigned long delay; 1043 unsigned long delay;
1044 1044
1045 dev_dbg(otg->dev, "chg detection work\n"); 1045 dev_dbg(phy->dev, "chg detection work\n");
1046 switch (motg->chg_state) { 1046 switch (motg->chg_state) {
1047 case USB_CHG_STATE_UNDEFINED: 1047 case USB_CHG_STATE_UNDEFINED:
1048 pm_runtime_get_sync(otg->dev); 1048 pm_runtime_get_sync(phy->dev);
1049 msm_chg_block_on(motg); 1049 msm_chg_block_on(motg);
1050 msm_chg_enable_dcd(motg); 1050 msm_chg_enable_dcd(motg);
1051 motg->chg_state = USB_CHG_STATE_WAIT_FOR_DCD; 1051 motg->chg_state = USB_CHG_STATE_WAIT_FOR_DCD;
@@ -1088,7 +1088,7 @@ static void msm_chg_detect_work(struct work_struct *w)
1088 motg->chg_state = USB_CHG_STATE_DETECTED; 1088 motg->chg_state = USB_CHG_STATE_DETECTED;
1089 case USB_CHG_STATE_DETECTED: 1089 case USB_CHG_STATE_DETECTED:
1090 msm_chg_block_off(motg); 1090 msm_chg_block_off(motg);
1091 dev_dbg(otg->dev, "charger = %d\n", motg->chg_type); 1091 dev_dbg(phy->dev, "charger = %d\n", motg->chg_type);
1092 schedule_work(&motg->sm_work); 1092 schedule_work(&motg->sm_work);
1093 return; 1093 return;
1094 default: 1094 default:
@@ -1152,22 +1152,22 @@ static void msm_otg_init_sm(struct msm_otg *motg)
1152static void msm_otg_sm_work(struct work_struct *w) 1152static void msm_otg_sm_work(struct work_struct *w)
1153{ 1153{
1154 struct msm_otg *motg = container_of(w, struct msm_otg, sm_work); 1154 struct msm_otg *motg = container_of(w, struct msm_otg, sm_work);
1155 struct usb_phy *otg = &motg->otg; 1155 struct usb_otg *otg = motg->phy.otg;
1156 1156
1157 switch (otg->state) { 1157 switch (otg->phy->state) {
1158 case OTG_STATE_UNDEFINED: 1158 case OTG_STATE_UNDEFINED:
1159 dev_dbg(otg->dev, "OTG_STATE_UNDEFINED state\n"); 1159 dev_dbg(otg->phy->dev, "OTG_STATE_UNDEFINED state\n");
1160 msm_otg_reset(otg); 1160 msm_otg_reset(otg->phy);
1161 msm_otg_init_sm(motg); 1161 msm_otg_init_sm(motg);
1162 otg->state = OTG_STATE_B_IDLE; 1162 otg->phy->state = OTG_STATE_B_IDLE;
1163 /* FALL THROUGH */ 1163 /* FALL THROUGH */
1164 case OTG_STATE_B_IDLE: 1164 case OTG_STATE_B_IDLE:
1165 dev_dbg(otg->dev, "OTG_STATE_B_IDLE state\n"); 1165 dev_dbg(otg->phy->dev, "OTG_STATE_B_IDLE state\n");
1166 if (!test_bit(ID, &motg->inputs) && otg->host) { 1166 if (!test_bit(ID, &motg->inputs) && otg->host) {
1167 /* disable BSV bit */ 1167 /* disable BSV bit */
1168 writel(readl(USB_OTGSC) & ~OTGSC_BSVIE, USB_OTGSC); 1168 writel(readl(USB_OTGSC) & ~OTGSC_BSVIE, USB_OTGSC);
1169 msm_otg_start_host(otg, 1); 1169 msm_otg_start_host(otg->phy, 1);
1170 otg->state = OTG_STATE_A_HOST; 1170 otg->phy->state = OTG_STATE_A_HOST;
1171 } else if (test_bit(B_SESS_VLD, &motg->inputs)) { 1171 } else if (test_bit(B_SESS_VLD, &motg->inputs)) {
1172 switch (motg->chg_state) { 1172 switch (motg->chg_state) {
1173 case USB_CHG_STATE_UNDEFINED: 1173 case USB_CHG_STATE_UNDEFINED:
@@ -1182,13 +1182,15 @@ static void msm_otg_sm_work(struct work_struct *w)
1182 case USB_CDP_CHARGER: 1182 case USB_CDP_CHARGER:
1183 msm_otg_notify_charger(motg, 1183 msm_otg_notify_charger(motg,
1184 IDEV_CHG_MAX); 1184 IDEV_CHG_MAX);
1185 msm_otg_start_peripheral(otg, 1); 1185 msm_otg_start_peripheral(otg->phy, 1);
1186 otg->state = OTG_STATE_B_PERIPHERAL; 1186 otg->phy->state
1187 = OTG_STATE_B_PERIPHERAL;
1187 break; 1188 break;
1188 case USB_SDP_CHARGER: 1189 case USB_SDP_CHARGER:
1189 msm_otg_notify_charger(motg, IUNIT); 1190 msm_otg_notify_charger(motg, IUNIT);
1190 msm_otg_start_peripheral(otg, 1); 1191 msm_otg_start_peripheral(otg->phy, 1);
1191 otg->state = OTG_STATE_B_PERIPHERAL; 1192 otg->phy->state
1193 = OTG_STATE_B_PERIPHERAL;
1192 break; 1194 break;
1193 default: 1195 default:
1194 break; 1196 break;
@@ -1204,34 +1206,34 @@ static void msm_otg_sm_work(struct work_struct *w)
1204 * is incremented in charger detection work. 1206 * is incremented in charger detection work.
1205 */ 1207 */
1206 if (cancel_delayed_work_sync(&motg->chg_work)) { 1208 if (cancel_delayed_work_sync(&motg->chg_work)) {
1207 pm_runtime_put_sync(otg->dev); 1209 pm_runtime_put_sync(otg->phy->dev);
1208 msm_otg_reset(otg); 1210 msm_otg_reset(otg->phy);
1209 } 1211 }
1210 msm_otg_notify_charger(motg, 0); 1212 msm_otg_notify_charger(motg, 0);
1211 motg->chg_state = USB_CHG_STATE_UNDEFINED; 1213 motg->chg_state = USB_CHG_STATE_UNDEFINED;
1212 motg->chg_type = USB_INVALID_CHARGER; 1214 motg->chg_type = USB_INVALID_CHARGER;
1213 } 1215 }
1214 pm_runtime_put_sync(otg->dev); 1216 pm_runtime_put_sync(otg->phy->dev);
1215 break; 1217 break;
1216 case OTG_STATE_B_PERIPHERAL: 1218 case OTG_STATE_B_PERIPHERAL:
1217 dev_dbg(otg->dev, "OTG_STATE_B_PERIPHERAL state\n"); 1219 dev_dbg(otg->phy->dev, "OTG_STATE_B_PERIPHERAL state\n");
1218 if (!test_bit(B_SESS_VLD, &motg->inputs) || 1220 if (!test_bit(B_SESS_VLD, &motg->inputs) ||
1219 !test_bit(ID, &motg->inputs)) { 1221 !test_bit(ID, &motg->inputs)) {
1220 msm_otg_notify_charger(motg, 0); 1222 msm_otg_notify_charger(motg, 0);
1221 msm_otg_start_peripheral(otg, 0); 1223 msm_otg_start_peripheral(otg->phy, 0);
1222 motg->chg_state = USB_CHG_STATE_UNDEFINED; 1224 motg->chg_state = USB_CHG_STATE_UNDEFINED;
1223 motg->chg_type = USB_INVALID_CHARGER; 1225 motg->chg_type = USB_INVALID_CHARGER;
1224 otg->state = OTG_STATE_B_IDLE; 1226 otg->phy->state = OTG_STATE_B_IDLE;
1225 msm_otg_reset(otg); 1227 msm_otg_reset(otg->phy);
1226 schedule_work(w); 1228 schedule_work(w);
1227 } 1229 }
1228 break; 1230 break;
1229 case OTG_STATE_A_HOST: 1231 case OTG_STATE_A_HOST:
1230 dev_dbg(otg->dev, "OTG_STATE_A_HOST state\n"); 1232 dev_dbg(otg->phy->dev, "OTG_STATE_A_HOST state\n");
1231 if (test_bit(ID, &motg->inputs)) { 1233 if (test_bit(ID, &motg->inputs)) {
1232 msm_otg_start_host(otg, 0); 1234 msm_otg_start_host(otg->phy, 0);
1233 otg->state = OTG_STATE_B_IDLE; 1235 otg->phy->state = OTG_STATE_B_IDLE;
1234 msm_otg_reset(otg); 1236 msm_otg_reset(otg->phy);
1235 schedule_work(w); 1237 schedule_work(w);
1236 } 1238 }
1237 break; 1239 break;
@@ -1243,13 +1245,13 @@ static void msm_otg_sm_work(struct work_struct *w)
1243static irqreturn_t msm_otg_irq(int irq, void *data) 1245static irqreturn_t msm_otg_irq(int irq, void *data)
1244{ 1246{
1245 struct msm_otg *motg = data; 1247 struct msm_otg *motg = data;
1246 struct usb_phy *otg = &motg->otg; 1248 struct usb_phy *phy = &motg->phy;
1247 u32 otgsc = 0; 1249 u32 otgsc = 0;
1248 1250
1249 if (atomic_read(&motg->in_lpm)) { 1251 if (atomic_read(&motg->in_lpm)) {
1250 disable_irq_nosync(irq); 1252 disable_irq_nosync(irq);
1251 motg->async_int = 1; 1253 motg->async_int = 1;
1252 pm_runtime_get(otg->dev); 1254 pm_runtime_get(phy->dev);
1253 return IRQ_HANDLED; 1255 return IRQ_HANDLED;
1254 } 1256 }
1255 1257
@@ -1262,15 +1264,15 @@ static irqreturn_t msm_otg_irq(int irq, void *data)
1262 set_bit(ID, &motg->inputs); 1264 set_bit(ID, &motg->inputs);
1263 else 1265 else
1264 clear_bit(ID, &motg->inputs); 1266 clear_bit(ID, &motg->inputs);
1265 dev_dbg(otg->dev, "ID set/clear\n"); 1267 dev_dbg(phy->dev, "ID set/clear\n");
1266 pm_runtime_get_noresume(otg->dev); 1268 pm_runtime_get_noresume(phy->dev);
1267 } else if ((otgsc & OTGSC_BSVIS) && (otgsc & OTGSC_BSVIE)) { 1269 } else if ((otgsc & OTGSC_BSVIS) && (otgsc & OTGSC_BSVIE)) {
1268 if (otgsc & OTGSC_BSV) 1270 if (otgsc & OTGSC_BSV)
1269 set_bit(B_SESS_VLD, &motg->inputs); 1271 set_bit(B_SESS_VLD, &motg->inputs);
1270 else 1272 else
1271 clear_bit(B_SESS_VLD, &motg->inputs); 1273 clear_bit(B_SESS_VLD, &motg->inputs);
1272 dev_dbg(otg->dev, "BSV set/clear\n"); 1274 dev_dbg(phy->dev, "BSV set/clear\n");
1273 pm_runtime_get_noresume(otg->dev); 1275 pm_runtime_get_noresume(phy->dev);
1274 } 1276 }
1275 1277
1276 writel(otgsc, USB_OTGSC); 1278 writel(otgsc, USB_OTGSC);
@@ -1281,9 +1283,9 @@ static irqreturn_t msm_otg_irq(int irq, void *data)
1281static int msm_otg_mode_show(struct seq_file *s, void *unused) 1283static int msm_otg_mode_show(struct seq_file *s, void *unused)
1282{ 1284{
1283 struct msm_otg *motg = s->private; 1285 struct msm_otg *motg = s->private;
1284 struct usb_phy *otg = &motg->otg; 1286 struct usb_otg *otg = motg->phy.otg;
1285 1287
1286 switch (otg->state) { 1288 switch (otg->phy->state) {
1287 case OTG_STATE_A_HOST: 1289 case OTG_STATE_A_HOST:
1288 seq_printf(s, "host\n"); 1290 seq_printf(s, "host\n");
1289 break; 1291 break;
@@ -1309,7 +1311,7 @@ static ssize_t msm_otg_mode_write(struct file *file, const char __user *ubuf,
1309 struct seq_file *s = file->private_data; 1311 struct seq_file *s = file->private_data;
1310 struct msm_otg *motg = s->private; 1312 struct msm_otg *motg = s->private;
1311 char buf[16]; 1313 char buf[16];
1312 struct usb_phy *otg = &motg->otg; 1314 struct usb_otg *otg = motg->phy.otg;
1313 int status = count; 1315 int status = count;
1314 enum usb_mode_type req_mode; 1316 enum usb_mode_type req_mode;
1315 1317
@@ -1333,7 +1335,7 @@ static ssize_t msm_otg_mode_write(struct file *file, const char __user *ubuf,
1333 1335
1334 switch (req_mode) { 1336 switch (req_mode) {
1335 case USB_NONE: 1337 case USB_NONE:
1336 switch (otg->state) { 1338 switch (otg->phy->state) {
1337 case OTG_STATE_A_HOST: 1339 case OTG_STATE_A_HOST:
1338 case OTG_STATE_B_PERIPHERAL: 1340 case OTG_STATE_B_PERIPHERAL:
1339 set_bit(ID, &motg->inputs); 1341 set_bit(ID, &motg->inputs);
@@ -1344,7 +1346,7 @@ static ssize_t msm_otg_mode_write(struct file *file, const char __user *ubuf,
1344 } 1346 }
1345 break; 1347 break;
1346 case USB_PERIPHERAL: 1348 case USB_PERIPHERAL:
1347 switch (otg->state) { 1349 switch (otg->phy->state) {
1348 case OTG_STATE_B_IDLE: 1350 case OTG_STATE_B_IDLE:
1349 case OTG_STATE_A_HOST: 1351 case OTG_STATE_A_HOST:
1350 set_bit(ID, &motg->inputs); 1352 set_bit(ID, &motg->inputs);
@@ -1355,7 +1357,7 @@ static ssize_t msm_otg_mode_write(struct file *file, const char __user *ubuf,
1355 } 1357 }
1356 break; 1358 break;
1357 case USB_HOST: 1359 case USB_HOST:
1358 switch (otg->state) { 1360 switch (otg->phy->state) {
1359 case OTG_STATE_B_IDLE: 1361 case OTG_STATE_B_IDLE:
1360 case OTG_STATE_B_PERIPHERAL: 1362 case OTG_STATE_B_PERIPHERAL:
1361 clear_bit(ID, &motg->inputs); 1363 clear_bit(ID, &motg->inputs);
@@ -1368,7 +1370,7 @@ static ssize_t msm_otg_mode_write(struct file *file, const char __user *ubuf,
1368 goto out; 1370 goto out;
1369 } 1371 }
1370 1372
1371 pm_runtime_get_sync(otg->dev); 1373 pm_runtime_get_sync(otg->phy->dev);
1372 schedule_work(&motg->sm_work); 1374 schedule_work(&motg->sm_work);
1373out: 1375out:
1374 return status; 1376 return status;
@@ -1414,7 +1416,7 @@ static int __init msm_otg_probe(struct platform_device *pdev)
1414 int ret = 0; 1416 int ret = 0;
1415 struct resource *res; 1417 struct resource *res;
1416 struct msm_otg *motg; 1418 struct msm_otg *motg;
1417 struct usb_phy *otg; 1419 struct usb_phy *phy;
1418 1420
1419 dev_info(&pdev->dev, "msm_otg probe\n"); 1421 dev_info(&pdev->dev, "msm_otg probe\n");
1420 if (!pdev->dev.platform_data) { 1422 if (!pdev->dev.platform_data) {
@@ -1428,9 +1430,15 @@ static int __init msm_otg_probe(struct platform_device *pdev)
1428 return -ENOMEM; 1430 return -ENOMEM;
1429 } 1431 }
1430 1432
1433 motg->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
1434 if (!motg->phy.otg) {
1435 dev_err(&pdev->dev, "unable to allocate msm_otg\n");
1436 return -ENOMEM;
1437 }
1438
1431 motg->pdata = pdev->dev.platform_data; 1439 motg->pdata = pdev->dev.platform_data;
1432 otg = &motg->otg; 1440 phy = &motg->phy;
1433 otg->dev = &pdev->dev; 1441 phy->dev = &pdev->dev;
1434 1442
1435 motg->phy_reset_clk = clk_get(&pdev->dev, "usb_phy_clk"); 1443 motg->phy_reset_clk = clk_get(&pdev->dev, "usb_phy_clk");
1436 if (IS_ERR(motg->phy_reset_clk)) { 1444 if (IS_ERR(motg->phy_reset_clk)) {
@@ -1538,16 +1546,18 @@ static int __init msm_otg_probe(struct platform_device *pdev)
1538 goto disable_clks; 1546 goto disable_clks;
1539 } 1547 }
1540 1548
1541 otg->init = msm_otg_reset; 1549 phy->init = msm_otg_reset;
1542 otg->set_host = msm_otg_set_host; 1550 phy->set_power = msm_otg_set_power;
1543 otg->set_peripheral = msm_otg_set_peripheral; 1551
1544 otg->set_power = msm_otg_set_power; 1552 phy->io_ops = &msm_otg_io_ops;
1545 1553
1546 otg->io_ops = &msm_otg_io_ops; 1554 phy->otg->phy = &motg->phy;
1555 phy->otg->set_host = msm_otg_set_host;
1556 phy->otg->set_peripheral = msm_otg_set_peripheral;
1547 1557
1548 ret = otg_set_transceiver(&motg->otg); 1558 ret = usb_set_transceiver(&motg->phy);
1549 if (ret) { 1559 if (ret) {
1550 dev_err(&pdev->dev, "otg_set_transceiver failed\n"); 1560 dev_err(&pdev->dev, "usb_set_transceiver failed\n");
1551 goto free_irq; 1561 goto free_irq;
1552 } 1562 }
1553 1563
@@ -1591,6 +1601,7 @@ put_clk:
1591put_phy_reset_clk: 1601put_phy_reset_clk:
1592 clk_put(motg->phy_reset_clk); 1602 clk_put(motg->phy_reset_clk);
1593free_motg: 1603free_motg:
1604 kfree(motg->phy.otg);
1594 kfree(motg); 1605 kfree(motg);
1595 return ret; 1606 return ret;
1596} 1607}
@@ -1598,10 +1609,10 @@ free_motg:
1598static int __devexit msm_otg_remove(struct platform_device *pdev) 1609static int __devexit msm_otg_remove(struct platform_device *pdev)
1599{ 1610{
1600 struct msm_otg *motg = platform_get_drvdata(pdev); 1611 struct msm_otg *motg = platform_get_drvdata(pdev);
1601 struct usb_phy *otg = &motg->otg; 1612 struct usb_phy *phy = &motg->phy;
1602 int cnt = 0; 1613 int cnt = 0;
1603 1614
1604 if (otg->host || otg->gadget) 1615 if (phy->otg->host || phy->otg->gadget)
1605 return -EBUSY; 1616 return -EBUSY;
1606 1617
1607 msm_otg_debugfs_cleanup(); 1618 msm_otg_debugfs_cleanup();
@@ -1613,14 +1624,14 @@ static int __devexit msm_otg_remove(struct platform_device *pdev)
1613 device_init_wakeup(&pdev->dev, 0); 1624 device_init_wakeup(&pdev->dev, 0);
1614 pm_runtime_disable(&pdev->dev); 1625 pm_runtime_disable(&pdev->dev);
1615 1626
1616 otg_set_transceiver(NULL); 1627 usb_set_transceiver(NULL);
1617 free_irq(motg->irq, motg); 1628 free_irq(motg->irq, motg);
1618 1629
1619 /* 1630 /*
1620 * Put PHY in low power mode. 1631 * Put PHY in low power mode.
1621 */ 1632 */
1622 ulpi_read(otg, 0x14); 1633 ulpi_read(phy, 0x14);
1623 ulpi_write(otg, 0x08, 0x09); 1634 ulpi_write(phy, 0x08, 0x09);
1624 1635
1625 writel(readl(USB_PORTSC) | PORTSC_PHCD, USB_PORTSC); 1636 writel(readl(USB_PORTSC) | PORTSC_PHCD, USB_PORTSC);
1626 while (cnt < PHY_SUSPEND_TIMEOUT_USEC) { 1637 while (cnt < PHY_SUSPEND_TIMEOUT_USEC) {
@@ -1630,7 +1641,7 @@ static int __devexit msm_otg_remove(struct platform_device *pdev)
1630 cnt++; 1641 cnt++;
1631 } 1642 }
1632 if (cnt >= PHY_SUSPEND_TIMEOUT_USEC) 1643 if (cnt >= PHY_SUSPEND_TIMEOUT_USEC)
1633 dev_err(otg->dev, "Unable to suspend PHY\n"); 1644 dev_err(phy->dev, "Unable to suspend PHY\n");
1634 1645
1635 clk_disable(motg->pclk); 1646 clk_disable(motg->pclk);
1636 clk_disable(motg->clk); 1647 clk_disable(motg->clk);
@@ -1651,6 +1662,7 @@ static int __devexit msm_otg_remove(struct platform_device *pdev)
1651 if (motg->core_clk) 1662 if (motg->core_clk)
1652 clk_put(motg->core_clk); 1663 clk_put(motg->core_clk);
1653 1664
1665 kfree(motg->phy.otg);
1654 kfree(motg); 1666 kfree(motg);
1655 1667
1656 return 0; 1668 return 0;
@@ -1660,7 +1672,7 @@ static int __devexit msm_otg_remove(struct platform_device *pdev)
1660static int msm_otg_runtime_idle(struct device *dev) 1672static int msm_otg_runtime_idle(struct device *dev)
1661{ 1673{
1662 struct msm_otg *motg = dev_get_drvdata(dev); 1674 struct msm_otg *motg = dev_get_drvdata(dev);
1663 struct usb_phy *otg = &motg->otg; 1675 struct usb_otg *otg = motg->phy.otg;
1664 1676
1665 dev_dbg(dev, "OTG runtime idle\n"); 1677 dev_dbg(dev, "OTG runtime idle\n");
1666 1678
@@ -1670,7 +1682,7 @@ static int msm_otg_runtime_idle(struct device *dev)
1670 * This 1 sec delay also prevents entering into LPM immediately 1682 * This 1 sec delay also prevents entering into LPM immediately
1671 * after asynchronous interrupt. 1683 * after asynchronous interrupt.
1672 */ 1684 */
1673 if (otg->state != OTG_STATE_UNDEFINED) 1685 if (otg->phy->state != OTG_STATE_UNDEFINED)
1674 pm_schedule_suspend(dev, 1000); 1686 pm_schedule_suspend(dev, 1000);
1675 1687
1676 return -EAGAIN; 1688 return -EAGAIN;