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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-07 08:06:10 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-07 08:06:10 -0400
commit7cb9cf0224efd6d41b2bdd9bfb412b42aa4281f8 (patch)
treed4be181ecdf4e5eba7bc3b83e08b34678d9dbe84 /drivers/watchdog
parentdc92b1f9ab1e1665dbbc56911782358e7f9a49f9 (diff)
parenta255172895b35d7c9271a44b25700a7b3f1558b1 (diff)
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
Pull m68knommu arch updates from Greg Ungerer: "Most of it is a cleanup of the ColdFire hardware header files. We have had a few occurrances of bugs caused by inconsistent definitions of peripheral addresses. These patches make them all consistent, and also clean out a bunch of old crap. Overall we remove about 1000 lines." * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (27 commits) m68knommu: fix inconsistent formating in ColdFire 5407 definitions m68knommu: fix inconsistent formating in ColdFire 5307 definitions m68knommu: fix inconsistent formating in ColdFire 527x definitions m68knommu: fix inconsistent formating in ColdFire 5272 definitions m68knommu: fix inconsistent formating in ColdFire 523x definitions m68knommu: clean up ColdFire 54xx General Timer definitions m68knommu: clean up Pin Assignment definitions for the 54xx ColdFire CPU m68knommu: fix multi-function pin setup for FEC module on ColdFire 523x m68knommu: move ColdFire slice timer address defiens to 54xx header m68knommu: use read/write IO access functions in ColdFire m532x setup code m68knommu: modify ColdFire 532x GPIO register definitions to be consistent m68knommu: remove a lot of unsed definitions for 532x ColdFire m68knommu: use definitions for the ColdFire 528x FEC multi-function pins m68knommu: remove address offsets relative to IPSBAR for ColdFire 527x m68knommu: remove unused ColdFire 5282 register definitions m68knommu: fix wrong register offsets used for ColdFire 5272 multi-function pins m68knommu: make ColdFire 5249 MBAR2 register definitions absolute addresses m68knommu: make remaining ColdFire 5272 register definitions absolute addresses m68knommu: make ColdFire Park and Assignment register definitions absolute addresses m68knommu: make ColdFire Chip Select register definitions absolute addresses ...
Diffstat (limited to 'drivers/watchdog')
-rw-r--r--drivers/watchdog/m54xx_wdt.c21
1 files changed, 10 insertions, 11 deletions
diff --git a/drivers/watchdog/m54xx_wdt.c b/drivers/watchdog/m54xx_wdt.c
index 663cad86c63..173494a681e 100644
--- a/drivers/watchdog/m54xx_wdt.c
+++ b/drivers/watchdog/m54xx_wdt.c
@@ -46,17 +46,17 @@ static void wdt_enable(void)
46 unsigned int gms0; 46 unsigned int gms0;
47 47
48 /* preserve GPIO usage, if any */ 48 /* preserve GPIO usage, if any */
49 gms0 = __raw_readl(MCF_MBAR + MCF_GPT_GMS0); 49 gms0 = __raw_readl(MCF_GPT_GMS0);
50 if (gms0 & MCF_GPT_GMS_TMS_GPIO) 50 if (gms0 & MCF_GPT_GMS_TMS_GPIO)
51 gms0 &= (MCF_GPT_GMS_TMS_GPIO | MCF_GPT_GMS_GPIO_MASK 51 gms0 &= (MCF_GPT_GMS_TMS_GPIO | MCF_GPT_GMS_GPIO_MASK
52 | MCF_GPT_GMS_OD); 52 | MCF_GPT_GMS_OD);
53 else 53 else
54 gms0 = MCF_GPT_GMS_TMS_GPIO | MCF_GPT_GMS_OD; 54 gms0 = MCF_GPT_GMS_TMS_GPIO | MCF_GPT_GMS_OD;
55 __raw_writel(gms0, MCF_MBAR + MCF_GPT_GMS0); 55 __raw_writel(gms0, MCF_GPT_GMS0);
56 __raw_writel(MCF_GPT_GCIR_PRE(heartbeat*(MCF_BUSCLK/0xffff)) | 56 __raw_writel(MCF_GPT_GCIR_PRE(heartbeat*(MCF_BUSCLK/0xffff)) |
57 MCF_GPT_GCIR_CNT(0xffff), MCF_MBAR + MCF_GPT_GCIR0); 57 MCF_GPT_GCIR_CNT(0xffff), MCF_GPT_GCIR0);
58 gms0 |= MCF_GPT_GMS_OCPW(0xA5) | MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE; 58 gms0 |= MCF_GPT_GMS_OCPW(0xA5) | MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE;
59 __raw_writel(gms0, MCF_MBAR + MCF_GPT_GMS0); 59 __raw_writel(gms0, MCF_GPT_GMS0);
60} 60}
61 61
62static void wdt_disable(void) 62static void wdt_disable(void)
@@ -64,18 +64,18 @@ static void wdt_disable(void)
64 unsigned int gms0; 64 unsigned int gms0;
65 65
66 /* disable watchdog */ 66 /* disable watchdog */
67 gms0 = __raw_readl(MCF_MBAR + MCF_GPT_GMS0); 67 gms0 = __raw_readl(MCF_GPT_GMS0);
68 gms0 &= ~(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE); 68 gms0 &= ~(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE);
69 __raw_writel(gms0, MCF_MBAR + MCF_GPT_GMS0); 69 __raw_writel(gms0, MCF_GPT_GMS0);
70} 70}
71 71
72static void wdt_keepalive(void) 72static void wdt_keepalive(void)
73{ 73{
74 unsigned int gms0; 74 unsigned int gms0;
75 75
76 gms0 = __raw_readl(MCF_MBAR + MCF_GPT_GMS0); 76 gms0 = __raw_readl(MCF_GPT_GMS0);
77 gms0 |= MCF_GPT_GMS_OCPW(0xA5); 77 gms0 |= MCF_GPT_GMS_OCPW(0xA5);
78 __raw_writel(gms0, MCF_MBAR + MCF_GPT_GMS0); 78 __raw_writel(gms0, MCF_GPT_GMS0);
79} 79}
80 80
81static int m54xx_wdt_open(struct inode *inode, struct file *file) 81static int m54xx_wdt_open(struct inode *inode, struct file *file)
@@ -195,8 +195,7 @@ static struct miscdevice m54xx_wdt_miscdev = {
195 195
196static int __init m54xx_wdt_init(void) 196static int __init m54xx_wdt_init(void)
197{ 197{
198 if (!request_mem_region(MCF_MBAR + MCF_GPT_GCIR0, 4, 198 if (!request_mem_region(MCF_GPT_GCIR0, 4, "Coldfire M54xx Watchdog")) {
199 "Coldfire M54xx Watchdog")) {
200 pr_warn("I/O region busy\n"); 199 pr_warn("I/O region busy\n");
201 return -EBUSY; 200 return -EBUSY;
202 } 201 }
@@ -208,7 +207,7 @@ static int __init m54xx_wdt_init(void)
208static void __exit m54xx_wdt_exit(void) 207static void __exit m54xx_wdt_exit(void)
209{ 208{
210 misc_deregister(&m54xx_wdt_miscdev); 209 misc_deregister(&m54xx_wdt_miscdev);
211 release_mem_region(MCF_MBAR + MCF_GPT_GCIR0, 4); 210 release_mem_region(MCF_GPT_GCIR0, 4);
212} 211}
213 212
214module_init(m54xx_wdt_init); 213module_init(m54xx_wdt_init);