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authorLutz Ballaschke <vegan.grindcore@googlemail.com>2010-09-26 10:25:35 -0400
committerWim Van Sebroeck <wim@iguana.be>2011-01-12 05:21:39 -0500
commit7977ff6e3deb042b29370e52607df20d1ee33b9d (patch)
tree4cbb9a392478be57de3a9405e5630020ea9787ac /drivers/watchdog/f71808e_wdt.c
parentf9a9f096d25bbc54dc3147613ee1d86b35cce691 (diff)
watchdog: add f71862fg support
Watchdog support for Fintek F71862fg Super-I/O added. Two different hardware reset pins of the F71862fg chip can be configured by an additional module parameter. Signed-off-by: Lutz Ballaschke <vegan.grindcore@googlemail.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'drivers/watchdog/f71808e_wdt.c')
-rw-r--r--drivers/watchdog/f71808e_wdt.c45
1 files changed, 41 insertions, 4 deletions
diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c
index 3c9142474d1..f573948998b 100644
--- a/drivers/watchdog/f71808e_wdt.c
+++ b/drivers/watchdog/f71808e_wdt.c
@@ -42,6 +42,7 @@
42#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ 42#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
43#define SIO_REG_DEVREV 0x22 /* Device revision */ 43#define SIO_REG_DEVREV 0x22 /* Device revision */
44#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ 44#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
45#define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
45#define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */ 46#define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
46#define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */ 47#define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
47#define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */ 48#define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
@@ -71,6 +72,8 @@
71#define WATCHDOG_MAX_TIMEOUT (60 * 255) 72#define WATCHDOG_MAX_TIMEOUT (60 * 255)
72#define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for 73#define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
73 watchdog signal */ 74 watchdog signal */
75#define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
76 pin number 63 */
74 77
75static unsigned short force_id; 78static unsigned short force_id;
76module_param(force_id, ushort, 0); 79module_param(force_id, ushort, 0);
@@ -90,6 +93,12 @@ MODULE_PARM_DESC(pulse_width,
90 "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms" 93 "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"
91 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")"); 94 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
92 95
96static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
97module_param(f71862fg_pin, uint, 0);
98MODULE_PARM_DESC(f71862fg_pin,
99 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
100 " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
101
93static int nowayout = WATCHDOG_NOWAYOUT; 102static int nowayout = WATCHDOG_NOWAYOUT;
94module_param(nowayout, bool, 0444); 103module_param(nowayout, bool, 0444);
95MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close"); 104MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
@@ -283,6 +292,28 @@ exit_unlock:
283 return err; 292 return err;
284} 293}
285 294
295static int f71862fg_pin_configure(unsigned short ioaddr)
296{
297 /* When ioaddr is non-zero the calling function has to take care of
298 mutex handling and superio preparation! */
299
300 if (f71862fg_pin == 63) {
301 if (ioaddr) {
302 /* SPI must be disabled first to use this pin! */
303 superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6);
304 superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4);
305 }
306 } else if (f71862fg_pin == 56) {
307 if (ioaddr)
308 superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1);
309 } else {
310 printk(KERN_ERR DRVNAME ": Invalid argument f71862fg_pin=%d\n",
311 f71862fg_pin);
312 return -EINVAL;
313 }
314 return 0;
315}
316
286static int watchdog_start(void) 317static int watchdog_start(void)
287{ 318{
288 /* Make sure we don't die as soon as the watchdog is enabled below */ 319 /* Make sure we don't die as soon as the watchdog is enabled below */
@@ -304,6 +335,12 @@ static int watchdog_start(void)
304 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3); 335 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
305 break; 336 break;
306 337
338 case f71862fg:
339 err = f71862fg_pin_configure(watchdog.sioaddr);
340 if (err)
341 goto exit_superio;
342 break;
343
307 case f71882fg: 344 case f71882fg:
308 /* Set pin 56 to WDTRST# */ 345 /* Set pin 56 to WDTRST# */
309 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1); 346 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
@@ -712,16 +749,16 @@ static int __init f71808e_find(int sioaddr)
712 case SIO_F71808_ID: 749 case SIO_F71808_ID:
713 watchdog.type = f71808fg; 750 watchdog.type = f71808fg;
714 break; 751 break;
752 case SIO_F71862_ID:
753 watchdog.type = f71862fg;
754 err = f71862fg_pin_configure(0); /* validate module parameter */
755 break;
715 case SIO_F71882_ID: 756 case SIO_F71882_ID:
716 watchdog.type = f71882fg; 757 watchdog.type = f71882fg;
717 break; 758 break;
718 case SIO_F71889_ID: 759 case SIO_F71889_ID:
719 watchdog.type = f71889fg; 760 watchdog.type = f71889fg;
720 break; 761 break;
721 case SIO_F71862_ID:
722 /* These have a watchdog, though it isn't implemented (yet). */
723 err = -ENOSYS;
724 goto exit;
725 case SIO_F71858_ID: 762 case SIO_F71858_ID:
726 /* Confirmed (by datasheet) not to have a watchdog. */ 763 /* Confirmed (by datasheet) not to have a watchdog. */
727 err = -ENODEV; 764 err = -ENODEV;