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authorArchit Taneja <archit@ti.com>2012-06-29 05:01:07 -0400
committerArchit Taneja <archit@ti.com>2012-06-29 06:32:26 -0400
commit7d2572f8b3df70c29527e5579b4b67a76ba8477d (patch)
treef2443b033959130883bf95bc5908f7c7e934e53b /drivers/video
parentbc2e60a69fead72cfff97ddccb4cca5ce75164a8 (diff)
OMAPDSS: DSI: Configure dss_lcd_mgr_config struct with lcd manager parameters
Create a dss_lcd_mgr_config struct instance in DSI. Fill up all the parameters of the struct with configurations held by the panel, and the configurations required by DSI. Use these to write to the DISPC registers. These direct register writes would be later replaced by a function which applies the configuration using the shadow register programming model. The function dsi_configure_dispc_clocks() is now called in dsi_display_init_dispc(), this lets all the lcd manager related configurations happen in the same place. The DISPC_DIVISORo register was written in dsi_configure_dispc_clock(), now it just fills up the dispc_clock_info parameter in mgr_config. The clock_info is written later in dsi_display_init_dispc(). Signed-off-by: Archit Taneja <archit@ti.com>
Diffstat (limited to 'drivers/video')
-rw-r--r--drivers/video/omap2/dss/dsi.c100
1 files changed, 64 insertions, 36 deletions
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index 5db5147a6ff..f51df30d8c1 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -331,6 +331,8 @@ struct dsi_data {
331 unsigned num_lanes_used; 331 unsigned num_lanes_used;
332 332
333 unsigned scp_clk_refcount; 333 unsigned scp_clk_refcount;
334
335 struct dss_lcd_mgr_config mgr_config;
334}; 336};
335 337
336struct dsi_packet_sent_handler_data { 338struct dsi_packet_sent_handler_data {
@@ -4337,14 +4339,40 @@ EXPORT_SYMBOL(omap_dsi_update);
4337 4339
4338/* Display funcs */ 4340/* Display funcs */
4339 4341
4340static int dsi_display_init_dispc(struct omap_dss_device *dssdev) 4342static int dsi_configure_dispc_clocks(struct omap_dss_device *dssdev)
4341{ 4343{
4344 struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);
4345 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
4346 struct dispc_clock_info dispc_cinfo;
4342 int r; 4347 int r;
4348 unsigned long long fck;
4349
4350 fck = dsi_get_pll_hsdiv_dispc_rate(dsidev);
4351
4352 dispc_cinfo.lck_div = dssdev->clocks.dispc.channel.lck_div;
4353 dispc_cinfo.pck_div = dssdev->clocks.dispc.channel.pck_div;
4354
4355 r = dispc_calc_clock_rates(fck, &dispc_cinfo);
4356 if (r) {
4357 DSSERR("Failed to calc dispc clocks\n");
4358 return r;
4359 }
4360
4361 dsi->mgr_config.clock_info = dispc_cinfo;
4362
4363 return 0;
4364}
4365
4366static int dsi_display_init_dispc(struct omap_dss_device *dssdev)
4367{
4368 struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);
4369 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
4343 struct omap_video_timings timings; 4370 struct omap_video_timings timings;
4371 int r;
4372 u32 irq = 0;
4344 4373
4345 if (dssdev->panel.dsi_mode == OMAP_DSS_DSI_CMD_MODE) { 4374 if (dssdev->panel.dsi_mode == OMAP_DSS_DSI_CMD_MODE) {
4346 u16 dw, dh; 4375 u16 dw, dh;
4347 u32 irq;
4348 4376
4349 dssdev->driver->get_resolution(dssdev, &dw, &dh); 4377 dssdev->driver->get_resolution(dssdev, &dw, &dh);
4350 4378
@@ -4363,16 +4391,16 @@ static int dsi_display_init_dispc(struct omap_dss_device *dssdev)
4363 (void *) dssdev, irq); 4391 (void *) dssdev, irq);
4364 if (r) { 4392 if (r) {
4365 DSSERR("can't get FRAMEDONE irq\n"); 4393 DSSERR("can't get FRAMEDONE irq\n");
4366 return r; 4394 goto err;
4367 } 4395 }
4368 4396
4369 dispc_mgr_enable_stallmode(dssdev->manager->id, true); 4397 dsi->mgr_config.stallmode = true;
4370 dispc_mgr_enable_fifohandcheck(dssdev->manager->id, 1); 4398 dsi->mgr_config.fifohandcheck = true;
4371 } else { 4399 } else {
4372 timings = dssdev->panel.timings; 4400 timings = dssdev->panel.timings;
4373 4401
4374 dispc_mgr_enable_stallmode(dssdev->manager->id, false); 4402 dsi->mgr_config.stallmode = false;
4375 dispc_mgr_enable_fifohandcheck(dssdev->manager->id, 0); 4403 dsi->mgr_config.fifohandcheck = false;
4376 } 4404 }
4377 4405
4378 /* 4406 /*
@@ -4388,12 +4416,39 @@ static int dsi_display_init_dispc(struct omap_dss_device *dssdev)
4388 4416
4389 dss_mgr_set_timings(dssdev->manager, &timings); 4417 dss_mgr_set_timings(dssdev->manager, &timings);
4390 4418
4391 dispc_mgr_set_lcd_type_tft(dssdev->manager->id); 4419 r = dsi_configure_dispc_clocks(dssdev);
4420 if (r)
4421 goto err1;
4422
4423 dsi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
4424 dsi->mgr_config.video_port_width =
4425 dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt);
4426 dsi->mgr_config.lcden_sig_polarity = 0;
4427
4428 dispc_mgr_set_io_pad_mode(dsi->mgr_config.io_pad_mode);
4429
4430 dispc_mgr_enable_stallmode(dssdev->manager->id,
4431 dsi->mgr_config.stallmode);
4432 dispc_mgr_enable_fifohandcheck(dssdev->manager->id,
4433 dsi->mgr_config.fifohandcheck);
4434
4435 dispc_mgr_set_clock_div(dssdev->manager->id,
4436 &dsi->mgr_config.clock_info);
4392 4437
4393 dispc_mgr_set_tft_data_lines(dssdev->manager->id, 4438 dispc_mgr_set_tft_data_lines(dssdev->manager->id,
4394 dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt)); 4439 dsi->mgr_config.video_port_width);
4440
4441 dispc_lcd_enable_signal_polarity(dsi->mgr_config.lcden_sig_polarity);
4442
4443 dispc_mgr_set_lcd_type_tft(dssdev->manager->id);
4395 4444
4396 return 0; 4445 return 0;
4446err1:
4447 if (dssdev->panel.dsi_mode == OMAP_DSS_DSI_CMD_MODE)
4448 omap_dispc_unregister_isr(dsi_framedone_irq_callback,
4449 (void *) dssdev, irq);
4450err:
4451 return r;
4397} 4452}
4398 4453
4399static void dsi_display_uninit_dispc(struct omap_dss_device *dssdev) 4454static void dsi_display_uninit_dispc(struct omap_dss_device *dssdev)
@@ -4433,29 +4488,6 @@ static int dsi_configure_dsi_clocks(struct omap_dss_device *dssdev)
4433 return 0; 4488 return 0;
4434} 4489}
4435 4490
4436static int dsi_configure_dispc_clocks(struct omap_dss_device *dssdev)
4437{
4438 struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);
4439 struct dispc_clock_info dispc_cinfo;
4440 int r;
4441 unsigned long long fck;
4442
4443 fck = dsi_get_pll_hsdiv_dispc_rate(dsidev);
4444
4445 dispc_cinfo.lck_div = dssdev->clocks.dispc.channel.lck_div;
4446 dispc_cinfo.pck_div = dssdev->clocks.dispc.channel.pck_div;
4447
4448 r = dispc_calc_clock_rates(fck, &dispc_cinfo);
4449 if (r) {
4450 DSSERR("Failed to calc dispc clocks\n");
4451 return r;
4452 }
4453
4454 dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
4455
4456 return 0;
4457}
4458
4459static int dsi_display_init_dsi(struct omap_dss_device *dssdev) 4491static int dsi_display_init_dsi(struct omap_dss_device *dssdev)
4460{ 4492{
4461 struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); 4493 struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);
@@ -4477,10 +4509,6 @@ static int dsi_display_init_dsi(struct omap_dss_device *dssdev)
4477 4509
4478 DSSDBG("PLL OK\n"); 4510 DSSDBG("PLL OK\n");
4479 4511
4480 r = dsi_configure_dispc_clocks(dssdev);
4481 if (r)
4482 goto err2;
4483
4484 r = dsi_cio_init(dssdev); 4512 r = dsi_cio_init(dssdev);
4485 if (r) 4513 if (r)
4486 goto err2; 4514 goto err2;